NTMS4N01R2G - ON Semiconductor

January, 2006 − Rev. 3 1Publication Order Number:

NTMS4N01R2/D

NTMS4N01R2

Power MOSFET

4.2 Amps, 20 Volts

N−Channel Enhancement−Mode

Single SO−8 Package

Features

•High Density Power MOSFET with Ultra Low RDS(on) Providing

Higher Efficiency

•Miniature SO−8 Surface Mount Package Saving Board Space;

Mounting Information for the SO−8 Package is Provided

•IDSS Specified at Elevated Temperature

•Drain−to−Source Avalanche Energy Specified

•Diode Exhibits High Speed, Soft Recovery

•Pb−Free Package is Available

Applications

•Power Management in Portable and Battery−Powered Products, i.e.:

Computers, Printers , PCMCIA Cards, Cellular & Cordless Telephones

MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)

Rating Symbol Value Unit

Drain−to−Source Voltage VDSS 20 V

Drain−to−Gate Voltage (RGS = 1.0 mW)VDGR 20 V

Gate−to−Source Voltage − Continuous VGS ±10 V

Thermal Resistance, Junction−to−Ambient

(Note 1)

Total Power Dissipation @ TA = 25°C

Continuous Drain Current @ 25°C

Continuous Drain Current @ 70°C

Pulsed Drain Current (Note 4)

RqJA

IDM

2.5

5.9

4.7

°C/W

Thermal Resistance, Junction−to−Ambient

(Note 2)

Total Power Dissipation @ TA = 25°C

Continuous Drain Current @ 25°C

Continuous Drain Current @ 70°C

Pulsed Drain Current (Note 4)

RqJA

IDM

100

1.25

4.2

3.3

°C/W

Thermal Resistance, Junction−to−Ambient

(Note 3)

Total Power Dissipation @ TA = 25°C

Continuous Drain Current @ 25°C

Continuous Drain Current @ 70°C

Pulsed Drain Current (Note 4)

RqJA

IDM

162

0.77

3.3

2.6

°C/W

Operating and Storage Temperature Range TJ, Tstg −55 to +150 °C

Single Pulse Drain−to−Source Avalanche

Energy − Starting TJ = 25°C

(VDD = 20 Vdc, VGS = 5.0 Vdc,

Peak IL = 7.5 Apk, L = 6 mH, RG = 25 W)

EAS 169 mJ

Maximum Lead Temperature for Soldering

Purposes, 1/8″ from case for 10 seconds TL260 °C

Maximum ratings are those values beyond which device damage can occur.

Maximum ratings applied to the device are individual stress limit values (not

normal operating conditions) and are not valid simultaneously. If these limits are

exceeded, device functional operation is not implied, damage may occur and

reliability may be affected.

1. Mounted onto a 2″ square FR− 4 Board (1″ sq . 2 o z Cu 0.06″ thick single sided),

t ≤ 1 0 seconds.

2. Mounted onto a 2″ square FR− 4 Board (1″ sq . 2 o z Cu 0.06″ thick single sided),

t = steady state.

3. Minimum FR−4 or G−10 PCB, t = Steady State.

4. Pulse Test: Pulse Width = 300 ms, Duty Cycle = 2%.

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Device Package Shipping†

ORDERING INFORMATION

NTMS4N01R2 SO−8 2500 / Tape & Ree

† For information on tape and reel specifications,

including part orientation and tape sizes, please

refer to our Tape and Reel Packaging Specification

Brochure, BRD8011/D.

SO−8

CASE 751

STYLE 13

MARKING DIAGRAM

AND PIN ASSIGNMENT

NTMS4N01R2G SO−8

(Pb−Free) 2500 / Tape & Ree

E4N01

AYWW G

E4N01 = Device Code

A = Assembly Location

Y = Year

WW = Work Week

G= Pb−Free Package

(Note: Microdot may be in either location)

Single N−Channel

4.2 AMPERES, 20 VOLTS

0.045 W @ VGS = 4.5 V

N.C.

Source

Gate

8Drain

Drain

Top View

NTMS4N01R2

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ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted) (Note 5)

Characteristic Symbol Min Typ Max Unit

OFF CHARACTERISTICS

Drain−to−Source Breakdown Voltage

(VGS = 0 Vdc, ID = 250 mAdc)

Temperature Coefficient (Positive)

V(BR)DSS 20

−−

20 −

−

Vdc

mV/°C

Zero Gate Voltage Drain Current

(VDS = 12 Vdc, VGS = 0 Vdc, TJ = 25°C)

(VDS = 12 Vdc, VGS = 0 Vdc, TJ = 125°C)

(VDS = 20 Vdc, VGS = 0 Vdc, TJ = 25°C)

IDSS −

−

0.2

1.0

−

mAdc

Gate−Body Leakage Current

(VGS = +10 Vdc, VDS = 0 Vdc) IGSS − − 100 nAdc

Gate−Body Leakage Current

(VGS = −10 Vdc, VDS = 0 Vdc) IGSS − − −100 nAdc

ON CHARACTERISTICS

Gate Threshold Voltage

(VDS = VGS, ID = 250 mAdc)

Temperature Coefficient (Negative)

VGS(th) 0.6

−0.95

−3.0 1.2

−

Vdc

mV/°C

Static Drain−to−Source On−State Resistance

(VGS = 4.5 Vdc, ID = 4.2 Adc)

(VGS = 2.7 Vdc, ID = 2.1 Adc)

(VGS = 2.5 Vdc, ID = 2.0 Adc)

RDS(on) −

−

0.030

0.035

0.037

0.04

0.05

−

Forward Transconductance

(VDS = 2.5 Vdc, ID = 2.0 Adc) gFS − 10 − Mhos

DYNAMIC CHARACTERISTICS

Input Capacitance (VDS = 10 Vdc, VGS = 0 Vdc,

f = 1.0 MHz)

Ciss − 870 1200 pF

Output Capacitance Coss − 260 400

Reverse Transfer Capacitance Crss − 60 100

SWITCHING CHARACTERISTICS (Notes 6 & 7)

Turn−On Delay Time

(VDD = 12 Vdc, ID = 4.2 Adc,

VGS = 4.5 Vdc,

RG = 2.3 W)

td(on) − 13 25 ns

Rise Time tr− 35 65

Turn−Off Delay Time td(off) − 45 75

Fall Time tf− 50 90

Total Gate Charge (VDS = 12 Vdc,

VGS = 4.5 Vdc,

ID = 4.2 Adc)

Qtot −11 16 nC

Gate−Source Charge Qgs − 2.0 −

Gate−Drain Charge Qgd − 3.0 −

BODY−DRAIN DIODE RATINGS (Note 6)

Diode Forward On−Voltage (IS = 4.2 Adc, VGS = 0 Vdc)

(IS = 4.2 Adc, VGS = 0 Vdc, TJ = 125°C) VSD −

−0.85

0.70 1.1

−Vdc

Reverse Recovery Time (IS = 4.2 Adc, VGS = 0 Vdc,

dIS/dt = 100 A/ms)

trr − 20 − ns

ta− 12 −

tb− 8.0 −

Reverse Recovery Stored Charge QRR − 0.01 − mC

5. Handling precautions to protect against electrostatic discharge is mandatory.

6. Indicates Pulse Test: Pulse Width = 300 ms max, Duty Cycle = 2%.

7. Switching characteristics are independent of operating junction temperature.

NTMS4N01R2

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2.1 V

Figure 1. On−Region Characteristics

VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)

21.751.51.2510.750.50.250

Figure 2. Transfer Characteristics

VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) 2.

21.510.5

Figure 3. On−Resistance versus

Gate−To−Source Voltage

VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)

0.08

0.05

0.04

0.03

86420

Figure 4. On-Resistance versus Drain Current

and Gate Voltage

ID, DRAIN CURRENT (AMPS)

6420

0.03

0.02

0.01

0.02

0.05

Figure 5. On−Resistance Variation with

Temperature

TJ, JUNCTION TEMPERATURE (°C)

1.6

1.4

1.2

0.8

1501251007550250−25−50

Figure 6. Drain−To−Source Leakage Current

versus Voltage

VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)

121062

1000

100

0.6

10,000

VDS ≥ 10 V

TJ = −55°C

25°C

100°C

ID = 4.2 A

TJ = 25°CTJ = 25°C

VGS = 2.5 V

VGS = 4.5 V

ID = 4.2 A

VGS = 4.5 V

TJ = 125°C

VGS = 0 V

TJ = 150°C

TJ = 25°C

VGS = 1.3 V

1.9 V

, DRAIN CURRENT (AMPS)

1.5 V

1.7 V

8 V

4.5 V

3.1 V

2.7 V

2.5 V

2.3 V

ID, DRAIN CURRENT (AMPS)

RDS(on), DRAIN−TO SOURCE−RESISTANCE (W)

0.07

0.06

RDS(on), DRAIN−TO SOURCE−RESISTANCE (W)

0.04

VGS = 2.7 V

DS(on)

, DRAIN−TO−SOURCE RESISTANCE (NORMALIZED)

IDSS, LEAKAGE (nA)

48 2

1814 16

NTMS4N01R2

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GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS)

C, CAPACITANCE (pF)

500

2000

Figure 7. Capacitance Variation

804106

TJ = 25°C

Ciss

Coss

Crss

1000

1500

Ciss

Crss

VGS = 0 VVDS = 0 V

VDS

VGS

2500

22486

Figure 8. Gate−To−Source and Drain−To−Source

Voltage versus Total Charge

RG, GATE RESISTANCE (OHMS)

1 10 100

100

t, TIME (ns)

VDD = 10 V

ID = 4.2 A

VGS = 4.5 V

td(on)

Figure 9. Resistive Switching Time Variation

versus Gate Resistance

VGS, GATE−TO−SOURCE VOLTAGE (VOLT

Qg, TOTAL GATE CHARGE (nC)

VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)

ID = 4.2 A

TJ = 25°C

VDS

VGS

1000

416

td(off)

RG, GATE RESISTANCE (OHMS)

11010

100

t, TIME (ns)

VDD = 10 V

ID = 2.1 A

VGS = 4.5 V

td(on)

Figure 10. Resistive Switching Time Variation

versus Gate Resistance

1000

td(off)

6 8 10 12

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DRAIN−TO−SOURCE DIODE CHARACTERISTICS

0.3 0.4 0.5 0.6

VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)

Figure 11. Diode Forward Voltage versus Current

4VGS = 0 V

TJ = 25°C

0.7

Figure 12. Maximum Rated Forward Biased

Safe Operating Area

0.1

VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)

0.01

ID, DRAIN CURRENT (AMPS)

RDS(on) LIMIT

THERMAL LIMIT

PACKAGE LIMIT

VGS = 20 V

SINGLE PULSE

TC = 25°C

100

10 ms

1.0 ms

100 ms

0.8 0.9

IS, SOURCE CURRENT (AMPS)

0.1 Mounted on 2″ sq. FR4 board (1″ sq. 2 oz.

Cu 0.06″ thick single sided), 10s max.

Figure 13. Diode Reverse Recovery Waveform

di/dt

trr

0.25 IS

TIME

TYPICAL ELECTRICAL CHARACTERISTICS

Figure 14. Thermal Response

t, TIME (s)

Rthja(t), EFFECTIVE TRANSIENT

THERMAL RESISTANCE

0.1

0.01

D = 0.5

SINGLE PULSE

1.0E−05 1.0E−04 1.0E−03 1.0E−02 1.0E−01 1.0E+00 1.0E+01

0.2

0.05

0.01

1.0E+02 1.0E+03

0.001

0.0022 W0.0210 W0.2587 W0.7023 W0.6863 W

108.44 F3.1413 F0.3517 F0.0207 F0.0020 F

Chip

Ambient

Normalized to qja at 10s.

0.1

0.02

NTMS4N01R2

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PACKAGE DIMENSIONS

STYLE 13:

PIN 1. N.C.

2. SOURCE

3. SOURCE

4. GATE

5. DRAIN

6. DRAIN

7. DRAIN

8. DRAIN

SEATING

PLANE

X 45_

NOTES:

1. DIMENSIONING AND TOLERANCING PER

ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSION A AND B DO NOT INCLUDE

MOLD PROTRUSION.

4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)

PER SIDE.

5. DIMENSION D DOES NOT INCLUDE DAMBAR

PROTRUSION. ALLOWABLE DAMBAR

PROTRUSION SHALL BE 0.127 (0.005) TOTAL

IN EXCESS OF THE D DIMENSION AT

MAXIMUM MATERIAL CONDITION.

6. 751−01 THRU 751−06 ARE OBSOLETE. NEW

STANDARD IS 751−07.

0.10 (0.004)

DIM

AMIN MAX MIN MAX

INCHES

4.80 5.00 0.189 0.197

MILLIMETERS

B3.80 4.00 0.150 0.157

C1.35 1.75 0.053 0.069

D0.33 0.51 0.013 0.020

G1.27 BSC 0.050 BSC

H0.10 0.25 0.004 0.010

J0.19 0.25 0.007 0.010

K0.40 1.27 0.016 0.050

M0 8 0 8

N0.25 0.50 0.010 0.020

S5.80 6.20 0.228 0.244

−X−

−Y−

0.25 (0.010)

−Z−

0.25 (0.010) ZSXS

____

1.52

0.060

7.0

0.275

0.6

0.024 1.270

0.050

4.0

0.155

ǒmm

inchesǓ

SCALE 6:1

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and

Mounting Techniques Reference Manual, SOLDERRM/D.

SOLDERING FOOTPRINT*

SOIC−8 NB

CASE 751−07

ISSUE AG

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