1
LTC1778/LTC1778-1
1778fb
Wide Operating Range,
No RSENSETM Step-Down Controller
■
No Sense Resistor Required
■
True Current Mode Control
■
Optimized for High Step-Down Ratios
■
t
ON(MIN)
≤ 100ns
■
Extremely Fast Transient Response
■
Stable with Ceramic C
OUT
■
Dual N-Channel MOSFET Synchronous Drive
■
Power Good Output Voltage Monitor (LTC1778)
■
Adjustable On-Time (LTC1778-1)
■
Wide V
IN
Range: 4V to 36V
■
±1% 0.8V Voltage Reference
■
Adjustable Current Limit
■
Adjustable Switching Frequency
■
Programmable Soft-Start
■
Output Overvoltage Protection
■
Optional Short-Circuit Shutdown Timer
■
Micropower Shutdown: I
Q
< 30µA
■
Available in a 16-Pin Narrow SSOP Package
■
Notebook and Palmtop Computers
■
Distributed Power Systems
The LTC
®
1778 is a synchronous step-down switching
regulator controller optimized for CPU power. The con-
troller uses a valley current control architecture to deliver
very low duty cycles with excellent transient response
without requiring a sense resistor. Operating frequency is
selected by an external resistor and is compensated for
variations in V
IN
.
Discontinuous mode operation provides high efficiency
operation at light loads. A forced continuous control pin
reduces noise and RF interference, and can assist second-
ary winding regulation by disabling discontinuous opera-
tion when the main output is lightly loaded.
Fault protection is provided by internal foldback current
limiting, an output overvoltage comparator and optional
short-circuit shutdown timer. Soft-start capability for sup-
ply sequencing is accomplished using an external timing
capacitor. The regulator current limit level is user program-
mable. Wide supply range allows operation from 4V to 36V
at the input and from 0.8V up to (0.9)V
IN
at the output.
Figure 1. High Efficiency Step-Down Converter
Efficiency vs Load Current
+
DB
CMDSH-3
D1
B340A
L1
1.8µH
CVCC
4.7µF
CIN
10µF
50V
×3
VIN
5V TO 28V
VOUT
2.5V
10A
+
COUT
180µF
4V
×2
M2
Si4874
1778 F01a
M1
Si4884
RON
1.4MΩ
CSS
0.1µF
ION
VIN
TG
SW
BOOST
RUN/SS
ITH
SGND INTVCC
BG
PGND
VFB
PGOOD
CB 0.22µF
RC
20k LTC1778
CC
500pF
R2
30.1k
R1
14k
LOAD CURRENT (A)
0.01
EFFICIENCY (%)
80
90
1778 F01b
70
60 0.1 110
100
V
IN
= 5V
V
OUT
= 2.5V
V
IN
= 25V
DESCRIPTIO
U
FEATURES
APPLICATIO S
U
TYPICAL APPLICATIO
U
, LTC and LT are registered trademarks of Linear Technology Corporation.
No R
SENSE
is a trademark of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
Protected by U.S. Patents, including 5481178, 6100678, 6580258, 5847554, 6304066
2
LTC1778/LTC1778-1
1778fb
Input Supply Voltage (V
IN
, I
ON
)................. 36V to –0.3V
Boosted Topside Driver Supply Voltage
(BOOST) ................................................... 42V to –0.3V
SW Voltage .................................................. 36V to –5V
EXTV
CC
, (BOOST – SW), RUN/SS,
PGOOD Voltages....................................... 7V to – 0.3V
FCB, V
ON
, V
RNG
Voltages .......... INTV
CC
+ 0.3V to –0.3V
I
TH
, V
FB
Voltages...................................... 2.7V to –0.3V
ORDER PART
NUMBER
LTC1778EGN
LTC1778IGN
T
JMAX
= 125°C, θ
JA
= 130°C/ W
ABSOLUTE AXI U RATI GS
WWWU
PACKAGE/ORDER I FOR ATIO
UU
W
GN PART MARKING
1778
1778I
TG, BG, INTV
CC
, EXTV
CC
Peak Currents.................... 2A
TG, BG, INTV
CC
, EXTV
CC
RMS Currents .............. 50mA
Operating Ambient Temperature Range (Note 4)
LTC1778E ........................................... – 40°C to 85°C
LTC1778I.......................................... – 40°C to 125°C
Junction Temperature (Note 2)............................ 125°C
Storage Temperature Range ................. – 65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
TOP VIEW
GN PACKAGE
16-LEAD PLASTIC SSOP
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
RUN/SS
PGOOD
VRNG
FCB
ITH
SGND
ION
VFB
BOOST
TG
SW
PGND
BG
INTVCC
VIN
EXTVCC
ORDER PART
NUMBER
LTC1778EGN-1
GN PART MARKING
17781
TOP VIEW
GN PACKAGE
16-LEAD PLASTIC SSOP
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
RUN/SS
VON
VRNG
FCB
ITH
SGND
ION
VFB
BOOST
TG
SW
PGND
BG
INTVCC
VIN
EXTVCC
The ● denotes specifications which apply over the full operating
temperature range, otherwise specifications are TA = 25°C. VIN = 15V unless otherwise noted.
ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Main Control Loop
I
Q
Input DC Supply Current
Normal 900 2000 µA
Shutdown Supply Current 15 30 µA
V
FB
Feedback Reference Voltage I
TH
= 1.2V (Note 3) LTC1778E ●0.792 0.800 0.808 V
I
TH
= 1.2V (Note 3) LTC1778I ●0.792 0.800 0.812 V
∆V
FB(LINEREG)
Feedback Voltage Line Regulation V
IN
= 4V to 30V, I
TH
= 1.2V (Note 3) 0.002 %/V
∆V
FB(LOADREG)
Feedback Voltage Load Regulation I
TH
= 0.5V to 1.9V (Note 3) ●– 0.05 – 0.3 %
I
FB
Feedback Input Current V
FB
= 0.8V –5 ±50 nA
g
m(EA)
Error Amplifier Transconductance I
TH
= 1.2V (Note 3) ●1.4 1.7 2 mS
V
FCB
Forced Continuous Threshold ●0.76 0.8 0.84 V
I
FCB
Forced Continuous Pin Current V
FCB
= 0.8V –1 –2 µA
t
ON
On-Time I
ON
= 30µA, V
ON
= 0V (LTC1778-1) 198 233 268 ns
I
ON
= 15µA, V
ON
= 0V (LTC1778-1) 396 466 536 ns
t
ON(MIN)
Minimum On-Time I
ON
= 180µA 50 100 ns
T
JMAX
= 125°C, θ
JA
= 130°C/ W
Consult LTC Marketing for parts specified with wider operating temperature ranges.
(Note 1)
3
LTC1778/LTC1778-1
1778fb
The ● denotes specifications which apply over the full operating
temperature range, otherwise specifications are TA = 25°C. VIN = 15V unless otherwise noted.
ELECTRICAL CHARACTERISTICS
Note 1: Absolute Maximum Ratings are those values beyond which the life of
a device may be impaired.
Note 2: T
J
is calculated from the ambient temperature T
A
and power
dissipation P
D
as follows:
LTC1778E: T
J
= T
A
+ (P
D
• 130°C/W)
Note 3: The LTC1778 is tested in a feedback loop that adjusts V
FB
to achieve
a specified error amplifier output voltage (I
TH
).
Note 4: The LTC1778E is guaranteed to meet performance specifications from
0°C to 70°C. Specifications over the –40°C to 85°C operating temperature
range are assured by design, characterization and correlation with statistical
process controls. The LTC1778I is guaranteed over the full – 40°C to 125°C
operating temperature range.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
t
OFF(MIN)
Minimum Off-Time I
ON
= 30µA 250 400 ns
V
SENSE(MAX)
Maximum Current Sense Threshold V
RNG
= 1V, V
FB
= 0.76V ●113 133 153 mV
V
PGND
– V
SW
V
RNG
= 0V, V
FB
= 0.76V ●79 93 107 mV
V
RNG
= INTV
CC
, V
FB
= 0.76V ●158 186 214 mV
V
SENSE(MIN)
Minimum Current Sense Threshold V
RNG
= 1V, V
FB
= 0.84V – 67 mV
V
PGND
– V
SW
V
RNG
= 0V, V
FB
= 0.84V – 47 mV
V
RNG
= INTV
CC
, V
FB
= 0.84V – 93 mV
∆V
FB(OV)
Output Overvoltage Fault Threshold 5.5 7.5 9.5 %
V
FB(UV)
Output Undervoltage Fault Threshold 520 600 680 mV
V
RUN/SS(ON)
RUN Pin Start Threshold ●0.8 1.5 2 V
V
RUN/SS(LE)
RUN Pin Latchoff Enable Threshold RUN/SS Pin Rising 4 4.5 V
V
RUN/SS(LT)
RUN Pin Latchoff Threshold RUN/SS Pin Falling 3.5 4.2 V
I
RUN/SS(C)
Soft-Start Charge Current V
RUN/SS
= 0V –0.5 –1.2 –3 µA
I
RUN/SS(D)
Soft-Start Discharge Current V
RUN/SS
= 4.5V, V
FB
= 0V 0.8 1.8 3 µA
V
IN(UVLO)
Undervoltage Lockout V
IN
Falling ●3.4 3.9 V
V
IN(UVLOR)
Undervoltage Lockout Release V
IN
Rising ●3.5 4 V
TG R
UP
TG Driver Pull-Up On Resistance TG High 2 3 Ω
TG R
DOWN
TG Driver Pull-Down On Resistance TG Low 2 3 Ω
BG R
UP
BG Driver Pull-Up On Resistance BG High 3 4 Ω
BG R
DOWN
BG Driver Pull-Down On Resistance BG Low 1 2 Ω
TG t
r
TG Rise Time C
LOAD
= 3300pF 20 ns
TG t
f
TG Fall Time C
LOAD
= 3300pF 20 ns
BG t
r
BG Rise Time C
LOAD
= 3300pF 20 ns
BG t
f
BG Fall Time C
LOAD
= 3300pF 20 ns
Internal V
CC
Regulator
V
INTVCC
Internal V
CC
Voltage 6V < V
IN
< 30V, V
EXTVCC
= 4V ●4.7 5 5.3 V
∆V
LDO(LOADREG)
Internal V
CC
Load Regulation I
CC
= 0mA to 20mA, V
EXTVCC
= 4V –0.1 ±2%
V
EXTVCC
EXTV
CC
Switchover Voltage I
CC
= 20mA, V
EXTVCC
Rising ●4.5 4.7 V
∆V
EXTVCC
EXTV
CC
Switch Drop Voltage I
CC
= 20mA, V
EXTVCC
= 5V 150 300 mV
∆V
EXTVCC(HYS)
EXTV
CC
Switchover Hysteresis 200 mV
PGOOD Output (LTC1778 Only)
∆V
FBH
PGOOD Upper Threshold V
FB
Rising 5.5 7.5 9.5 %
∆V
FBL
PGOOD Lower Threshold V
FB
Falling –5.5 –7.5 –9.5 %
∆V
FB(HYS)
PGOOD Hysteresis V
FB
Returning 1 2 %
V
PGL
PGOOD Low Voltage I
PGOOD
= 5mA 0.15 0.4 V
4
LTC1778/LTC1778-1
1778fb
TYPICAL PERFOR A CE CHARACTERISTICS
UW
LOAD CURRENT (A)
0.001
EFFICIENCY (%)
70
80
10
1778 G03
60
50 0.01 0.1 1
100
90 DISCONTINUOUS
MODE
CONTINUOUS
MODE
V
IN
= 10V
V
OUT
= 2.5V
EXTV
CC
= 5V
FIGURE 9 CIRCUIT
Efficiency vs Load Current Efficiency vs Input Voltage
INPUT VOLTAGE (V)
0
80
EFFICIENCY (%)
85
90
95
100
5101520
1778 G04
25 30
ILOAD = 1A
ILOAD = 10A
FCB = 5V
FIGURE 9 CIRCUIT
Frequency vs Input Voltage
INPUT VOLTAGE (V)
5
FREQUENCY (kHz)
240
260
25
1778 G05
220
200 10 15 20
300
280 I
OUT
= 10A
FCB = 0V
FIGURE 9 CIRCUIT
I
OUT
= 0A
Load Regulation
LOAD CURRENT (A)
0
∆V
OUT
(%)
–0.2
–0.1
8
1778 G06
–0.3
–0.4 24610
0FIGURE 9 CIRCUIT
ITH Voltage vs Load Current
LOAD CURRENT (A)
0
I
TH
VOLTAGE (V)
1.0
1.5
1778 G07
0.5
0510 15
2.5
2.0
CONTINUOUS
MODE
DISCONTINUOUS
MODE
FIGURE 9 CIRCUIT
Transient Response
(Discontinuous Mode)
Transient Response
V
OUT
50mV/DIV
I
L
5A/DIV
20µs/DIV 1778 G01
LOAD STEP 0A TO 10A
V
IN
= 15V
V
OUT
= 2.5V
FCB = 0V
FIGURE 9 CIRCUIT
V
OUT
50mV/DIV
I
L
5A/DIV
20µs/DIV 1778 G02
LOAD STEP 1A TO 10A
V
IN
= 15V
V
OUT
= 2.5V
FCB = INTV
CC
FIGURE 9 CIRCUIT
Start-Up
RUN/SS
2V/DIV
I
L
5A/DIV
50ms/DIV 1778 G19
V
IN
= 15V
V
OUT
= 2.5V
R
LOAD
= 0.25Ω
V
OUT
1V/DIV
LOAD CURRENT (A)
0
0
FREQUENCY (kHz)
50
100
150
200
250
300
2468
1778 G26
10
CONTINUOUS MODE
DISCONTINUOUS
MODE
Frequency vs Load Current
5
LTC1778/LTC1778-1
1778fb
TYPICAL PERFOR A CE CHARACTERISTICS
UW
Maximum Current Sense
Threshold vs Temperature
Maximum Current Sense
Threshold vs VRNG Voltage
Feedback Reference Voltage
vs Temperature
VRNG VOLTAGE (V)
0.5
0
MAXIMUM CURRENT SENSE THRESHOLD (mV)
50
100
150
200
300
0.75 1.0 1.25 1.5
1778 G10
1.75 2.0
250
TEMPERATURE (°C)
–50 –25
100
MAXIMUM CURRENT SENSE THRESHOLD (mV)
120
150
050 75
1778 G11
110
140
130
25 100 125
V
RNG
= 1V
TEMPERATURE (°C)
–50
0.78
FEEDBACK REFERENCE VOLTAGE (V)
0.79
0.80
0.81
0.82
–25 0 25 50
1778 G12
75 100 125
Current Limit Foldback
V
FB
(V)
0
0
MAXIMUM CURRENT SENSE THRESHOLD (mV)
25
50
75
100
125
150 V
RNG
= 1V
0.2 0.4 0.6 0.8
1778 G09
On-Time vs ION Current
I
ON
CURRENT (µA)
1
10
ON-TIME (ns)
100
1k
10k
10 100
1778 G20
V
VON
= 0V
V
ON
VOLTAGE (V)
0
ON-TIME (ns)
400
600
1778 G21
200
0123
1000 I
ION
= 30µA
800
TEMPERATURE (°C)
–50
ON-TIME (ns)
200
250
300
25 75
1778 G22
150
100
–25 0 50 100 125
50
0
I
ION
= 30µA
V
VON
= 0V
On-Time vs VON Voltage
On-Time vs Temperature
RUN/SS VOLTAGE (V)
1.5
0
MAXIMUM CURRENT SENSE THRESHOLD (mV)
25
50
75
100
125
150 V
RNG
= 1V
2 2.5 3 3.5
1778 G23
Maximum Current Sense
Threshold vs RUN/SS Voltage
Current Sense Threshold
vs ITH Voltage
I
TH
VOLTAGE (V)
0
–200
CURRENT SENSE THRESHOLD (mV)
–100
0
100
200
300
0.5 1.0 1.5 2.0
1778 G08
2.5 3.0
V
RNG
=
1V
0.7V
0.5V
1.4V
2V
6
LTC1778/LTC1778-1
1778fb
FCB Pin Current vs Temperature
RUN/SS Pin Current
vs Temperature
RUN/SS Latchoff Thresholds
vs Temperature
Undervoltage Lockout Threshold
vs Temperature
TEMPERATURE (°C)
–50
FCB PIN CURRENT (µA)
–0.50
–0.25
0
25 75
1778 G15
–0.75
–1.00
–25 0 50 100 125
–1.25
–1.50
TEMPERATURE (°C)
–50 –25
–2
FCB PIN CURRENT (µA)
0
3
050 75
1778 G16
–1
2
1
25 100 125
PULL-UP CURRENT
PULL-DOWN CURRENT
TEMPERATURE (°C)
–50
3.0
RUN/SS THRESHOLD (V)
3.5
4.0
4.5
5.0
–25 0 25 50
1778 G17
75 100 125
LATCHOFF ENABLE
LATCHOFF THRESHOLD
TEMPERATURE (C)
–50
2.0
UNDERVOLTAGE LOCKOUT THRESHOLD (V)
2.5
3.0
3.5
4.0
–25 0 25 50
1778 G18
75 100 125
TYPICAL PERFOR A CE CHARACTERISTICS
UW
EXTVCC Switch Resistance
vs Temperature
TEMPERATURE (°C)
–50 –25
0
EXTVCC SWITCH RESISTANCE (Ω)
4
10
050 75
1778 G14
2
8
6
25 100 125
INPUT VOLTAGE (V)
0
INPUT CURRENT (µA)
SHUTDOWN CURRENT (µA)
800
1000
1200
15 25
1778 G24
600
400
510 20 30 35
200
0
30
40
60
50
20
10
0
EXTVCC OPEN
EXTVCC = 5V
SHUTDOWN
INTV
CC
LOAD CURRENT (mA)
0
∆INTV
CC
(%)
–0.2
–0.1
0
40
1778 G25
–0.3
–0.4
–0.5 10 20 30 50
Input and Shutdown Currents
vs Input Voltage INTVCC Load Regulation
Error Amplifier gm vs Temperature
TEMPERATURE (°C)
–50 –25
1.0
g
m
(mS)
1.4
2.0
050 75
1778 G13
1.2
1.8
1.6
25 100 125
7
LTC1778/LTC1778-1
1778fb
UU
U
PI FU CTIO S
RUN/SS (Pin 1): Run Control and Soft-Start Input. A
capacitor to ground at this pin sets the ramp time to full
output current (approximately 3s/µF) and the time delay
for overcurrent latchoff (see Applications Information).
Forcing this pin below 0.8V shuts down the device.
PGOOD (Pin 2, LTC1778): Power Good Output. Open
drain logic output that is pulled to ground when the output
voltage is not within ±7.5% of the regulation point.
V
ON
(Pin 2, LTC1778-1): On-Time Voltage Input. Voltage
trip point for the on-time comparator. Tying this pin to the
output voltage or an external resistive divider from the
output makes the on-time proportional to V
OUT
. The
comparator input defaults to 0.7V when the pin is grounded
or unavailable (LTC1778) and defaults to 2.4V when the
pin is tied to INTV
CC
. Tie this pin to INTV
CC
in high V
OUT
applications to use a lower R
ON
value.
V
RNG
(Pin 3): Sense Voltage Range Input. The voltage at
this pin is ten times the nominal sense voltage at maxi-
mum output current and can be set from 0.5V to 2V by a
resistive divider from INTV
CC
. The nominal sense voltage
defaults to 70mV when this pin is tied to ground, 140mV
when tied to INTV
CC
.
FCB (Pin 4): Forced Continuous Input. Tie this pin to
ground to force continuous synchronous operation at low
load, to INTV
CC
to enable discontinuous mode operation
at low load or to a resistive divider from a secondary output
when using a secondary winding.
I
TH
(Pin 5): Current Control Threshold and Error Amplifier
Compensation Point. The current comparator threshold
increases with this control voltage. The voltage ranges
from 0V to 2.4V with 0.8V corresponding to zero sense
voltage (zero current).
SGND (Pin 6): Signal Ground. All small-signal compo-
nents and compensation components should connect to
this ground, which in turn connects to PGND at one point.
I
ON
(Pin 7): On-Time Current Input. Tie a resistor from V
IN
to this pin to set the one-shot timer current and thereby set
the switching frequency.
V
FB
(Pin 8): Error Amplifier Feedback Input. This pin
connects the error amplifier input to an external resistive
divider from V
OUT
.
EXTV
CC
(Pin 9): External V
CC
Input. When EXTV
CC
ex-
ceeds 4.7V, an internal switch connects this pin to INTV
CC
and shuts down the internal regulator so that controller
and gate drive power is drawn from EXTV
CC
. Do not exceed
7V at this pin and ensure that EXTV
CC
< V
IN
.
V
IN
(Pin 10): Main Input Supply. Decouple this pin to
PGND with an RC filter (1Ω, 0.1µF).
INTV
CC
(Pin 11): Internal 5V Regulator Output. The driver
and control circuits are powered from this voltage. De-
couple this pin to power ground with a minimum of 4.7µF
low ESR tantalum capacitor.
BG (Pin 12): Bottom Gate Drive. Drives the gate of the
bottom N-channel MOSFET between ground and INTV
CC
.
PGND (Pin 13): Power Ground. Connect this pin closely to
the source of the bottom N-channel MOSFET, the (–)
terminal of C
VCC
and the (–) terminal of C
IN
.
SW (Pin 14): Switch Node. The (–) terminal of the boot-
strap capacitor C
B
connects here. This pin swings from a
diode voltage drop below ground up to V
IN
.
TG (Pin 15): Top Gate Drive. Drives the top N-channel
MOSFET with a voltage swing equal to INTV
CC
superim-
posed on the switch node voltage SW.
BOOST (Pin 16): Boosted Floating Driver Supply. The (+)
terminal of the bootstrap capacitor C
B
connects here. This
pin swings from a diode voltage drop below INTV
CC
up to
V
IN
+ INTV
CC
.
8
LTC1778/LTC1778-1
1778fb
FU CTIO AL DIAGRA
UU
W
1.4V
0.7V
V
RNG
3
+
–
+
–+
–+
–+
–
+
7I
ON
V
ON
**
0.7V
2
2.4V
4FCB 9EXTV
CC
10 V
IN
1µA
R
ON
V
VON
I
ION
t
ON
= (10pF) R
SQ
20k
I
CMP
I
REV
×
Q6
1V
3.3µA
SHDN
SWITCH
LOGIC
BG
ON
FCNT
F
0.8V
–
+
4.7V
OV
1
240k
Q1
Q2
Q3
0.8V
0.6V
0.6V
I
TH
R
C
C
C1
EA
SS
0.8V
LTC1778
LTC1778-1
*
**
Q4
+
–
+
–
×4
Q5
5RUN/SS C
SS
1
1778 FD
SGND
R2
R1
6
8
RUN
SHDN
12
PGND
13
PGOOD*
V
FB
INTV
CC
11
SW
14
TG C
B
V
IN
C
IN
15
BOOST
16
–
+
–
+
UV
0.74V
OV
0.86V
C
VCC
V
OUT
M2
M1
L1
C
OUT
+
0.8V
REF
5V
REG
1.2µA
6V
D
B
I
THB
1
2
9
LTC1778/LTC1778-1
1778fb
OPERATIO
U
Main Control Loop
The LTC1778 is a current mode controller for DC/DC
step-down converters. In normal operation, the top
MOSFET is turned on for a fixed interval determined by a
one-shot timer OST. When the top MOSFET is turned off,
the bottom MOSFET is turned on until the current com-
parator I
CMP
trips, restarting the one-shot timer and initi-
ating the next cycle. Inductor current is determined by
sensing the voltage between the PGND and SW pins using
the bottom MOSFET on-resistance . The voltage on the I
TH
pin sets the comparator threshold corresponding to in-
ductor valley current. The error amplifier EA adjusts this
voltage by comparing the feedback signal V
FB
from the
output voltage with an internal 0.8V reference. If the load
current increases, it causes a drop in the feedback voltage
relative to the reference. The I
TH
voltage then rises until the
average inductor current again matches the load current.
At low load currents, the inductor current can drop to zero
and become negative. This is detected by current reversal
comparator I
REV
which then shuts off M2, resulting in
discontinuous operation. Both switches will remain off
with the output capacitor supplying the load current until
the I
TH
voltage rises above the zero current level (0.8V) to
initiate another cycle. Discontinuous mode operation is
disabled by comparator F when the FCB pin is brought
below 0.8V, forcing continuous synchronous operation.
The operating frequency is determined implicitly by the
top MOSFET on-time and the duty cycle required to
maintain regulation. The one-shot timer generates an on-
time that is proportional to the ideal duty cycle, thus
holding frequency approximately constant with changes
in V
IN
. The nominal frequency can be adjusted with an
external resistor R
ON
.
Overvoltage and undervoltage comparators OV and UV
pull the PGOOD output low if the output feedback voltage
exits a ±7.5% window around the regulation point.
Furthermore, in an overvoltage condition, M1 is turned off
and M2 is turned on and held on until the overvoltage
condition clears.
Foldback current limiting is provided if the output is
shorted to ground. As V
FB
drops, the buffered current
threshold voltage I
THB
is pulled down by clamp Q3 to a 1V
level set by Q4 and Q6. This reduces the inductor valley
current level to one sixth of its maximum value as V
FB
approaches 0V.
Pulling the RUN/SS pin low forces the controller into its
shutdown state, turning off both M1 and M2. Releasing
the pin allows an internal 1.2µA current source to charge
up an external soft-start capacitor C
SS
. When this voltage
reaches 1.5V, the controller turns on and begins switch-
ing, but with the I
TH
voltage clamped at approximately
0.6V below the RUN/SS voltage. As C
SS
continues to
charge, the soft-start current limit is removed.
INTV
CC
/EXTV
CC
Power
Power for the top and bottom MOSFET drivers and most
of the internal controller circuitry is derived from the
INTV
CC
pin. The top MOSFET driver is powered from a
floating bootstrap capacitor C
B
. This capacitor is re-
charged from INTV
CC
through an external Schottky diode
D
B
when the top MOSFET is turned off. When the EXTV
CC
pin is grounded, an internal 5V low dropout regulator
supplies the INTV
CC
power from V
IN
. If EXTV
CC
rises
above 4.7V, the internal regulator is turned off, and an
internal switch connects EXTV
CC
to INTV
CC
. This allows
a high efficiency source connected to EXTV
CC
, such as an
external 5V supply or a secondary output from the
converter, to provide the INTV
CC
power. Voltages up to
7V can be applied to EXTV
CC
for additional gate drive. If
the input voltage is low and INTV
CC
drops below 3.5V,
undervoltage lockout circuitry prevents the power
switches from turning on.
10
LTC1778/LTC1778-1
1778fb
APPLICATIO S I FOR ATIO
WUUU
The basic LTC1778 application circuit is shown in
Figure 1. External component selection is primarily de-
termined by the maximum load current and begins with
the selection of the sense resistance and power MOSFET
switches. The LTC1778 uses the on-resistance of the
synchronous power MOSFET for determining the induc-
tor current. The desired amount of ripple current and
operating frequency largely determines the inductor value.
Finally, C
IN
is selected for its ability to handle the large
RMS current into the converter and C
OUT
is chosen with
low enough ESR to meet the output voltage ripple and
transient specification.
Choosing the LTC1778 or LTC1778-1
The LTC1778 has an open-drain PGOOD output that
indicates when the output voltage is within ±7.5
% of the
regulation point. The LTC1778-1 trades the PGOOD pin for
a V
ON
pin that allows the on-time to be adjusted. Tying the
V
ON
pin high results in lower values for R
ON
which is useful
in high V
OUT
applications. The V
ON
pin also provides a
means to adjust the on-time to maintain constant fre-
quency operation in applications where V
OUT
changes and
to correct minor frequency shifts with changes in load
current. Finally, the V
ON
pin can be used to provide
additional current limiting in positive-to-negative convert-
ers and as a control input to synchronize the switching
frequency with a phase locked loop.
Maximum Sense Voltage and V
RNG
Pin
Inductor current is determined by measuring the voltage
across a sense resistance that appears between the PGND
and SW pins. The maximum sense voltage is set by the
voltage applied to the V
RNG
pin and is equal to approxi-
mately (0.133)V
RNG
. The current mode control loop will
not allow the inductor current valleys to exceed
(0.133)V
RNG
/R
SENSE
. In practice, one should allow some
margin for variations in the LTC1778 and external compo-
nent values and a good guide for selecting the sense
resistance is:
RV
I
SENSE RNG
OUT MAX
=10 • ()
An external resistive divider from INTV
CC
can be used to
set the voltage of the V
RNG
pin between 0.5V and 2V
resulting in nominal sense voltages of 50mV to 200mV.
Additionally, the V
RNG
pin can be tied to SGND or INTV
CC
in which case the nominal sense voltage defaults to 70mV
or 140mV, respectively. The maximum allowed sense
voltage is about 1.33 times this nominal value.
Power MOSFET Selection
The LTC1778 requires two external N-channel power
MOSFETs, one for the top (main) switch and one for the
bottom (synchronous) switch. Important parameters for
the power MOSFETs are the breakdown voltage V
(BR)DSS
,
threshold voltage V
(GS)TH
, on-resistance R
DS(ON)
, reverse
transfer capacitance C
RSS
and maximum current I
DS(MAX)
.
The gate drive voltage is set by the 5V INTV
CC
supply.
Consequently, logic-level threshold MOSFETs must be
used in LTC1778 applications. If the input voltage is
expected to drop below 5V, then sub-logic level threshold
MOSFETs should be considered.
When the bottom MOSFET is used as the current sense
element, particular attention must be paid to its on-
resistance. MOSFET on-resistance is typically specified
with a maximum value R
DS(ON)(MAX)
at 25°C. In this case,
additional margin is required to accommodate the rise in
MOSFET on-resistance with temperature:
RR
DS ON MAX SENSE
T
()( )
=ρ
The ρ
T
term is a normalization factor (unity at 25°C)
accounting for the significant variation in on-resistance
Figure 2. RDS(ON) vs. Temperature
JUNCTION TEMPERATURE (°C)
–50
ρT
NORMALIZED ON-RESISTANCE
1.0
1.5
150
1778 F02
0.5
0050 100
2.0
11
LTC1778/LTC1778-1
1778fb
APPLICATIO S I FOR ATIO
WUUU
with temperature, typically about 0.4%/°C as shown in
Figure 2. For a maximum junction temperature of 100°C,
using a value ρ
T
= 1.3 is reasonable.
The power dissipated by the top and bottom MOSFETs
strongly depends upon their respective duty cycles and
the load current. When the LTC1778 is operating in
continuous mode, the duty cycles for the MOSFETs are:
DV
V
DVV
V
TOP OUT
IN
BOT IN OUT
IN
=
=–
The resulting power dissipation in the MOSFETs at maxi-
mum output current are:
P
TOP
= D
TOP
I
OUT(MAX)2
ρ
T(TOP)
R
DS(ON)(MAX)
+ k V
IN2
I
OUT(MAX)
C
RSS
f
P
BOT
= D
BOT
I
OUT(MAX)2
ρ
T(BOT)
R
DS(ON)(MAX)
Both MOSFETs have I
2
R losses and the top MOSFET
includes an additional term for transition losses, which are
largest at high input voltages. The constant k = 1.7A
–1
can
be used to estimate the amount of transition loss. The
bottom MOSFET losses are greatest when the bottom duty
cycle is near 100%, during a short-circuit or at high input
voltage.
Operating Frequency
The choice of operating frequency is a tradeoff between
efficiency and component size. Low frequency operation
improves efficiency by reducing MOSFET switching losses
but requires larger inductance and/or capacitance in order
to maintain low output ripple voltage.
The operating frequency of LTC1778 applications is deter-
mined implicitly by the one-shot timer that controls the
on-time t
ON
of the top MOSFET switch. The on-time is set
by the current into the I
ON
pin and the voltage at the V
ON
pin (LTC1778-1) according to:
tV
IpF
ON VON
ION
=()10
V
ON
defaults to 0.7V in the LTC1778.
Tying a resistor R
ON
from V
IN
to the I
ON
pin yields an on-
time inversely proportional to V
IN
. For a step-down con-
verter, this results in approximately constant frequency
operation as the input supply varies:
fV
VR pF
H
OUT
VON ON Z
=()
[]
10
To hold frequency constant during output voltage changes,
tie the V
ON
pin to V
OUT
or to a resistive divider from V
OUT
when V
OUT
> 2.4V. The V
ON
pin has internal clamps that
limit its input to the one-shot timer. If the pin is tied below
0.7V, the input to the one-shot is clamped at 0.7V. Simi-
larly, if the pin is tied above 2.4V, the input is clamped at
2.4V. In high V
OUT
applications, tying V
ON
to INTV
CC
so
that the comparator input is 2.4V results in a lower value
for R
ON
. Figures 3a and 3b show how R
ON
relates to
switching frequency for several common output voltages.
R
ON
(kΩ)
100
100
SWITCHING FREQUENCY (kHz)
1000
1000 10000
1778 F03a
V
OUT
= 3.3V
V
OUT
= 1.5V V
OUT
= 2.5V
R
ON
(kΩ)
100
100
SWITCHING FREQUENCY (kHz)
1000
1000 10000
1778 F03b
V
OUT
= 3.3V
V
OUT
= 12V
V
OUT
= 5V
Figure 3a. Switching Frequency vs RON
for the LTC1778 and LTC1778-1 (VON = 0V)
Figure 3b. Switching Frequency vs RON
for the LTC1778-1 (VON = INTVCC)
12
LTC1778/LTC1778-1
1778fb
Because the voltage at the I
ON
pin is about 0.7V, the
current into this pin is not exactly inversely proportional to
V
IN
, especially in applications with lower input voltages.
To correct for this error, an additional resistor R
ON2
connected from the I
ON
pin to the 5V INTV
CC
supply will
further stabilize the frequency.
RV
VR
ON ON25
07
=.
Changes in the load current magnitude will also cause
frequency shift. Parasitic resistance in the MOSFET
switches and inductor reduce the effective voltage across
the inductance, resulting in increased duty cycle as the
load current increases. By lengthening the on-time slightly
as current increases, constant frequency operation can be
maintained. This is accomplished with a resistive divider
from the I
TH
pin to the V
ON
pin and V
OUT
. The values
required will depend on the parasitic resistances in the
specific application. A good starting point is to feed about
25% of the voltage change at the I
TH
pin to the V
ON
pin as
shown in Figure 4a. Place capacitance on the V
ON
pin to
filter out the I
TH
variations at the switching frequency. The
resistor load on I
TH
reduces the DC gain of the error amp
and degrades load regulation, which can be avoided by
using the PNP emitter follower of Figure 4b.
Minimum Off-time and Dropout Operation
The minimum off-time t
OFF(MIN)
is the smallest amount of
time that the LTC1778 is capable of turning on the bottom
MOSFET, tripping the current comparator and turning the
MOSFET back off. This time is generally about 250ns. The
minimum off-time limit imposes a maximum duty cycle of
t
ON
/(t
ON
+ t
OFF(MIN)
). If the maximum duty cycle is reached,
due to a dropping input voltage for example, then the
output will drop out of regulation. The minimum input
voltage to avoid dropout is:
VV
tt
t
IN MIN OUT ON OFF MIN
ON
() ()
=+
A plot of maximum duty cycle vs frequency is shown in
Figure 5.
Inductor Selection
Given the desired input and output voltages, the inductor
value and operating frequency determine the ripple
current:
∆=⎛
⎝
⎜
⎞
⎠
⎟−
⎛
⎝
⎜
⎞
⎠
⎟
IV
fL
V
V
LOUT OUT
IN
1
Lower ripple current reduces core losses in the inductor,
ESR losses in the output capacitors and output voltage
APPLICATIO S I FOR ATIO
WUUU
CVON
0.01µF
RVON2
100k
RVON1
30k
CC
VOUT
RC
(4a) (4b)
VON
ITH
LTC1778
CVON
0.01µF
RVON2
10k
Q1
2N5087
RVON1
3k
10k
CC1778 F04
VOUT
INTVCC RC
VON
ITH
LTC1778
Figure 4. Correcting Frequency Shift with Load Current Changes
2.0
1.5
1.0
0.5
0
0 0.25 0.50 0.75
1778 F05
1.0
DROPOUT
REGION
DUTY CYCLE (VOUT/VIN)
SWITCHING FREQUENCY (MHz)
Figure 5. Maximum Switching Frequency vs Duty Cycle
13
LTC1778/LTC1778-1
1778fb
ripple. Highest efficiency operation is obtained at low
frequency with small ripple current. However, achieving
this requires a large inductor. There is a tradeoff between
component size, efficiency and operating frequency.
A reasonable starting point is to choose a ripple current
that is about 40% of I
OUT(MAX)
. The largest ripple current
occurs at the highest V
IN
. To guarantee that ripple current
does not exceed a specified maximum, the inductance
should be chosen according to:
LV
fI
V
V
OUT
LMAX
OUT
IN MAX
=⎛
⎝
⎜
⎞
⎠
⎟−
⎛
⎝
⎜
⎞
⎠
⎟
∆() ()
1
Once the value for L is known, the type of inductor must
be selected. High efficiency converters generally cannot
afford the core loss found in low cost powdered iron
cores, forcing the use of more expensive ferrite, molyper-
malloy or Kool Mµ
®
cores. A variety of inductors designed
for high current, low voltage applications are available
from manufacturers such as Sumida, Panasonic, Coil-
tronics, Coilcraft and Toko.
Schottky Diode D1 Selection
The Schottky diode D1 shown in Figure 1 conducts during
the dead time between the conduction of the power
MOSFET switches. It is intended to prevent the body diode
of the bottom MOSFET from turning on and storing charge
during the dead time, which can cause a modest (about
1%) efficiency loss. The diode can be rated for about one
half to one fifth of the full load current since it is on for only
a fraction of the duty cycle. In order for the diode to be
effective, the inductance between it and the bottom MOS-
FET must be as small as possible, mandating that these
components be placed adjacently. The diode can be omit-
ted if the efficiency loss is tolerable.
C
IN
and C
OUT
Selection
The input capacitance C
IN
is required to filter the square
wave current at the drain of the top MOSFET. Use a low
ESR capacitor sized to handle the maximum RMS current.
II V
V
V
V
RMS OUT MAX OUT
IN
IN
OUT
≅() –1
This formula has a maximum at V
IN
= 2V
OUT
, where
I
RMS
= I
OUT(MAX)
/ 2. This simple worst-case condition is
commonly used for design because even significant
deviations do not offer much relief. Note that ripple
current ratings from capacitor manufacturers are often
based on only 2000 hours of life which makes it advisable
to derate the capacitor.
The selection of C
OUT
is primarily determined by the ESR
required to minimize voltage ripple and load step
transients. The output ripple ∆V
OUT
is approximately
bounded by:
∆≤∆ +
⎛
⎝
⎜
⎞
⎠
⎟
V I ESR fC
OUT L
OUT
1
8
Since ∆I
L
increases with input voltage, the output ripple is
highest at maximum input voltage. Typically, once the ESR
requirement is satisfied, the capacitance is adequate for
filtering and has the necessary RMS current rating.
Multiple capacitors placed in parallel may be needed to
meet the ESR and RMS current handling requirements.
Dry tantalum, special polymer, aluminum electrolytic and
ceramic capacitors are all available in surface mount
packages. Special polymer capacitors offer very low ESR
but have lower capacitance density than other types.
Tantalum capacitors have the highest capacitance density
but it is important to only use types that have been surge
tested for use in switching power supplies. Aluminum
electrolytic capacitors have significantly higher ESR, but
can be used in cost-sensitive applications providing that
consideration is given to ripple current ratings and long
term reliability. Ceramic capacitors have excellent low
ESR characteristics but can have a high voltage coefficient
and audible piezoelectric effects. The high Q of ceramic
capacitors with trace inductance can also lead to signifi-
cant ringing. When used as input capacitors, care must be
taken to ensure that ringing from inrush currents and
switching does not pose an overvoltage hazard to the
power switches and controller. To dampen input voltage
transients, add a small 5µF to 50µF aluminum electrolytic
capacitor with an ESR in the range of 0.5Ω to 2Ω. High
performance through-hole capacitors may also be used,
APPLICATIO S I FOR ATIO
WUUU
Kool Mµ is a registered trademark of Magnetics, Inc.
14
LTC1778/LTC1778-1
1778fb
but an additional ceramic capacitor in parallel is recom-
mended to reduce the effect of their lead inductance.
Top MOSFET Driver Supply (C
B
, D
B
)
An external bootstrap capacitor C
B
connected to the BOOST
pin supplies the gate drive voltage for the topside MOSFET.
This capacitor is charged through diode D
B
from INTV
CC
when the switch node is low. When the top MOSFET turns
on, the switch node rises to V
IN
and the BOOST pin rises
to approximately V
IN
+ INTV
CC
. The boost capacitor needs
to store about 100 times the gate charge required by the
top MOSFET. In most applications 0.1µF to 0.47µF, X5R or
X7R dielectric capacitor is adequate.
Discontinuous Mode Operation and FCB Pin
The FCB pin determines whether the bottom MOSFET
remains on when current reverses in the inductor. Tying
this pin above its 0.8V threshold enables discontinuous
operation where the bottom MOSFET turns off when
inductor current reverses. The load current at which
current reverses and discontinuous operation begins de-
pends on the amplitude of the inductor ripple current and
will vary with changes in V
IN
. Tying the FCB pin below the
0.8V threshold forces continuous synchronous operation,
allowing current to reverse at light loads and maintaining
high frequency operation.
In addition to providing a logic input to force continuous
operation, the FCB pin provides a means to maintain a
flyback winding output when the primary is operating in
discontinuous mode. The secondary output V
OUT2
is nor-
mally set as shown in Figure 6 by the turns ratio N of the
transformer. However, if the controller goes into discon-
tinuous mode and halts switching due to a light primary
load current, then V
OUT2
will droop. An external resistor
divider from V
OUT2
to the FCB pin sets a minimum voltage
V
OUT2(MIN)
below which continuous operation is forced
until V
OUT2
has risen above its minimum.
VV
R
R
OUT MIN2 08 1 4
3
() .=+
⎛
⎝
⎜
⎞
⎠
⎟
Fault Conditions: Current Limit and Foldback
The maximum inductor current is inherently limited in a
current mode controller by the maximum sense voltage. In
the LTC1778, the maximum sense voltage is controlled by
the voltage on the V
RNG
pin. With valley current control,
the maximum sense voltage and the sense resistance
determine the maximum allowed inductor valley current.
The corresponding output current limit is:
IV
RI
LIMIT SNS MAX
DS ON T
L
=+∆
()
()
ρ
1
2
The current limit value should be checked to ensure that
I
LIMIT(MIN)
> I
OUT(MAX)
. The minimum value of current limit
generally occurs with the largest V
IN
at the highest ambi-
ent temperature, conditions that cause the largest power
loss in the converter. Note that it is important to check for
self-consistency between the assumed MOSFET junction
temperature and the resulting value of I
LIMIT
which heats
the MOSFET switches.
Caution should be used when setting the current limit
based upon the R
DS(ON)
of the MOSFETs. The maximum
current limit is determined by the minimum MOSFET on-
resistance. Data sheets typically specify nominal and
maximum values for R
DS(ON)
, but not a minimum. A
reasonable assumption is that the minimum R
DS(ON)
lies
the same amount below the typical value as the maximum
lies above it. Consult the MOSFET manufacturer for further
guidelines.
To further limit current in the event of a short circuit to
ground, the LTC1778 includes foldback current limiting. If
the output falls by more than 25%, then the maximum
sense voltage is progressively lowered to about one sixth
of its full value.
APPLICATIO S I FOR ATIO
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Figure 6. Secondary Output Loop and EXTVCC Connection
V
IN
LTC1778
SGND
FCB
EXTV
CC
TG
SW
OPTIONAL
EXTV
CC
CONNECTION
5V < V
OUT2
< 7V
R3
R4
1778 F06
T1
1:N
BG
PGND
+
C
OUT2
1µFV
OUT1
V
OUT2
V
IN
+
C
IN
1N4148
•
•
+
C
OUT
15
LTC1778/LTC1778-1
1778fb
INTV
CC
Regulator
An internal P-channel low dropout regulator produces the
5V supply that powers the drivers and internal circuitry
within the LTC1778. The INTV
CC
pin can supply up to
50mA RMS and must be bypassed to ground with a
minimum of 4.7µF low ESR tantalum capacitor. Good
bypassing is necessary to supply the high transient cur-
rents required by the MOSFET gate drivers. Applications
using large MOSFETs with a high input voltage and high
frequency of operation may cause the LTC1778 to exceed
its maximum junction temperature rating or RMS current
rating. Most of the supply current drives the MOSFET
gates unless an external EXTV
CC
source is used. In con-
tinuous mode operation, this current is I
GATECHG
= f(Q
g(TOP)
+ Q
g(BOT)
). The junction temperature can be estimated
from the equations given in Note 2 of the Electrical
Characteristics. For example, the LTC1778CGN is limited
to less than 14mA from a 30V supply:
T
J
= 70°C + (14mA)(30V)(130°C/W) = 125°C
For larger currents, consider using an external supply with
the EXTV
CC
pin.
EXTV
CC
Connection
The EXTV
CC
pin can be used to provide MOSFET gate drive
and control power from the output or another external
source during normal operation. Whenever the EXTV
CC
pin is above 4.7V the internal 5V regulator is shut off and
an internal 50mA P-channel switch connects the EXTV
CC
pin to INTV
CC
. INTV
CC
power is supplied from EXTV
CC
until
this pin drops below 4.5V. Do not apply more than 7V to
the EXTV
CC
pin and ensure that EXTV
CC
≤ V
IN
. The follow-
ing list summarizes the possible connections for EXTV
CC
:
1. EXTV
CC
grounded. INTV
CC
is always powered from the
internal 5V regulator.
2. EXTV
CC
connected to an external supply. A high effi-
ciency supply compatible with the MOSFET gate drive
requirements (typically 5V) can improve overall
efficiency.
3. EXTV
CC
connected to an output derived boost network.
The low voltage output can be boosted using a charge
pump or flyback winding to greater than 4.7V. The system
APPLICATIO S I FOR ATIO
WUUU
will start-up using the internal linear regulator until the
boosted output supply is available.
External Gate Drive Buffers
The LTC1778 drivers are adequate for driving up to about
30nC into MOSFET switches with RMS currents of 50mA.
Applications with larger MOSFET switches or operating at
frequencies requiring greater RMS currents will benefit
from using external gate drive buffers such as the LTC1693.
Alternately, the external buffer circuit shown in Figure 7
can be used. Note that the bipolar devices reduce the
signal swing at the MOSFET gate, and benefit from an
increased EXTV
CC
voltage of about 6V.
Figure 7. Optional External Gate Driver
Q1
FMMT619
GATE
OF M1
TG
BOOST
SW
Q2
FMMT720
Q3
FMMT619
GATE
OF M2
BG
1778 F07
INTVCC
PGND
Q4
FMMT720
10Ω10Ω
Soft-Start and Latchoff with the RUN/SS Pin
The RUN/SS pin provides a means to shut down the
LTC1778 as well as a timer for soft-start and overcurrent
latchoff. Pulling the RUN/SS pin below 0.8V puts the
LTC1778 into a low quiescent current shutdown (I
Q
<
30µA). Releasing the pin allows an internal 1.2µA current
source to charge up the external timing capacitor C
SS
. If
RUN/SS has been pulled all the way to ground, there is a
delay before starting of about:
tV
ACsFC
DELAY SS SS
=µ=µ
()
15
12 13
.
../
When the voltage on RUN/SS reaches 1.5V, the LTC1778
begins operating with a clamp on I
TH
of approximately
0.9V. As the RUN/SS voltage rises to 3V, the clamp on I
TH
is raised until its full 2.4V range is available. This takes an
additional 1.3s/µF, during which the load current is folded
back until the output reaches 75% of its final value. The pin
can be driven from logic as shown in Figure 7. Diode D1
16
LTC1778/LTC1778-1
1778fb
reduces the start delay while allowing C
SS
to charge up
slowly for the soft-start function.
After the controller has been started and given adequate
time to charge up the output capacitor, C
SS
is used as a
short-circuit timer. After the RUN/SS pin charges above
4V, if the output voltage falls below 75% of its regulated
value, then a short-circuit fault is assumed. A 1.8µA cur-
rent then begins discharging C
SS
. If the fault condition
persists until the RUN/SS pin drops to 3.5V, then the con-
troller turns off both power MOSFETs, shutting down the
converter permanently. The RUN/SS pin must be actively
pulled down to ground in order to restart operation.
The overcurrent protection timer requires that the soft-start
timing capacitor C
SS
be made large enough to guarantee
that the output is in regulation by the time C
SS
has reached
the 4V threshold. In general, this will depend upon the size
of the output capacitance, output voltage and load current
characteristic. A minimum soft-start capacitor can be
estimated from:
C
SS
> C
OUT
V
OUT
R
SENSE
(10
–4
[F/V s])
Generally 0.1µF is more than sufficient.
Overcurrent latchoff operation is not always needed or
desired. Load current is already limited during a short-
circuit by the current foldback circuitry and latchoff
operation can prove annoying during troubleshooting.
The feature can be overridden by adding a pull-up current
greater than 5µA to the RUN/SS pin. The additional
current prevents the discharge of CSS during a fault and
also shortens the soft-start period. Using a resistor to VIN
as shown in Figure 8a is simple, but slightly increases
shutdown current. Connecting a resistor to INTVCC as
shown in Figure 8b eliminates the additional shutdown
current, but requires a diode to isolate CSS . Any pull-up
network must be able to pull RUN/SS above the 4.2V
maximum threshold of the latchoff circuit and overcome
the 4µA maximum discharge current.
Efficiency Considerations
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Although all dissipative
elements in the circuit produce losses, four main sources
account for most of the losses in LTC1778 circuits:
1. DC I
2
R losses. These arise from the resistances of the
MOSFETs, inductor and PC board traces and cause the
efficiency to drop at high output currents. In continuous
mode the average output current flows through L, but is
chopped between the top and bottom MOSFETs. If the two
MOSFETs have approximately the same R
DS(ON)
, then the
resistance of one MOSFET can simply be summed with the
resistances of L and the board traces to obtain the DC I
2
R
loss. For example, if R
DS(ON)
= 0.01Ω and R
L
= 0.005Ω, the
loss will range from 15mW to 1.5W as the output current
varies from 1A to 10A.
2. Transition loss. This loss arises from the brief amount
of time the top MOSFET spends in the saturated region
during switch node transitions. It depends upon the input
voltage, load current, driver strength and MOSFET
capacitance, among other factors. The loss is significant
at input voltages above 20V and can be estimated from:
Transition Loss ≅ (1.7A
–1
) V
IN2
I
OUT
C
RSS
f
3. INTV
CC
current. This is the sum of the MOSFET driver
and control currents. This loss can be reduced by supply-
ing INTV
CC
current through the EXTV
CC
pin from a high
efficiency source, such as an output derived boost net-
work or alternate supply if available.
4. C
IN
loss. The input capacitor has the difficult job of
filtering the large RMS input current to the regulator. It
must have a very low ESR to minimize the AC I
2
R loss and
sufficient capacitance to prevent the RMS current from
causing additional upstream losses in fuses or batteries.
APPLICATIO S I FOR ATIO
WUUU
Figure 8. RUN/SS Pin Interfacing with Latchoff Defeated
3.3V OR 5V RUN/SS
VIN
INTVCC
RUN/SS
D1
(8a) (8b)
D2*
CSS
RSS*
CSS
*OPTIONAL TO OVERRIDE
OVERCURRENT LATCHOFF
RSS*
1778 F08
2N7002
17
LTC1778/LTC1778-1
1778fb
APPLICATIO S I FOR ATIO
WUUU
Other losses, including C
OUT
ESR loss, Schottky diode D1
conduction loss during dead time and inductor core loss
generally account for less than 2% additional loss.
When making adjustments to improve efficiency, the
input current is the best indicator of changes in efficiency.
If you make a change and the input current decreases, then
the efficiency has increased. If there is no change in input
current, then there is no change in efficiency.
Checking Transient Response
The regulator loop response can be checked by looking at
the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, V
OUT
immediately shifts by an amount
equal to ∆I
LOAD
(ESR), where ESR is the effective series
resistance of C
OUT
. ∆I
LOAD
also begins to charge or
discharge C
OUT
generating a feedback error signal used by
the regulator to return V
OUT
to its steady-state value.
During this recovery time, V
OUT
can be monitored for
overshoot or ringing that would indicate a stability prob-
lem. The I
TH
pin external components shown in Figure 9
will provide adequate compensation for most applica-
tions. For a detailed explanation of switching control loop
theory see Application Note 76.
Design Example
As a design example, take a supply with the following
specifications: V
IN
= 7V to 28V (15V nominal), V
OUT
= 2.5V
±5%, I
OUT(MAX)
= 10A, f = 250kHz. First, calculate the
timing resistor with V
ON
= V
OUT
:
RV
V kHz pF M
ON
=
()( )()
=Ω
25
0 7 250 10 142
.
..
and choose the inductor for about 40% ripple current at
the maximum V
IN
:
LV
kHz A
V
VH=
()()()
−
⎛
⎝
⎜
⎞
⎠
⎟=µ
25
250 0 4 10 125
28 23
.
.
..
Selecting a standard value of 1.8µH results in a maximum
ripple current of:
∆=
()
µ
()
⎛
⎝
⎜
⎞
⎠
⎟=IV
kHz H
V
VA
L25
250 1 8 125
28 51
.
.–..
Next, choose the synchronous MOSFET switch. Choosing
a Si4874 (R
DS(ON)
= 0.0083Ω (NOM) 0.010Ω (MAX),
θ
JA
= 40°C/W) yields a nominal sense voltage of:
V
SNS(NOM)
= (10A)(1.3)(0.0083Ω) = 108mV
Tying V
RNG
to 1.1V will set the current sense voltage range
for a nominal value of 110mV with current limit occurring
at 146mV. To check if the current limit is acceptable,
assume a junction temperature of about 80°C above a
70°C ambient with ρ
150°C
= 1.5:
ImV AA
LIMIT
≥
()
Ω
()
+
()
=
146
15 0010
1
251 12
.. .
and double check the assumed T
J
in the MOSFET:
PVV
VAW
BOT =
()()
Ω
()
=
28 2 5
28 12 15 0010 197
2
–. .. .
T
J
= 70°C + (1.97W)(40°C/W) = 149°C
Because the top MOSFET is on for such a short time, an
Si4884 R
DS(ON)(MAX)
= 0.0165Ω, C
RSS
= 100pF, θ
JA
=
40°C/W will be sufficient. Checking its power dissipation
at current limit with ρ
100°C
= 1.4:
PV
VA
VApFkHz
WWW
TOP
=
()()
Ω
()
+
()( )( )( )( )
=+=
25
28 12 1 4 0 0165
1 7 28 12 100 250
030 040 07
2
2
...
.
...
T
J
= 70°C + (0.7W)(40°C/W) = 98°C
The junction temperatures will be significantly less at
nominal current, but this analysis shows that careful
attention to heat sinking will be necessary in this circuit.
18
LTC1778/LTC1778-1
1778fb
APPLICATIO S I FOR ATIO
WUUU
C
IN
is chosen for an RMS current rating of about 5A at
85°C. The output capacitors are chosen for a low ESR of
0.013Ω to minimize output voltage changes due to induc-
tor ripple current and load steps. The ripple voltage will be
only:
∆V
OUT(RIPPLE)
= ∆I
L(MAX)
(ESR)
= (5.1A) (0.013Ω) = 66mV
However, a 0A to 10A load step will cause an output
change of up to:
∆V
OUT(STEP)
= ∆I
LOAD
(ESR) = (10A) (0.013Ω) = 130mV
An optional 22µF ceramic output capacitor is included to
minimize the effect of ESL in the output ripple. The
complete circuit is shown in Figure 9.
PC Board Layout Checklist
When laying out a PC board follow one of the two sug-
gested approaches. The simple PC board layout requires
a dedicated ground plane layer. Also, for higher currents,
it is recommended to use a multilayer board to help with
heat sinking power components.
Figure 9. Design Example: 2.5V/10A at 250kHz
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
RUN/SS
PGOOD
V
RNG
FCB
I
TH
SGND
I
ON
V
FB
BOOST
TG
SW
PGND
BG
INTV
CC
V
IN
EXTV
CC
LTC1778
+
M2
Si4874
M1
Si4884
L1
1.8µH
D1
B340A
C
OUT1-2
180µF
4V
×2
C
OUT3
22µF
6.3V
X7R
C
IN
10µF
35V
×3
V
IN
5V TO 28V
V
OUT
2.5V
10A
C
SS
0.1µF
C
C1
500pF
C
C2
100pF
C2
6.8nF
C
VCC
4.7µF
C
F
0.1µF
C
B
0.22µF
R
C
20k
R1
14.0k
R
ON
1.4MΩ
R2
30.1k
R
F
1Ω
D
B
CMDSH-3
1778 F09
C
IN
: UNITED CHEMICON THCR60EIHI06ZT
C
OUT1-2
: CORNELL DUBILIER ESRE181E04B
L1: SUMIDA CEP125-1R8MC-H
R
PG
100k
R3
11k
R4
39k
+
• The ground plane layer should not have any traces and
it should be as close as possible to the layer with power
MOSFETs.
• Place C
IN
, C
OUT
, MOSFETs, D1 and inductor all in one
compact area. It may help to have some components on
the bottom side of the board.
• Place LTC1778 chip with pins 9 to 16 facing the power
components. Keep the components connected to pins
1 to 8 close to LTC1778 (noise sensitive components).
•
Use an immediate via to connect the components to
ground plane including SGND and PGND of LTC1778.
Use several bigger vias for power components.
• Use compact plane for switch node (SW) to improve
cooling of the MOSFETs and to keep EMI down.
• Use planes for V
IN
and V
OUT
to maintain good voltage
filtering and to keep power losses low.
• Flood all unused areas on all layers with copper. Flood-
ing with copper will reduce the temperature rise of
power component. You can connect the copper areas to
any DC net (V
IN
, V
OUT
, GND or to any other DC rail in
your system).
19
LTC1778/LTC1778-1
1778fb
APPLICATIO S I FOR ATIO
WUUU
Figure 10. LTC1778 Layout Diagram
16
15
14
13
12
11
10
9
C
C2
BOLD LINES INDICATE HIGH CURRENT PATHS
C
C1
C
SS
R
ON
R
C
R
F
1778 F10
1
2
3
4
5
6
7
8
RUN/SS
PGOOD
V
RNG
FCB
I
TH
SGND
I
ON
V
FB
BOOST
TG
SW
PGND
BG
INTV
CC
V
IN
EXTV
CC
C
B
M2
M1
D1
D
B
C
F
C
VCC
C
OUT
C
IN
V
IN
V
OUT
+
–
+
–
LTC1778 L
R1
R2
+
When laying out a printed circuit board, without a ground
plane, use the following checklist to ensure proper opera-
tion of the controller. These items are also illustrated in
Figure 10.
• Segregate the signal and power grounds. All small
signal components should return to the SGND pin at
one point which is then tied to the PGND pin close to the
source of M2.
• Place M2 as close to the controller as possible, keeping
the PGND, BG and SW traces short.
•
Connect the input capacitor(s) C
IN
close to the power
MOSFETs. This capacitor carries the MOSFET AC
current.
• Keep the high dV/dT SW, BOOST and TG nodes away
from sensitive small-signal nodes.
• Connect the INTV
CC
decoupling capacitor C
VCC
closely
to the INTV
CC
and PGND pins.
• Connect the top driver boost capacitor C
B
closely to the
BOOST and SW pins.
• Connect the V
IN
pin decoupling capacitor C
F
closely to
the V
IN
and PGND pins.
20
LTC1778/LTC1778-1
1778fb
1.5V/10A at 300kHz from 3.3V Input
TYPICAL APPLICATIO S
U
1.2V/6A at 300kHz
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
RUN/SS
PGOOD
VRNG
FCB
ITH
SGND
ION
VFB
BOOST
TG
SW
PGND
BG
INTVCC
VIN
EXTVCC
LTC1778
+
M2
IRF7811A
M1
IRF7811A
L1, 0.68µH
D1
B320B
COUT
270µF
2V
×2
CIN1-2
22µF
6.3V
×2
+
CIN3
330µF
6.3V
VIN
3.3V
VOUT
1.5V
10A
CSS
0.1µF
CC1
680pF
CC2
100pF
CVCC
4.7µF
CB
0.22µF
RC
20k
R1
10k
RON
576k
R2
8.87k
DB
CMDSH-3
1778 TA01
CIN1-2: MURATA GRM42-2X5R226K6.3
COUT: CORNELL DUBILIER ESRE271M02B
RPG
100k
RR1
11k
RR2
39k
5V
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
RUN/SS
PGOOD
VRNG
FCB
ITH
SGND
ION
VFB
BOOST
TG
SW
PGND
BG
INTVCC
VIN
EXTVCC
LTC1778
+
M2
1/2 FDS6982S
M1
1/2 FDS6982S
L1
1.8µHCOUT1
180µF
2V
COUT2
10µF
6.3V
CIN
10µF
25V
×2
VIN
5V TO 25V
VOUT
1.2V
6A
CSS
0.1µF
CC1
470pF
C2
2200pF
CC2
100pF
CVCC
4.7µF
CF
0.1µF
CB
0.22µF
RC
20k
R1
20k
RON
510k
R2
10k
DB
CMDSH-3
1778 TA02
CIN: TAIYO YUDEN TMK432BJ106MM
COUT1: CORNELL DUBILIER ESRD181M02B
COUT2: TAIYO YUDEN JMK316BJ106ML
L1: TOKO 919AS-1R8N
RPG
100k
RF
1Ω
21
LTC1778/LTC1778-1
1778fb
TYPICAL APPLICATIO S
U
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
RUN/SS
VON
VRNG
FCB
ITH
SGND
ION
VFB
BOOST
TG
SW
PGND
BG
INTVCC
VIN
EXTVCC
LTC1778-1
+
M2
IRF7811A
M3
Si4888
D1
B340A
D2
IR 12CWQ03FN
M1
IRF7811A
L1 4.8µH
COUT
100µF
20V
×6
CIN
22µF
50V
×2
VIN
6V TO 18V
VOUT
12V
CSS
0.1µF
CC1 1nF
C1
100pF
CC2
220pF
CVCC
4.7µF
CF
0.1µF
CIN: MARCON THER70EIH226ZT
COUT: AVX TPSV107M020R0085
L1: SCHOTT 36835-1
PGND
CB
0.22µF
RC
47k
R1
10k 1%
RON2
1.5M
1%
RON1
1.5M
1%
R2
140k
1%
RF
1Ω
DB
CMDSH-3
1778 TA04
VIN
18V
12V
6V
IOUT
6A
5A
3.3A
Single Inductor, Positive Output Buck/Boost
12V/5A at 300kHz
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
RUN/SS
V
ON
V
RNG
FCB
I
TH
SGND
I
ON
V
FB
BOOST
TG
SW
PGND
BG
INTV
CC
V
IN
EXTV
CC
LTC1778-1
+
M2
M1
L1 10µH
C
OUT
220µF
16V
C
IN
22µF
50V
V
IN
14V TO 28V
V
OUT
12V
5A
C
SS
0.1µF
C
C1
2.2nF
C
C2
100pF
C2
2200pF
C
VCC
4.7µF
C
F
0.1µF
C
B
0.22µF
R
C
20k
R1
10k
R
ON
1.6M
R2
140k
R
F
1Ω
D
B
CMDSH-3
D1
1778 TA05
UNITED CHEMICON THCR70E1H226ZT (847) 696-2000
SANYO 16SV220M (619) 661-6835
SUMIDA CDRH127-100 (847) 956-0667
FAIRCHILD FDS6680A (408) 822-2126
DIODES, INC. B340A (805) 446-4800
C
IN
:
C
OUT
:
L1:
M1, M2:
D1:
+
22
LTC1778/LTC1778-1
1778fb
TYPICAL APPLICATIO S
U
Positive-to-Negative Converter, –5V/5A at 300kHz
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
RUN/SS
V
ON
V
RNG
FCB
I
TH
SGND
I
ON
V
FB
BOOST
TG
SW
PGND
BG
INTV
CC
V
IN
EXTV
CC
LTC1778-1
+
M2
IRF7822
D1
B340A
M1
IRF7811A
L1 2.7µH
C
OUT
100µF
6V
×3
C
IN1
10µF
25V
×2
C
IN2
10µF
35V
V
IN
5V TO 20V
V
OUT
–5V
C
SS
0.1µF
C
C1
4700pF
C
C2
100pF
C
VCC
4.7µF
C
F
0.1µF
C
B
0.22µF
R
C
10k
R1
10k
R
ON
698k
R2
52.3k
RF
1Ω
D
B
CMDSH-3
1778 TA06
C
IN1
: TAIYO YUDEN TMK432BJ106MM
C
IN2
: SANYO 35CV10GX
C
OUT
: PANASONIC EEFUD0J101R
L1: PANASONIC ETQPAF2R7H
V
IN
20V
10V
5V
I
OUT
8A
6.7A
5A
23
LTC1778/LTC1778-1
1778fb
U
PACKAGE DESCRIPTIO
GN Package
16-Lead Plastic SSOP (Narrow 0.150)
(LTC DWG # 05-08-1641)
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
GN16 (SSOP) 0204
12
345678
.229 – .244
(5.817 – 6.198)
.150 – .157**
(3.810 – 3.988)
16 15 14 13
.189 – .196*
(4.801 – 4.978)
12 11 10 9
.016 – .050
(0.406 – 1.270)
.015 ± .004
(0.38 ± 0.10) × 45°
0° – 8° TYP
.007 – .0098
(0.178 – 0.249)
.0532 – .0688
(1.35 – 1.75)
.008 – .012
(0.203 – 0.305)
TYP
.004 – .0098
(0.102 – 0.249)
.0250
(0.635)
BSC
.009
(0.229)
REF
.254 MIN
RECOMMENDED SOLDER PAD LAYOUT
.150 – .165
.0250 BSC.0165 ±.0015
.045 ±.005
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
INCHES
(MILLIMETERS)
NOTE:
1. CONTROLLING DIMENSION: INCHES
2. DIMENSIONS ARE IN
3. DRAWING NOT TO SCALE
24
LTC1778/LTC1778-1
1778fb
PART NUMBER DESCRIPTION COMMENTS
LTC1622 550kHz Step-Down Controller 8-Pin MSOP; Synchronizable; Soft-Start; Current Mode
LTC1625/LTC1775 No R
SENSE
Current Mode Synchronous Step-Down Controller 97% Efficiency; No Sense Resistor; 16-Pin SSOP
LTC1628-PG Dual, 2-Phase Synchronous Step-Down Controller Power Good Output; Minimum Input/Output Capacitors;
3.5V ≤ V
IN
≤ 36V
LTC1628-SYNC Dual, 2-Phase Synchronous Step-Down Controller Synchronizable 150kHz to 300kHz
LTC1709-7 High Efficiency, 2-Phase Synchronous Step-Down Controller Up to 42A Output; 0.925V ≤ V
OUT
≤ 2V
with 5-Bit VID
LTC1709-8 High Efficiency, 2-Phase Synchronous Step-Down Controller Up to 42A Output; VRM 8.4; 1.3V ≤ V
OUT
≤ 3.5V
LTC1735 High Efficiency, Synchronous Step-Down Controller Burst Mode® Operation; 16-Pin Narrow SSOP;
3.5V ≤ V
IN
≤ 36V
LTC1736 High Efficiency, Synchronous Step-Down Controller with 5-Bit VID Mobile VID; 0.925V ≤ V
OUT
≤ 2V; 3.5V ≤ V
IN
≤ 36V
LTC1772 SOT-23 Step-Down Controller Current Mode; 550kHz; Very Small Solution Size
LTC1773 Synchronous Step-Down Controller Up to 95% Efficiency, 550kHz, 2.65V ≤ V
IN
≤ 8.5V,
0.8V ≤ V
OUT
≤ V
IN
, Synchronizable to 750kHz
LTC1876 2-Phase, Dual Synchronous Step-Down Controller with 3.5V ≤ V
IN
≤ 36V, Power Good Output, 300kHz Operation
Step-Up Regulator
LTC3713 Low V
IN
High Current Synchronous Step-Down Controller 1.5V ≤ V
IN
≤ 36V, 0.8V ≤ V
OUT
≤ (0.9)V
IN
, I
OUT
Up to 20A
LTC3778 Low V
OUT
, No R
SENSE
Synchronous Step-Down Controller 0.6V ≤ V
OUT
≤ (0.9)V
IN
, 4V ≤ V
IN
≤ 36V, I
OUT
Up to 20A
LT®3800 60V Synchronous Step-Down Controller Current Mode, Output Slew Rate Control
Burst Mode is a registered trademark of Linear Technology Corporation.
© LINEAR TECHNOLOGY CORPORATION 2001
LT/LT 0405 REV B • PRINTED IN USA
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
●
FAX: (408) 434-0507
●
www.linear.com
RELATED PARTS
U
TYPICAL APPLICATIO
Typical Application 2.5V/3A at 1.4MHz
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
RUN/SS
PGOOD
V
RNG
FCB
I
TH
SGND
I
ON
V
FB
BOOST
TG
SW
PGND
BG
INTV
CC
V
IN
EXTV
CC
LTC1778
+
M2
1/2 Si9802
M1
1/2 Si9802
L1, 1µH
C
OUT
120µF
4V
C
IN
10µF
25V
V
IN
9V TO 18V
V
OUT
2.5V
3A
C
SS
0.1µF
C
C1
470pF
C
C2
100pF
C2
2200pF
C
VCC
4.7µF
C
F
0.1µF
C
B
0.22µF
R
C
33k
R1
11.5k
R
ON
220k
R2
24.9k
RF
1Ω
D
B
CMDSH-3
1778 TA03
C
IN
: TAIYO YUDEN TMK432BJ106MM
C
OUT
: CORNELL DUBILIER ESRD121M04B
L1: TOKO A921CY-1R0M
R
PG
100k