TECHNOLOGY FEATURES Low Start-Up Current: <250uA 50ns Current Sense Delay Current Mode Operation: To 500kHz Pin Compatible with UC1842 Series Undervoltage Lockout with Hysteresis No Cross-Conduction Current Trimmed Bandgap Reference 1A Totem Pole Quiput Trimmed Oscillator Frequency and Sink Current Active Pull-Down on Reference and Output During Undervoltage Lockout High Level Output Clamp: 18V Current Sense Leading Edge Blanking APPLICATIONS Off-Line Converters DC/DC Converters I, LTC and LT are registered trademarks of Linear Technology Corporation. AQ LT1241 Series High Speed Current Mode Pulse Width Modulators DESCRIPTION The LT1241 series devices are 8-pin, fixed frequency, current mode, pulse width modulators. They are improved plug compatible versions ofthe industry standard UC1842 series. These devices have both improved speed and lower quiescent current. The LT1241 series is optimized for off-line and DC/DC converter applications. They con- tain a temperature-compensated reference, high gain er- ror amplifier, current sensing comparator and a high current totem pole output stage ideally suited to driving power MOSFETs. Start-up current has been reduced to less than 250uA. Cross-conduction current spikes in the output stage have been eliminated, making 500kHz operation practical. Several new features have been incor- porated. Leading edge blanking has been added to the current sense comparator. Trims have been added to the oscillator circuit for both frequency and sink current, and both of these parameters are tightly specified. The output stage is clamped to a maximum Voyr of 18V in the on state. The output and the reference output are actively pulled low during undervoltage lockout. BLOCK DIAGRAM UV REFERENCE ENABLE LOCKOUT JUL 5V REF REFERENCE PULL-DOWN I MAIN BIAS OUTPUT + PULL-DOWN | OSCILLATOR | rr ------ 18V ISENSE 3} = 1241 BDO! LY WhineLT 1241 Series ABSOLUTE MAXIMUM RATINGS PACKAGE/ORDER INFORMATION Supply 0) re 25V ORDER PART Output CUITONE oo... ee eeeecccsceeseesesseeretssessenreaneerenes +1A* TOP VIEW NUMBER Output Energy (Capacitive Load per Cycle)............... Op come] be] va Analog Inputs (PINS 2, 3)... -0.3 to 6V re FF] Vee LT124XCJ8 Error Amplifier Output Sink Current................0 10mA leense [51 FS] ourpur LT124XCN8 Power Dissipation at Ty < 25C oo... ceeeeeeeteteeeees 1W Rely [2 Fe] eno LT124XCS8 Operating Junction Temperature Range LT124XIN8 LTA24XC ooeessecccssssssssessecsssseeseseesssseeeeee 0C to 100C BLEADCERDIP LEAD PDIP LT124xIS8 2.4 -40C to 100C $8 PACKAGE LT124XMJ8 LTV2AXM ov ccccccccssssssseseesecccssssssseseees -55C to 125C BEAD PASTICSO S8 PART MARKING Storage Temperature Range................. - 65C to 150C Tumax = 125C, Oya = 100C/W (J8) Lead Temperature (Soldering, 10 SeC).......0.....00. 300C ro p00, en 1s0c/W (88) 124X *The 1A rating for output current is based on transient switching 124x| requirements. ELECTRICAL CHARACTERISTICS (notes, 2) PARAMETER | CONDITIONS | MIN TYP MAX UNITS Reference Section Output Voltage Io = 1m, Ty = 25C 4,925 5.000 5.075 V Line Regulation 12V < Voc < 25V e 3 20 mV Load Regulation 1mA < lyper < 20mA e -6 -25 mV Temperature Stability 0.1 mvV/C Total Output Variation Line, Load, Temp e 4.87 5.13 V Output Noise Voltage 10Hz < F< 10kHz, Ty = 25C 50 pV Long Term Stability Ta = 125C, 1000 Hrs. 5 25 mV Output Short-Circuit Current e -30 -90 -180 mA Oscillator Section Initial Accuracy Ry = 10k, Cy = 3.3nF, T; = 25C 47.5 50 52.5 kHz Ry = 13.0k, Cy = 500pF, Ty = 25C 228 248 268 kHz Voltage Stability 12V < Voc < 25V, Ty = 25C 1 % Temperature Stability Twin < Ty < Tax -0.05 %lC Amplitude Ty = 25C (Pin 4) 1.7 V Clock Ramp Reset Current Vosc (Pin 4) = 2V, Ty = 25C 7.9 8.2 8.5 mA Error Amplifier Section Feedback Pin Input Voltage Veiny = 2.5V e 2.42 2.50 2.58 V Input Bias Current Vep = 2.5V e -2 pA Open-Loop Voltage Gain 2 > MINIMUM OPERATING VOLTAGE MINIMUM 0 TING VOLTAGE MINIMUM OPERATING VOLTAGE 7 6 9 6 -50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125 TEMPERATURE (C) TEMPERATURE (C) TEMPERATURE (C) LT1241 + TPCO1 LT1241 + TPCO2 LT1241 + TPCOS Start-Up Current Start-Up Current Supply Current 200 l l l 200 10 START-UP __| oe 180 Vee = 15V THRESHOLD Ry = 10k _ | / _.. 160 9 Cy = 3300pF = 150 | 7, s 140 = LT1241 = fu LT1243/5 YY LT1242/4 & 120 3 oc oc = s 100 | /} Lf x 100 = 3G \Y 2 8 s / > 80 ~ 7 cE cE = 59 fA = 60 / Ty = 25C 20 0 | | 0 5 0 2 4 6 8 10 12 14 16 18 -50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125 Vee (V) TEMPERATURE (C) TEMPERATURE (C) LT 1241 + TPCO4 LT 1241 + TPCOS LT1241 + TPCOB Supply Current vs Oscillator Frequency Oscillator Frequency Oscillator Sink Current 8.7 Veg = 5V 8.6 + Vpina = 2V Ry = 10k ze LT1242, LT1243 Cy = 3300pF = 85 = Kb = LT1241, LT1244, LT1245 > G84 S = S 83 ra > oO a 2 ~ 82 2 wi = . Oo Da wn > S es 8.1 & ff 5 3 s 8.0 Vog = 15V 9 79 Ry = 10k g C, = 15pF 78 Td 10k 100k 1M -0 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125 OSCILLATOR FREQUENCY (Hz) TEMPERATURE (C) TEMPERATURE (C) LT1241 + TPC18, LT1241 + TPCO7 LT1241 + TPCOS. A LI WyeLT1241 Series TYPICAL PERFORMANCE CHARACTERISTICS Reference Voltage Reference Short-Circuit Current Feedback Pin Input Voltage 5.05 _ 140 2.55 <= 5.04 Llo= 1mA = 2.54 & 120 Ss 5.03 es wu 2.53 = o 2 iu 5.02 3 100 a , BB 2.52 g EE , 8 = 5.01 5 a = 2.51 5.00 5 80 < & 2.50 iw 2 mh z= iu 4.99 & mM = 2.49 ce = 60 P< se tL 4.98 n g 2.48 a oO cs 4.97 B40 B 2.47 oc 4,96 & ~ 2.46 oc 95 20 2.45 -50 -25 O 5 50 75 100 1295 -50 -25 0 25 50 75 100 125 -50 -25 0O 25 50 75 100 125 TEMPERATURE (C) TEMPERATURE (C) TEMPERATURE (C) LT1241 + TPC10 LT1241 + TPCOS LT1241 + TPO11 Error Amplifier Open-Loop Gain and Phase Current Sense Clamp Voltage Current Sense Input Threshold 100 225 1.05 12 = Veg = 15 31.04 = a _\ S11. can = XY Vo =2.0V- 4.0V _| ~ 2 10 tm | = % GAIN R, = 100k 180 S 1.03 Ss 77 = Ta = 25C 5 a 4 N S 1.02 i uw 60 135 S 08 = iN | =z 1.01 e V T, =55C = K \ PHASE 3B 5 / S 40 <=! 9 21.00 & 06 7 a Ss uw = Ty =125C S SB 099 u /, = N 45. #4 im 0.4 f = *0 N 2 0.98 Bo 7/7 oS = 0.97 z / /~ _ Ky #0. # op ft, = 25C <= \ 3 0.96 2 hj V -20 -45 0.95 0 L 10 100 1k 10k 100k 1M 10M -50 -25 0 25 50 75 100 125 0 1 2 3 4 5 6 FREQUENCY (Hz) TEMPERATURE (C) ERROR AMP OUTPUT VOLTAGE (V) LT1244 + TPO16 LT1241 + TPC12 LT1244 + TPC17 Low Level Output Saturation High Level Output Low Level Output Voltage During Undervoltage Saturation Voltage Saturation Voltage Lockout 4.0 1.0 = 35 = S 3 o 3 = 3.0 Ty =55C = = 2 a Ty = 125C 2 = 25 = > = = = = 25C 3S 3S z 2.0 z 0.5 z 5 Ty = 125C 5 5 E15 & = wy wn wy 5 1.0 5 5 Ty = 125C a a a E E E a Da a 05 oO oO 0 0 0 100 200 0 100 200 0 5 10 OUTPUT SOURCE CURRENT (mA) OUTPUT SINK CURRENT (mA) OUTPUT SINK CURRENT (mA) LT1244 + TPO13 LT1241 + TPO14 L71244 + TPC1S LY Whine DLT 1241 Series TYPICAL PERFORMANCE CHARACTERISTICS Output Deadtime vs Oscillator Frequency L11242, LT1244 60 50 } 5nF ref Ty = 40 / / r = a S 30 / a / S VA 500pF. V y 20 RH Y My | 10 LZ Yy aH / Lo) Wf 7] Lo] Ler ra 0 10008 0 100 4000 OSCILLATOR FREQUENCY (kHz) LT1241 + TPC19 Output Rise and Fall Time Llu co 5 Qo > = x Ee 2 Qo TIME 50ns/DIV LT1241 + TPG22 Veg = 15V C= ink 15 70 65 60 % OF DEADTIME 55 50 OUTPUT VOLTAGE 5V/DIV OUTPUT CROSS CONDUCTION CURRENT 20mA/DIV Output Deadtime vs Oscillator Frequency LT1241, LT1243,LT1245 10nFW SnFf} 2 nen F Frag J f / / is L YY lL, A, JV 4 AH | YY) Ee 0 100 1000 OSCILLATOR FREQUENCY (kHz) LT1241 + TPC20 Output Cross-Conduction Current TIME 50ns/DIV LT1241 * TPG23 Voc = 15V C= 15pF Timing Resistor vs Oscillator Frequency 100 kQ) Rr ( Gy =10nF Veg = 15V Ty = 25C 1 10k 100k 1M OSCILLATOR FREQUENCY (Hz) LT1241 * TPC24 Current Sense Delay OUTPUT VOLTAGE 5V/DIV 5 22> zs eG a TIME 50ns/DIV Veco = 15V Lrteat TPGD4 C, = inFLT1241 Series PIN FUNCTIONS COMP (Pin 1): Compensation Pin. This pin is the output of the Error Amplifier and is made available for loop compen- sation. It can also be used to adjust the maximum value of the current sense clamp voltage to less than 1V. This pin can source a minimum of 0.5mA (0.8mA typ) and sink a minimum of 2mA (4mA typ) FB (Pin 2) Voltage Feedback Pin. This pin is the inverting input of the error amplifier. The output voltage is normally fed back to this pin through a resistive divider. The non- inverting input of the error amplifier is internally commit- ted to a 2.5V reference point. Isense (Pin 3): Current Sense Pin. This is the input to the current sense comparator. The trip point of the compara- tor is set by, and is proportional to, the output voltage of the Error Amplifier. R7/Cy (Pin 4): The oscillator frequency and the deadtime are set by connecting a resistor (Rr) from Vper to Rt/Cy and a capacitor (Cy) from R7/Cy to GND. The rise time of the oscillator waveform is set by the RC time constant of Ry and Cr. The fall time, which is equal to the output deadtime, is set by acombination ofthe RC time constant and the oscillator sink current (8.2mA typ). GND (Pin 5): Ground. OUTPUT (Pin 6): This pin is the output of a high current totem pole output stage. It is capable of driving up to 1A of current into a capacitive load such as the gate of a MOSFET. Vec (Pin 7): This pin is the positive supply of the control IC. Vrer (Pin 8): Reference. This is the reference output of the IC. The reference output is used to supply charging current to the external timing resistor Ry. The reference provides biasing to a large portion of the internal circuitry, and is used to generate several internal reference levels includ- ing the Vep level and the current sense clamp voltage. APPLICATIONS INFORMATION MINIMUM START-UP | OPERATING | MAXIMUM DEVICE | THRESHOLD | VOLTAGE | DUTY CYCLE | REPLACES LT1241 9.6V 7.6V 50% NONE LT1242 16V 10V 100% UCc1842 LT1243 8.4V 7.6V 100% UC1843 LT1244 16V 10V 50% uc1844 LT1245 8.4V 7.6V 50% UC1845 Oscillator The LT1241 series devices are fixed frequency current mode pulse width modulators. The oscillator frequency and the oscillator discharge current are both trimmed and tightly specified to minimize the variations in frequency and deadtime. The oscillator frequency is set by choosing a resistor and capacitor combination, Ry and Cr. This RC combination will determine both the frequency and the maximum duty cycle. The resistor Ry is connected from Veer (Pin 8) to the R7/Cy pin (Pin 4). The capacitor Cr is connected from the R7/Cy pin to ground. The charging current for Cy is determined by the value of Ry. The discharge current for Cy is set by the difference between the current supplied by Ry and the discharge current of the LT124X. The discharge current of the device is trimmed to 8.2mA. For large values of Ry discharge time will be determined by the discharge current of the device and the value of Cy. As the value of Ry is reduced it will have more effect on the discharge time of Cy. During an oscillator cycle capacitor Cy is charged to approximately 2.8V and discharged to approximately 1.1V. The output is enabled during the charge time of Cy and disabled, in an off state, during the discharge time of Cy. The deadtime of the circuit is equal to the discharge time of Cy. The maximum duty cycle is limited by controlling the deadtime of the oscilla- tor. There are many combinations of Ry and Cy that will yield a given oscillator frequency, however there is only one combination that will yield a specific deadtime at that frequency. Curves of oscillator frequency and deadtime LY Whine 7LT 1241 Series APPLICATIONS INFORMATION for various values of Ry and Cy appear in the Typical Performance Characteristics section. Frequency and deadtime can also be calculated using the following formulas: Oscillator Rise Time: t, = 0.583 RC Oscillator Discharge Time: ty=-*48*R&_ (0.0164) R-11.73 Oscillator Period: Tosc =t; + ty Oscillator Frequency: fosc = a Tosc Maximum Duty Cycle: LT1241, LT1244, LT1245 tr Tosc - ta 2losc 2 losc Dax = tr Toso -t LT1242, LT1243. Dyjay = L- = 8 4 Tosc osc The above formulas will give values that will be accurate fo approximately +5%, at the oscillator, over the full operating frequency range. This is due to the fact that the oscillatortrip levels are constant versus frequency and the discharge current and initial oscillator frequency are trimmed. Somefine adjustment may be required to achieve more accurate results. Once the final Rt/C7 combination is selected the oscillator characteristics will be repeatable from device to device. Note that there will be some slight differences between maximum duty cycle at the oscillator and maximum duty cycle at the output due to the finite rise and fall times of the output. The output switching frequency will be equal to the oscillator frequency for LT1242 and LT1243. The output switching frequency will be equal to one-half the oscillator frequency for LT1241,LT1244 and LT1245. The oscillator of LT1241 series devices will run at frequencies up to 1MHz, allowing 500kHz output switching frequencies for all devices. Error Amplifier The LT1241 series of devices contain a fully compensated error amplifier with a DC gain of 90dB and a unity-gain frequency of 1MHz. Phase margin at unity-gain is 80. The noninverting input is internally committed to a 2.5V refer- ence point derived from the 5V reference of Pin 8. The inverting input (Pin 2) and the output (Pin 1) are made available to the user. The output voltage in a regulator circuit is normally fed back to the inverting input of the error amplifier through a resistive divider. The output of the error amplifier is made available for external loop compensation. The output current of the error amplifier is limited to approximately 0.8mA sourcing and approximately 6mA sinking. In a current mode PWM the peak switch current is a function of the output voltage of the error amplifier. In the LT1241 series devices the output of the error amplifier is offset by two diodes (1.4V at 25C), divided by a factor of three, and fed to the inverting input of the current sense comparator. For error amplifier output voltages less than 1.4V the duty cycle of the output stage will be zero. The maximum offset that can appear at the current sense input is limited by a 1V clamp. This occurs when the error amplifier output reaches 4.4V at 25C. The output of the error amplifier can be clamped below 4.4V in order to reduce the maximum voltage allowed across the current sensing resistor to less than 1V. The supply current will increase by the value of the output source current when the output voltage of the error amplifier is clamped.LT1241 Series APPLICATIONS INFORMATION Current Sense Comparator and PWM Latch LT1241 series devices are current mode controllers. Under normal operating conditions the output (Pin 6) is turned on at the start of every oscillator cycle, coincident with the rising edge of the oscillator waveform. The output is then turned off when the current reaches a threshold level proportional to the error voltage at the output of the error amplifier. Once the output is turned off it is latched off until the start of the next cycle. The peak current is thus proportional to the error voltage and is controlled on a cycle by cycle basis. The peak switch current is normally sensed by placing a sense resistor in the source lead of the Output MOSFET. This resistor converts the switch current to avoltage that can be fed into the current sense input. For normal operating conditions the peak inductor current, which is equal to the peak switch current, will be equal to: (Veni - 1.4V) (3Rs) During fault conditions the maximum threshold voltage at the input of the current sense comparator is limited by the internal 1V clamp at the inverting input. The peak switch current will be equal to: PK = 1.0V IPK (MAX) => Rs In certain applications, such as high power regulators, it may be desirable to limit the maximum threshold voltage to less than 1V in order to limit the power dissipated in the sense resistor or to limit the short-circuit current of the regulator circuit. This can be accomplished by clamping the output of the error amplifier. A voltage level of approximately 1.4V at the output of the error amplifier will give a threshold voltage of OV. A voltage level of approxi- mately 4.4V at the output of the error amplifier will give a threshold level of 1V. Between 1.4V and 4.4V the threshold voltage will change by afactor of one-third ofthe change inthe erroramplifier output voltage. The threshold voltage will be 0.333V for an error amplifier voltage of 2.4V. To reduce the maximum current sense threshold to less than 1V the error amplifier output should be clamped to less than 4.4V. Blanking A unique feature of the LT1241 series devices is the built- in blanking circuit at the output of the current sense comparator. A common problem with current mode PWM circuits is erratic operation due to noise at the current sense input. The primary cause of noise problems is the leading edge current spike due to transformer interwinding capacitance and diode reverse recovery time. This current spike can prematurely trip the current sense comparator causing an instability in the regulator circuit. A filter at the current sense input is normally required to eliminate this instability. This filter will in turn slow down the current sense loop. Aslow current sense loop willincrease the minimum pulse width which will increase the short-circuit current in an overload condition. The LT1241 series devices blank (lock out) the signal atthe output of the current sense compara- tor for a fixed amount of time after the switch is turned on. This effectively prevents the PWM latch from tripping due to the leading edge current spike. The blanking time will be a function of the voltage at the feedback pin (Pin 2). The blanking time will be 100ns for normal operating conditions (Veg = 2.5V). The blanking time goes to zero as the feedback pin is pulled to OV. This means that the blanking time will be minimized during Start-up and also during an output short-circuit fault. This blanking circuit eliminates the need for an input filter at the current sense input except in extreme cases. Eliminating the filter allows the current sense loop to operate with minimum delays, reducing peak currents during fault conditions. LY WhineLT 1241 Series APPLICATIONS INFORMATION Undervoltage Lockout The LT1241 series devices incorporate an undervoltage lockout comparator which prevents the internal reference circuitry and the output from starting up until the supply voltage reaches the start-up threshold voltage. The quies- cent current, below the start-up threshold, has been reduced to less than 250uA (170A typ.) to minimize the power loss due to the bleed resistor used for start-up in off-line converters. In undervoltage lockout both Vper (Pin 8) and the output (Pin 6) are actively pulled low by Darlington connected PNP transistors. They are designed to sink a few milliamps of current and will pull down to about 1V. The pull-down transistor atthe reference pin can be used to reset the external soft start capacitor. The pull- down transistor at the output eliminates the external pull- down resistor required, with earlier devices, to hold the external MOSFET gate low during undervoltage lockout. Output The LT1241 series devices incorporate a single high current totem pole output stage. This output stage is capable of driving up to +1A of output current. Cross- conduction current spikes in the output totem pole have been eliminated. This device is primarily intended for driving MOSFET switches. Rise time is typically 40ns and fall time is typically 30ns when driving a 1.0nF load. A clamp is built into the device to prevent the output from rising above 18V in order to protect the gate of the MOSFET switch. The output is actively pulled low during undervoltage lockout by a Darlington PNP. This PNP is designed to sink several milliamps and will pull the output down to approxi- mately 1V. This active pull-down eliminates the need foran external resistor which was required in older designs. The Output pin of the device connects directly to the emitter of the upper NPN drive transistor and the collector of the lower NPN drive transistor in the totem pole. The collector of the lower transistor, which is n-type silicon, forms a p-n junction with the substrate of the device. This junction is reverse biased during normal operation. In some applications the parasitic LC of the external MOSFET gate can ring and pull the OUTPUT pin below ground. Ifthe OUTPUT pin is pulled negative by more than a diode drop the parasitic diode formed by the collector of the output NPN and the substrate will turn on. This can cause erratic operation of the device. In these cases a Schottky clamp diode is recommended from the output to ground. Reference The internal reference of the LT1241 series devices is a 5V bandgap reference, trimmed to within +1% initial toler- ance. The reference is used to power the majority of internal logic and the oscillator circuitry. The oscillator charging current is supplied from the reference. The feedback pin voltage and the clamp level for the current sense comparator are derived from the reference voltage. The reference can supply up to 20mA of current to power external circuitry. Note that using the reference in this manner, as a voltage regulator, will significantly increase power dissipation in the device which will reduce the useful operating ambient temperature range. Design/Layout Considerations LT1241 series devices are high speed circuits capable of generating pulsed output drive currents of up to 1A peak. The rise and fall time for the output drive current is in the range of 10ns to 20ns. High speed circuit techniques must be used to insure proper operation of the device. Do not attempt to use Proto-boards or wire-wrap techniques to breadboard high speed switching regulator circuits. They will not work properly. Printed circuit layouts should include separate ground paths for the voltage feedback network, oscillator capaci- tor, and switch drive current. These ground paths should be connected together directly at the ground pin (Pin 5) of the LT124X. This will minimize noise problems due to pulsed ground pin currents. Voc should be bypassed, with a minimum of 0.1pF, as close to the device as possible. High current paths should be kept short and they should be separated from the feedback voltage network with Shield traces if possible. 10LT1241 Series TYPICAL APPLICATIONS External Clock Synchronization Soft Start VREF EXTERNAL SYNC INPUT TUL D1 1S REQUIRED IF THE SYNC AMPLITUDE IS LARGE ENOUGH TO PULL THE BOTTOM OF C; MORE THAN 800mV BELOW GROUND. LT1241 + TAO1 LT1244 + TAG2 Adjustable Clamp Level with Soft Start BV REF UV MAIN BIAS LOCKOUT 1 REFERENCE PULL-DOWN 5 l OUTPUT PULL-DOWN L. REFERENCE ENABLE . TLL 1mA ISENSE ee all VoLamp Vo Ri R2 | = WHERE: OV 2 Rs LT1241 + TAO4 PACKAGE DESCRIPTION Dimensions in inches (millimeters) unless otherwise noted. J8& Package 8-Lead CERDIP (Narrow 0.300, Hermetic) (LTC DWG # 05-08-1110) CORNER LEADS OPTION a (4 PLCS) 0.005 (0.127) [~ aK MIN 0.023 - 0.045 fe] [7] [s) [5] (0.584 1.143) HALF LEAD OPTION 0.025 0.220 - 0.310 0.045 0,068 _| L_ (0.635) (5.588 7.874) (1.143 1.727) RAD TYP FULL LEAD OPTION 2 3 4 oom at Te 0 @. 762 BSC) MAX A | | 0.015 0.060 (0.381 1.524) Y 0.008 - 0.018 al (0.203 - 0.457) ors F| 0.045 0.068 0.385 + 0.025 0.045 0.068 0.195 Le ~ (9.779 + 0.635) (1.143 1.727) 0.014 0.026 o100+0.010 MIN (0.360 0.660) (2.540 + 0.254) NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE OR TIN PLATE LEADS. J8 0694 LY Wee 13LT 1241 Series PACKAGE DESCRIPTION Dimensions in inches (millimeters) unless otherwise noted. N8 Package 8-Lead PDIP (Narrow 0.300) (LTC DWG # 05-08-1510) _ 0.400* _ (10.160) MAX (s] [7] [el] Js] A 0.255 + 0.015* ) (6.477 + 0.381) Cy 2] Ls} i 0.300 - 0,325 0.045 0.065 0.130 + 0.005 (7.620 8.255) | (1.143 1.651) 7 - (3.302 +0.127) 7 | | 0.065 A (1.651) ry 0.009 - 0.015 TYP (0.229 0.381) 0.005 0.125 0.02 (0.127) 7 (8.175) O01 +0.025 MIN (0.380 0.325 9015 MIN ete 9.955 10.685 299 _9 384 0.100 + 0.010 0.018 + 0,003 (2.540 + 0.254) (0.457 +0.076) na n605 *THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm) 14LT1241 Series PACKAGE DESCRIPTION Dimensions in inches (millimeters) unless otherwise noted. $8 Package 8-Lead Plastic Small Outline (Narrow 0.150) (LTC DWG # 05-08-1610) 0.189 - 0.197* (4.801 5.004) 8 7 6 5 HAA A 0.228 0.244 0.150 0.157** (5.791 6.197) (3.810 3.988) | FETS 0.010 0.020 onan eam * 45 ~| < 0.053 0.069 (0.254 0.508) (1.346 = 1.752) 004 0.010 0.008 0.010 es 0.101 0054 (0.203 -0. iz "a 8 TYP (0.101 0.254) ai 2016-1050 noi4o0a (0.355 0.483) 355 0.483) *DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH 508 0605 SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE Information furnished by Linear Technology Corporation is believed to be accurate and reliable. f V1 However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen- LINEAR tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.LT 1241 Series TYPICAL APPLICATION Slope Compensation at Error Amp UV REFERENCE ENABLE LOCKOUT 5V REF MAIN BIAS | REFERENCE PULL-DOWN 4 OUTPUT PULL-DOWN OSCILLATOR LT1241 TAOS RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LT1246 1MHz Current Mode PWM 16V Start-Up Threshold, 10V Minimum Operating Voltage LT1248/LT1249 Power Factor Controllers Minimal Parts Count LT1372 High Efficiency Switching Regulator 500kHz 1.5A Boost Regulator LT1376 1.5A 500kHz Step-Down Switching Regulator Steps Down from Up to 25V Using 4.7uH Inductors LT1509 Power Factor and PWM Controller Complete Solution for Universal Off-Line Switching Power Supplies 1241fa LT/TP 0297 5K REV A+ PRINTED IN USA 1 6 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408)432-1900 f J LITICAR FAX: (408) 434-0507 TELEX: 499-3977 www.linear-tech.com LINEAR TECHNOLOGY CORPORATION 1992