DS90LV018ATMX - NATIONAL SEMICONDUCTOR

DS90LV018A

DS90LV018A 3V LVDS Single CMOS Differential Line Receiver

Literature Number: SNLS014C

DS90LV018A

3V LVDS Single CMOS Differential Line Receiver

General Description

The DS90LV018A is a single CMOS differential line receiver

designed for applications requiring ultra low power dissipa-

tion, low noise and high data rates. The device is designed to

support data rates in excess of 400 Mbps (200 MHz) utilizing

Low Voltage Differential Signaling (LVDS) technology.

The DS90LV018A accepts low voltage (350 mV typical) dif-

ferential input signals and translates them to 3V CMOS

output levels. The receiver also supports open, shorted and

terminated (100Ω) input fail-safe. The receiver output will be

HIGH for all fail-safe conditions. The DS90LV018A has a

flow-through design for easy PCB layout.

The DS90LV018A and companion LVDS line driver provide a

new alternative to high power PECL/ECL devices for high

speed point-to-point interface applications.

Features

n>400 Mbps (200 MHz) switching rates

n50 ps differential skew (typical)

n2.5 ns maximum propagation delay

n3.3V power supply design

nFlow-through pinout

nPower down high impedance on LVDS inputs

nLow Power design (18mW @3.3V static)

nInteroperable with existing 5V LVDS networks

nAccepts small swing (350 mV typical) differential signal

levels

nSupports open, short and terminated input fail-safe

nConforms to ANSI/TIA/EIA-644 Standard

nIndustrial temperature operating range

(−40˚C to +85˚C)

nAvailable in SOIC package

Connection Diagram

SOIC

10007801

Order Number DS90LV018ATM

See NS Package Number M08A

Functional Diagram

10007802

Truth Table

INPUTS OUTPUT

+]−[R

−] R

OUT

≥0.1V H

≤−0.1V L

Full Fail-safe

OPEN/SHORT H

or Terminated

August 2005

DS90LV018A 3V LVDS Single CMOS Differential Line Receiver

Absolute Maximum Ratings (Note 1)

If Military/Aerospace specified devices are required,

please contact the National Semiconductor Sales Office/

Distributors for availability and specifications.

Supply Voltage (V

) −0.3V to +4V

Input Voltage (R

+, R

−) −0.3V to +3.9V

Output Voltage (R

OUT

) −0.3V to (V

+ 0.3V)

Maximum Package Power Dissipation @+25˚C

M Package 1025 mW

Derate M Package 8.2 mW/˚C above +25˚C

Storage Temperature Range −65˚C to +150˚C

Lead Temperature Range Soldering

(4 sec.) +260˚C

Maximum Junction Temperature +150˚C

ESD Rating (Note 4)

(HBM 1.5 kΩ, 100 pF) ≥7kV

(EIAJ 0Ω, 200 pF) ≥500 V

Recommended Operating

Conditions

Min Typ Max Units

Supply Voltage (V

) +3.0 +3.3 +3.6 V

Receiver Input Voltage GND 3.0 V

Operating Free Air

Temperature (T

) −40 25 +85 ˚C

Electrical Characteristics

Over Supply Voltage and Operating Temperature ranges, unless otherwise specified. (Notes 2, 3)

Symbol Parameter Conditions Pin Min Typ Max Units

Differential Input High Threshold V

= +1.2V, 0V, 3V (Note 11) R

+, +100 mV

Differential Input Low Threshold R

− −100 mV

Input Current V

= +2.8V V

= 3.6V or 0V −10 ±1 +10 µA

= 0V −10 ±1 +10 µA

= +3.6V V

= 0V -20 +20 µA

Output High Voltage I

= −0.4 mA, V

= +200 mV R

OUT

2.7 3.1 V

= −0.4 mA, Inputs terminated 2.7 3.1 V

= −0.4 mA, Inputs shorted 2.7 3.1 V

Output Low Voltage I

= 2 mA, V

= −200 mV 0.3 0.5 V

Output Short Circuit Current V

OUT

= 0V (Note 5) −15 −50 −100 mA

Input Clamp Voltage I

= −18 mA −1.5 −0.8 V

No Load Supply Current Inputs Open V

5.4 9 mA

Switching Characteristics

= +3.3V ±10%, T

= −40˚C to +85˚C (Notes 6, 7)

Symbol Parameter Conditions Min Typ Max Units

PHLD

Differential Propagation Delay High to Low C

= 15 pF 1.0 1.6 2.5 ns

PLHD

Differential Propagation Delay Low to High V

= 200 mV 1.0 1.7 2.5 ns

SKD1

Differential Pulse Skew |t

PHLD

−t

PLHD

| (Note 8) (Figure 1 and Figure 2) 0 50 400 ps

SKD3

Differential Part to Part Skew (Note 9) 0 1.0 ns

SKD4

Differential Part to Part Skew (Note 10) 0 1.5 ns

TLH

Rise Time 325 800 ps

THL

Fall Time 225 800 ps

MAX

Maximum Operating Frequency (Note 12) 200 250 MHz

Note 1: “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices

should be operated at these limits. The table of “Electrical Characteristics” specifies conditions of device operation.

Note 2: Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground unless otherwise

specified (such as VID).

Note 3: All typicals are given for: VCC = +3.3V and TA= +25˚C.

Note 4: ESD Rating: HBM (1.5 kΩ, 100 pF) ≥7kV

EIAJ (0Ω, 200 pF) ≥500V

Note 5: Output short circuit current (IOS) is specified as magnitude only, minus sign indicates direction only. Only one output should be shorted at a time, do not

exceed maximum junction temperature specification.

Note 6: CLincludes probe and jig capacitance.

Note 7: Generator waveform for all tests unless otherwise specified:f=1MHz, ZO=50Ω,t

rand tf(0% to 100%) ≤3 ns for RIN.

Note 8: tSKD1 is the magnitude difference in differential propagation delay time between the positive-going-edge and the negative-going-edge of the same channel.

Note 9: tSKD3, part to part skew, is the differential channel-to-channel skew of any event between devices. This specification applies to devices at the same VCC

and within 5˚C of each other within the operating temperature range.

DS90LV018A

www.national.com 2

Switching Characteristics (Continued)

Note 10: tSKD4, part to part skew, is the differential channel-to-channel skew of any event between devices. This specification applies to devices over the

recommended operating temperature and voltage ranges, and across process distribution. tSKD4 is defined as |Max − Min| differential propagation delay.

Note 11: VCC is always higher than RIN+ and RIN− voltage. RIN+ and RIN− are allowed to have voltage range −0.05V to +3.05V. VID is not allowed to be greater

than 100 mV when VCM =0Vor3V.

Note 12: fMAX generator input conditions: tr=t

f<1 ns (0% to 100%), 50% duty cycle, differential (1.05V to 1.35V peak to peak). Output criteria: 60%/40% duty

cycle, VOL (max 0.4V), VOH (min 2.7V), load = 15 pF (stray plus probes).

Parameter Measurement Information

Typical Application

Applications Information

General application guidelines and hints for LVDS drivers

and receivers may be found in the following application

notes: LVDS Owner’s Manual (lit #550062-001), AN808,

AN1035, AN977, AN971, AN916, AN805, AN903.

LVDS drivers and receivers are intended to be primarily used

in an uncomplicated point-to-point configuration as is shown

in Figure 3. This configuration provides a clean signaling

environment for the fast edge rates of the drivers. The re-

ceiver is connected to the driver through a balanced media

which may be a standard twisted pair cable, a parallel pair

cable, or simply PCB traces. Typically the characteristic

impedance of the media is in the range of 100Ω. A termina-

tion resistor of 100Ωshould be selected to match the media,

and is located as close to the receiver input pins as possible.

The termination resistor converts the driver output (current

mode) into a voltage that is detected by the receiver. Other

configurations are possible such as a multi-receiver configu-

ration, but the effects of a mid-stream connector(s), cable

stub(s), and other impedance discontinuities as well as

ground shifting, noise margin limits, and total termination

loading must be taken into account.

The DS90LV018A differential line receiver is capable of de-

tecting signals as low as 100 mV, over a ±1V common-mode

range centered around +1.2V. This is related to the driver

10007803

FIGURE 1. Receiver Propagation Delay and Transition Time Test Circuit

10007804

FIGURE 2. Receiver Propagation Delay and Transition Time Waveforms

Balanced System

10007805

FIGURE 3. Point-to-Point Application

DS90LV018A

www.national.com3

Applications Information (Continued)

offset voltage which is typically +1.2V. The driven signal is

centered around this voltage and may shift ±1V around this

center point. The ±1V shifting may be the result of a ground

potential difference between the driver’s ground reference

and the receiver’s ground reference, the common-mode ef-

fects of coupled noise, or a combination of the two. The AC

parameters of both receiver input pins are optimized for a

recommended operating input voltage range of 0V to +2.4V

(measured from each pin to ground). The device will still

operate for receivers input voltages up to V

, but exceeding

will turn on the ESD protection circuitry which will clamp

the bus voltages.

POWER DECOUPLING RECOMMENDATIONS

Bypass capacitors must be used on power pins. Use high

frequency ceramic (surface mount is recommended) 0.1µF

and 0.001µF capacitors in parallel at the power supply pin

with the smallest value capacitor closest to the device supply

pin. Additional scattered capacitors over the printed circuit

board will improve decoupling. Multiple vias should be used

to connect the decoupling capacitors to the power planes. A

10µF (35V) or greater solid tantalum capacitor should be

connected at the power entry point on the printed circuit

board between the supply and ground.

PC BOARD CONSIDERATIONS

Use at least 4 PCB board layers (top to bottom): LVDS

signals, ground, power, TTL signals.

Isolate TTL signals from LVDS signals, otherwise the TTL

signals may couple onto the LVDS lines. It is best to put TTL

and LVDS signals on different layers which are isolated by a

power/ground plane(s).

Keep drivers and receivers as close to the (LVDS port side)

connectors as possible.

DIFFERENTIAL TRACES

Use controlled impedance traces which match the differen-

tial impedance of your transmission medium (ie. cable) and

termination resistor. Run the differential pair trace lines as

close together as possible as soon as they leave the IC

(stubs should be <10mm long). This will help eliminate

reflections and ensure noise is coupled as commo-mode. In

fact, we have seen that differential signals which are 1mm

apart radiate far less noise than traces 3mm apart since

magnetic field cancellation is much better with the closer

traces. In addition, noise induced on the differential lines is

much more likely to appear as common-mode which is re-

jected by the receiver.

Match electrical lengths between traces to reduce skew.

Skew between the signals of a pair means a phase differ-

ence between signals which destroys the magnetic field

cancellation benefits of differential signals and EMI will re-

sult! (Note that the velocity of propagation,v=c/E

where c

(the speed of light) = 0.2997mm/ps or 0.0118 in/ps). Do not

rely solely on the autoroute function for differential traces.

Carefully review dimensions to match differential impedance

and provide isolation for the differential lines. Minimize the

number of vias and other discontinuities on the line.

Avoid 90˚ turns (these cause impedance discontinuities).

Use arcs or 45˚ bevels.

Within a pair of traces, the distance between the two traces

should be minimized to maintain common-mode rejection of

the receivers. On the printed circuit board, this distance

should remain constant to avoid discontinuities in differential

impedance. Minor violations at connection points are allow-

able.

TERMINATION

Use a termination resistor which best matches the differen-

tial impedance or your transmission line. The resistor should

be between 90Ωand 130Ω. Remember that the current

mode outputs need the termination resistor to generate the

differential voltage. LVDS will not work without resistor ter-

mination. Typically, connecting a single resistor across the

pair at the receiver end will suffice.

Surface mount 1% - 2% resistors are the best. PCB stubs,

component lead, and the distance from the termination to the

receiver inputs should be minimized. The distance between

the termination resistor and the receiver should be <10mm

(12mm MAX).

FAIL-SAFE FEATURE

The LVDS receiver is a high gain, high speed device that

amplifies a small differential signal (20mV) to CMOS logic

levels. Due to the high gain and tight threshold of the re-

ceiver, care should be taken to prevent noise from appearing

as a valid signal.

The receiver’s internal fail-safe circuitry is designed to

source/sink a small amount of current, providing fail-safe

protection (a stable known state of HIGH output voltage) for

floating, terminated or shorted receiver inputs.

1. Open Input Pins. The DS90LV018A is a single receiver

device. Do not tie the receiver inputs to ground or any

other voltages. The input is biased by internal high value

pull up and pull down resistors to set the output to a

HIGH state. This internal circuitry will guarantee a HIGH,

stable output state for open inputs.

2. Terminated Input. If the driver is disconnected (cable

unplugged), or if the driver is in a power-off condition,

the receiver output will again be in a HIGH state, even

with the end of cable 100Ωtermination resistor across

the input pins. The unplugged cable can become a

floating antenna which can pick up noise. If the cable

picks up more than 10mV of differential noise, the re-

ceiver may see the noise as a valid signal and switch. To

insure that any noise is seen as common-mode and not

differential, a balanced interconnect should be used.

Twisted pair cable will offer better balance than flat

ribbon cable.

3. Shorted Inputs. If a fault condition occurs that shorts

the receiver inputs together, thus resulting in a 0V differ-

ential input voltage, the receiver output will remain in a

HIGH state. Shorted input fail-safe is not supported

across the common-mode range of the device (GND to

2.4V). It is only supported with inputs shorted and no

external common-mode voltage applied.

External lower value pull up and pull down resistors (for a

stronger bias) may be used to boost fail-safe in the presence

of higher noise levels. The pull up and pull down resistors

should be in the 5kΩto 15kΩrange to minimize loading and

waveform distortion to the driver. The common-mode bias

point should be set to approximately 1.2V (less than 1.75V)

to be compatible with the internal circuitry.

PROBING LVDS TRANSMISSION LINES

Always use high impedance (>100kΩ), low capacitance

(<2 pF) scope probes with a wide bandwidth (1 GHz)

scope. Improper probing will give deceiving results.

DS90LV018A

www.national.com 4

Applications Information (Continued)

CABLES AND CONNECTORS, GENERAL COMMENTS

When choosing cable and connectors for LVDS it is impor-

tant to remember:

Use controlled impedance media. The cables and connec-

tors you use should have a matched differential impedance

of about 100Ω. They should not introduce major impedance

discontinuities.

Balanced cables (e.g. twisted pair) are usually better than

unbalanced cables (ribbon cable, simple coax) for noise

reduction and signal quality. Balanced cables tend to gener-

ate less EMI due to field canceling effects and also tend to

pick up electromagnetic radiation a common-mode (not dif-

ferential mode) noise which is rejected by the receiver.

For cable distances <0.5M, most cables can be made to

work effectively. For distances 0.5M ≤d≤10M, CAT 3

(category 3) twisted pair cable works well, is readily available

and relatively inexpensive.

Pin Descriptions

Pin No. Name Description

- Inverting receiver input pin

+ Non-inverting receiver input pin

OUT

Receiver output pin

Power supply pin, +3.3V ±0.3V

5 GND Ground pin

3, 4, 6 NC No connection

Ordering Information

Operating Package Type/ Order Number

Temperature Number

−40˚C to +85˚C SOP/M08A DS90LV018ATM

Typical Performance Characteristics

Output High Voltage vs

Power Supply Voltage

Output Low Voltage vs

Power Supply Voltage

10007807 10007808

DS90LV018A

www.national.com5

Typical Performance Characteristics (Continued)

Output Short Circuit Current vs

Power Supply Voltage

Differential Transition Voltage vs

Power Supply Voltage

10007809 10007810

Power Supply Current

vs Frequency

Power Supply Current vs

Ambient Temperature

10007811 10007812

Differential Propagation Delay vs

Power Supply Voltage

Differential Propagation Delay vs

Ambient Temperature

10007813 10007814

DS90LV018A

www.national.com 6

Typical Performance Characteristics (Continued)

Differential Skew vs

Power Supply Voltage

Differential Skew vs

Ambient Temperature

10007815 10007816

Differential Propagation Delay vs

Differential Input Voltage

Differential Propagation Delay vs

Common-Mode Voltage

10007817 10007818

Transition Time vs

Power Supply Voltage

Transition Time vs

Ambient Temperature

10007819 10007820

DS90LV018A

www.national.com7

Typical Performance Characteristics (Continued)

Differential Propagation Delay

vs Load

Transition Time

vs Load

10007822

10007823

Differential Propagation Delay

vs Load

Transition Time

vs Load

10007821

10007824

DS90LV018A

www.national.com 8

Physical Dimensions inches (millimeters)

unless otherwise noted

8-Lead (0.150" Wide) Molded Small Outline Package, JEDEC

Order Number DS90LV018ATM

NS Package Number M08A

National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves

the right at any time without notice to change said circuitry and specifications.

For the most current product information visit us at www.national.com.

LIFE SUPPORT POLICY

NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS

WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR

CORPORATION. As used herein:

1. Life support devices or systems are devices or systems

which, (a) are intended for surgical implant into the body, or

(b) support or sustain life, and whose failure to perform when

properly used in accordance with instructions for use

provided in the labeling, can be reasonably expected to result

in a significant injury to the user.

2. A critical component is any component of a life support

device or system whose failure to perform can be reasonably

expected to cause the failure of the life support device or

system, or to affect its safety or effectiveness.

BANNED SUBSTANCE COMPLIANCE

National Semiconductor manufactures products and uses packing materials that meet the provisions of the Customer Products

Stewardship Specification (CSP-9-111C2) and the Banned Substances and Materials of Interest Specification (CSP-9-111S2) and contain

no ‘‘Banned Substances’’ as defined in CSP-9-111S2.

Leadfree products are RoHS compliant.

National Semiconductor

Americas Customer

Support Center

Email: new.feedback@nsc.com

Tel: 1-800-272-9959

National Semiconductor

Europe Customer Support Center

Fax: +49 (0) 180-530 85 86

Email: europe.support@nsc.com

Deutsch Tel: +49 (0) 69 9508 6208

English Tel: +44 (0) 870 24 0 2171

Français Tel: +33 (0) 1 41 91 8790

National Semiconductor

Asia Pacific Customer

Support Center

Email: ap.support@nsc.com

National Semiconductor

Japan Customer Support Center

Fax: 81-3-5639-7507

Email: jpn.feedback@nsc.com

Tel: 81-3-5639-7560

www.national.com

DS90LV018A 3V LVDS Single CMOS Differential Line Receiver

IMPORTANT NOTICE

Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements,

and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should

obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are

sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.

TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard

warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where

mandated by government requirements, testing of all parameters of each product is not necessarily performed.

TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and

applications using TI components. To minimize the risks associated with customer products and applications, customers should provide

adequate design and operating safeguards.

TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right,

or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information

published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a

warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual

property of the third party, or a license from TI under the patents or other intellectual property of TI.

Reproduction of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied

by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive

business practice. TI is not responsible or liable for such altered documentation. Information of third parties may be subject to additional

restrictions.

Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all

express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not

responsible or liable for any such statements.

TI products are not authorized for use in safety-critical applications (such as life support) where a failure of the TI product would reasonably

be expected to cause severe personal injury or death, unless officers of the parties have executed an agreement specifically governing

such use. Buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications, and

acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products

and any use of TI products in such safety-critical applications, notwithstanding any applications-related information or support that may be

provided by TI. Further, Buyers must fully indemnify TI and its representatives against any damages arising out of the use of TI products in

such safety-critical applications.

TI products are neither designed nor intended for use in military/aerospace applications or environments unless the TI products are

specifically designated by TI as military-grade or "enhanced plastic."Only products designated by TI as military-grade meet military

specifications. Buyers acknowledge and agree that any such use of TI products which TI has not designated as military-grade is solely at

the Buyer's risk, and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use.

TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products are

designated by TI as compliant with ISO/TS 16949 requirements. Buyers acknowledge and agree that, if they use any non-designated

products in automotive applications, TI will not be responsible for any failure to meet such requirements.

Following are URLs where you can obtain information on other Texas Instruments products and application solutions:

Products Applications

Audio www.ti.com/audio Communications and Telecom www.ti.com/communications

Amplifiers amplifier.ti.com Computers and Peripherals www.ti.com/computers

Data Converters dataconverter.ti.com Consumer Electronics www.ti.com/consumer-apps

DLP®Products www.dlp.com Energy and Lighting www.ti.com/energy

DSP dsp.ti.com Industrial www.ti.com/industrial

Clocks and Timers www.ti.com/clocks Medical www.ti.com/medical

Interface interface.ti.com Security www.ti.com/security

Logic logic.ti.com Space, Avionics and Defense www.ti.com/space-avionics-defense

Power Mgmt power.ti.com Transportation and Automotive www.ti.com/automotive

Microcontrollers microcontroller.ti.com Video and Imaging www.ti.com/video

RFID www.ti-rfid.com

OMAP Mobile Processors www.ti.com/omap

Wireless Connectivity www.ti.com/wirelessconnectivity

TI E2E Community Home Page e2e.ti.com

Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265