JANSR2N7440 Data Sheet Formerly Available as FSS913A0R4, Radiation Hardened, SEGR Resistant, P-Channel Power MOSFETs The Discrete Products Operation of Intersil has developed a series of Radiation Hardened MOSFETs specifically designed for commercial and military space applications. Enhanced Power MOSFET immunity to Single Event Effects (SEE), Single Event Gate Rupture (SEGR) in particular, is combined with 100K RADS of total dose hardness to provide devices which are ideally suited to harsh space environments. The dose rate and neutron tolerance necessary for military applications have not been sacrificed. [ /Title (JANS R2N74 40) /Subject (Formerly The Intersil portfolio of SEGR resistant radiation hardened MOSFETs includes N-Channel and P-Channel devices in a Available as variety of voltage, current and on-resistance ratings. FSS91 Numerous packaging options are also available. 3A0R4 This MOSFET is an enhancement-mode silicon-gate power , Radi- field-effect transistor of the vertical DMOS (VDMOS) structure. It is specially designed and processed to be ation radiation tolerant. The MOSFET is well suited for Hardapplications exposed to radiation environments such as ened, switching regulation, switching converters, motor drives, SEGR relay drivers and drivers for high-power bipolar switching transistors requiring high speed and low gate drive power. ResisThis type can be operated directly from integrated circuits. tant, P-Chan- Also available at other radiation and screening levels. See us on the web, Intersil's home page: http://www.intersil.com. nel Power Contact your local Intersil Sales Office for additional information. MOSFETs) Ordering Information /Autho PART NUMBER PACKAGE BRAND r () JANSR2N7440 TO-257AA JANSR2N7440 /Keywords Die Family TA17796. (InterMIL-PRF-19500/659. sil Corporation, semiconductor, Formerly (c)2001 Fairchild Semiconductor Corporation November 1999 File Number 4803 Features * 10A, -100V, rDS(ON) = 0.280 * Total Dose - Meets Pre-RAD Specifications to 100K RAD (Si) * Single Event - Safe Operating Area Curve for Single Event Effects - SEE Immunity for LET of 36MeV/mg/cm2 with VDS up to 80% of Rated Breakdown and VGS of 10V Off-Bias * Dose Rate - Typically Survives 3E9 RAD (Si)/s at 80% BVDSS - Typically Survives 2E12 if Current Limited to IDM * Photo Current - 1.5nA Per-RAD(Si)/s Typically * Neutron - Maintain Pre-RAD Specifications for 3E13 Neutrons/cm2 - Usable to 3E14 Neutrons/cm2 Symbol D G S Packaging TO-257AA S D G CAUTION: Beryllia Warning per MIL-S-19500 refer to package specifications. JANSR2N7440 Rev. A JANSR2N7440 Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified Drain to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS Drain to Gate Voltage (RGS = 20k) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR Continuous Drain Current TC = 25oC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID JANSR2N7440 -100 -100 UNITS V V 10 A TC = 100oC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS Maximum Power Dissipation TC = 25oC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PT 6 30 20 A A V 56 W TC = 100oC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PT Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Single Pulsed Avalanche Current, L = 100H, (See Test Figure) . . . . . . . . . . . . . . . . . . . . . . . . IAS Continuous Source Current (Body Diode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IS Pulsed Source Current (Body Diode). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ISM 22 0.45 30 10 30 W W/oC A A A Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL (Distance >0.063in (1.6mm) from Case, 10s Max) Weight (Typical) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55 to 150 300 oC 4.4 g oC CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Electrical Specifications TC = 25oC, Unless Otherwise Specified PARAMETER Drain to Source Breakdown Voltage Gate Threshold Voltage Zero Gate Voltage Drain Current Gate to Source Leakage Current Drain to Source On-State Voltage Drain to Source On Resistance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time SYMBOL BVDSS VGS(TH) IDSS IGSS VDS(ON) rDS(ON)12 td(ON) tr TEST CONDITIONS ID = 1mA, VGS = 0V VGS = VDS, ID = 1mA VDS = -80V, VGS = 0V VGS = 20V TC = -55oC TC = 25oC TC = 125oC TC = 25oC TC = 125oC TC = 25oC TC = 125oC VGS = -12V, ID = 10A ID = 6A, VGS = -12V TC = 25oC TC = 125oC VDD = -50V, ID = 10A, RL = 5.0, VGS = -12V, RGS = 7.5 td(OFF) TYP MAX UNITS - - V - - -7.0 V -2.0 - -6.0 V -1.0 - - V - - 25 A - - 250 A - - 100 nA - - 200 nA - - -3.10 V - 0.190 0.280 - - 0.500 - - 20 ns - - 55 ns - - 45 ns - - 35 ns - - 60 nC - 36 40 nC - - 2.5 nC Qgs - 6.6 7.4 nC Gate Charge Drain Qgd - 17 19 nC Thermal Resistance Junction to Case RJC - - 2.2 oC/W Thermal Resistance Junction to Ambient RJA - - 60 oC/W Total Gate Charge (Not on slash sheet) tf MIN -100 Qg(TOT) VGS = 0V to -20V Gate Charge at 12V Qg(12) VGS = 0V to -12V Threshold Gate Charge (Not on slash sheet) Qg(TH) VGS = 0V to -2V Gate Charge Source (c)2001 Fairchild Semiconductor Corporation VDD = -50V, ID = 10A JANSR2N7440 Rev. A JANSR2N7440 Source to Drain Diode Specifications PARAMETER SYMBOL Forward Voltage VSD Reverse Recovery Time TEST CONDITIONS ISD = 10A MIN TYP MAX -0.6 - -1.8 V - - 160 ns ISD = 10A,dISD/dt = 100A/s trr Electrical Specifications up to 100K RAD UNITS TC = 25oC, Unless Otherwise Specified PARAMETER SYMBOL TEST CONDITIONS MIN MAX UNITS Drain to Source Breakdown Volts (Note 3) BVDSS VGS = 0, ID = 1mA -100 - V Gate to Source Threshold Volts (Note 3) VGS(TH) VGS = VDS, ID = 1mA -2.0 -6.0 V Gate to Body Leakage (Notes 2, 3) IGSS VGS = 20V, VDS = 0V - 100 nA Zero Gate Leakage (Note 3) IDSS VGS = 0, VDS = -80V - 25 A Drain to Source On-State Volts (Notes 1, 3) VDS(ON) VGS = -12V, ID = 10A - -3.10 V Drain to Source On Resistance (Notes 1, 3) rDS(ON)12 VGS = -12V, ID = 6A - 0.280 NOTES: 1. Pulse test, 300s Max. 2. Absolute value. 3. Insitu Gamma bias must be sampled for both VGS = -12V, VDS = 0V and VGS = 0V, VDS = 80% BVDSS . Single Event Effects (SEB, SEGR) Note 4 ENVIRONMENT (NOTE 5) TEST SYMBOL Single Event Effects Safe Operating Area SEESOA ION SPECIES TYPICAL LET (MeV/mg/cm) TYPICAL RANGE () APPLIED VGS BIAS (V) (NOTE 6) MAXIMUM VDS BIAS (V) Ni 26 43 20 -100 Br 37 36 10 -100 Br 37 36 15 -80 Br 37 36 20 -50 NOTES: 4. Testing conducted at Brookhaven National Labs; sponsored by Naval Surface Warfare Center (NSWC), Crane, IN. 5. Fluence = 1E5 ions/cm2 (typical), TC = 25oC. 6. Does not exhibit Single Event Burnout (SEB) or Single Event Gate Rupture (SEGR). Performance Curves LET = 26MeV/mg/cm2, RANGE = 43 LET = 37MeV/mg/cm2, RANGE = 36 LIMITING INDUCTANCE (HENRY) -120 1E-3 FLUENCE = 1E5 IONS/cm2 (TYPICAL) -100 VDS (V) -80 -60 -40 -20 0 TEMP = 25oC 0 5 10 15 20 25 VGS (V) FIGURE 1. SINGLE EVENT EFFECTS SAFE OPERATING AREA (c)2001 Fairchild Semiconductor Corporation 1E-4 ILM = 10A 30A 1E-5 100A 300A 1E-6 1E-7 -10 -30 -100 -300 -1000 DRAIN SUPPLY (V) FIGURE 2. TYPICAL DRAIN INDUCTANCE REQUIRED TO LIMIT GAMMA DOT CURRENT TO IAS JANSR2N7440 Rev. A JANSR2N7440 Performance Curves (Continued) 12 100 ID , DRAIN CURRENT (A) ID , DRAIN (A) 10 8 6 4 TC = 25oC 100s 10 1ms 10ms 1 2 0 -50 0 50 100 0.1 150 100ms OPERATION IN THIS AREA MAY BE LIMITED BY rDS(ON) -10 -1 TC , CASE TEMPERATURE (oC) -100 -300 VDS , DRAIN-TO-SOURCE VOLTAGE (V) FIGURE 3. MAXIMUM CONTINUOUS DRAIN CURRENT vs TEMPERATURE FIGURE 4. FORWARD BIAS SAFE OPERATING AREA 2.5 PULSE DURATION = 250ms, VGS = -12V, ID = 6A NORMALIZED rDS(ON) 2.0 QG -12V QGD QGS 1.5 1.0 0.5 VG 0.0 -80 -40 0 40 80 120 160 TJ , JUNCTION TEMPERATURE (oC) CHARGE FIGURE 5. BASIC GATE CHARGE WAVEFORM FIGURE 6. TYPICAL NORMALIZED rDS(ON) vs JUNCTION TEMPERATURE NORMALIZED THERMAL RESPONSE (ZJC) 10 1 0.5 0.1 0.2 0.1 0.05 0.02 0.01 SINGLE PULSE PDM 0.01 0.001 10-5 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZJC + TC 10-4 10-3 t1 t2 10-2 10-1 100 101 t, RECTANGULAR PULSE DURATION (s) FIGURE 7. NORMALIZED MAXIMUM TRANSIENT THERMAL RESPONSE (c)2001 Fairchild Semiconductor Corporation JANSR2N7440 Rev. A JANSR2N7440 Performance Curves (Continued) IAS , AVALANCHE CURRENT (A) 40 STARTING TJ = 25oC 10 STARTING TJ = 150oC IF R = 0 tAV = (L) (IAS) / (1.3 RATED BVDSS - VDD) IF R 0 tAV = (L/R) ln [(IAS*R) / (1.3 RATED BVDSS - VDD) + 1] 1 0.01 0.1 1 tAV , TIME IN AVALANCHE (ms) 10 FIGURE 8. UNCLAMPED INDUCTIVE SWITCHING Test Circuits and Waveforms ELECTRONIC SWITCH OPENS WHEN IAS IS REACHED VDS L BVDSS + CURRENT I TRANSFORMER AS tP - VARY tP TO OBTAIN REQUIRED PEAK IAS 0V VDS IAS VDD + 50 - tP VDD 50V-150V DUT 50 VGS 20V tAV FIGURE 9. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 10. UNCLAMPED ENERGY WAVEFORMS tON VDD tOFF td(ON) td(OFF) tr RL VDS tf 90% 90% VDS 0V 10% DUT VGS = -12V 10% 90% RGS 50% VGS 50% PULSE WIDTH 10% FIGURE 11. RESISTIVE SWITCHING TEST CIRCUIT (c)2001 Fairchild Semiconductor Corporation FIGURE 12. RESISTIVE SWITCHING WAVEFORMS JANSR2N7440 Rev. A JANSR2N7440 Screening Information Screening is performed in accordance with the latest revision in effect of MIL-S-19500, (Screening Information Table). Delta Tests and Limits (JANS) TC = 25oC, Unless Otherwise Specified PARAMETER SYMBOL TEST CONDITIONS MAX UNITS Gate to Source Leakage Current IGSS VGS = 20V 20 (Note 7) nA Zero Gate Voltage Drain Current IDSS VDS = 80% Rated Value 25 (Note 7) A Drain to Source On Resistance rDS(ON) TC = 25oC at Rated ID 20% (Note 8) Gate Threshold Voltage VGS(TH) ID = 1.0mA 20% (Note 8) V NOTES: 7. Or 100% of Initial Reading (whichever is greater). 8. Of Initial Reading. Screening Information TEST JANS Unclamped Inductive Switching VGS(PEAK) = -15V, L = 0.1mH; Limit = 30A Thermal Response tH = 100ms; VH = -25V; IH = 1A; Limit = 85mV Gate Stress VGS = -30V, t = 250s Pind Required Pre Burn-In Tests (Note 9) MIL-S-19500 Group A, Subgroup 2 (All Static Tests at 25oC) Steady State Gate Bias (Gate Stress) MIL-STD-750, Method 1042, Condition B VGS = 80% of Rated Value, TA = 150oC, Time = 48 hours Interim Electrical Tests (Note 9) All Delta Parameters Listed in the Delta Tests and Limits Table Steady State Reverse Bias (Drain Stress) MIL-STD-750, Method 1042, Condition A VDS = 80% of Rated Value, TA = 150oC, Time = 240 hours PDA 5% Final Electrical Tests (Note 9) MIL-S-19500, Group A, Subgroups 2 and 3 NOTE: 9. Test limits are identical pre and post burn-in. Additional Screening Tests MAX UNITS Safe Operating Area PARAMETER SOA VDS = -80V, t = 10ms 1.9 A Thermal Impedance VSD tH = 500ms; VH = -25V; IH = 1A 125 mV (c)2001 Fairchild Semiconductor Corporation SYMBOL TEST CONDITIONS JANSR2N7440 Rev. A JANSR2N7440 Rad Hard Data Packages - Intersil Power Transistors 1. JANS Rad Hard - Standard Data Package A. Certificate of Compliance B. Serialization Records C. Assembly Flow Chart D. SEM Photos and Report E. Preconditioning - Attributes Data Sheet - Hi-Rel Lot Traveler - HTRB - Hi Temp Gate Stress Post Reverse Bias Data and Delta Data - HTRB - Hi Temp Drain Stress Post Reverse Bias Delta Data F. Group A - Attributes Data Sheet G. Group B - Attributes Data Sheet H. Group C - Attributes Data Sheet I. Group D - Attributes Data Sheet 2. JANS Rad Hard - Optional Data Package A. Certificate of Compliance B. Serialization Records C. Assembly Flow Chart D. SEM Photos and Report E. Preconditioning - Attributes Data Sheet - Hi-Rel Lot Traveler - HTRB - Hi Temp Gate Stress Post Reverse Bias Data and Delta Data - HTRB - Hi Temp Drain Stress Post Reverse Bias Delta Data - X-Ray and X-Ray Report F. Group A - Attributes Data Sheet - Hi-Rel Lot Traveler - Subgroups A2, A3, A4, A5 and A7 Data G. Group B - Attributes Data Sheet - Hi-Rel Lot Traveler - Subgroups B1, B3, B4, B5 and B6 Data H. Group C - Attributes Data Sheet - Hi-Rel Lot Traveler - Subgroups C1, C2, C3 and C6 Data I. Group D - Attributes Data Sheet - Hi-Rel Lot Traveler - Pre and Post Radiation Data (c)2001 Fairchild Semiconductor Corporation JANSR2N7440 Rev. A JANSR2N7440 TO-257AA 3 LEAD JEDEC TO-257AA HERMETIC METAL PACKAGE A OP E INCHES A1 Q H1 D SYMBOL MIN MAX MIN MAX NOTES A 0.190 0.200 4.83 5.08 - A1 0.035 0.045 0.89 1.14 2, 3 Ob 0.025 0.035 0.64 0.88 Ob1 0.060 0.090 1.53 2.28 - D 0.645 0.665 16.39 16.89 - E 0.410 0.420 10.42 10.66 e 0.065 R TYP. L1 e1 Ob1 H1 L Ob 1 2 3 e e1 J1 MILLIMETERS 0.100 TYP 0.200 BSC - 2.54 TYP 4 5.08 BSC 4 0.230 0.250 5.85 6.35 - J1 0.110 0.130 L 0.600 0.650 2.80 3.30 4 15.24 16.51 L1 - 0.035 - 0.88 - OP 0.140 0.150 3.56 3.81 - Q 0.113 0.133 2.88 3.37 - - NOTES: 1. These dimensions are within allowable dimensions of Rev. B of JEDEC TO-257AA dated 9-88. 2. Add typically 0.002 inches (0.05mm) for solder coating. 3. Lead dimension (without solder). 4. Position of lead to be measured 0.150 inches (3.81mm) from bottom of dimension D. 5. Die to base BeO isolated, terminals to case ceramic isolated. 6. Controlling dimension: Inch. 7. Revision 1 dated 1-93. WARNING! BERYLLIA WARNING PER MIL-S-19500 Packages containing beryllium oxide (BeO) shall not be ground, machined, sandblasted, or subject to any mechanical operation which will produce dust containing any beryllium compound. Packages containing any beryllium compound shall not be subjected to any chemical process (etching, etc.) which will produce fumes containing beryllium or its' compounds. (c)2001 Fairchild Semiconductor Corporation JANSR2N7440 Rev. A TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACExTM BottomlessTM CoolFETTM CROSSVOLTTM DenseTrenchTM DOMETM EcoSPARKTM E2CMOSTM EnSignaTM FACTTM FACT Quiet SeriesTM FAST FASTrTM GlobalOptoisolatorTM GTOTM HiSeCTM ISOPLANARTM LittleFETTM MicroFETTM MICROWIRETM OPTOLOGICTM OPTOPLANARTM PACMANTM POPTM PowerTrench QFETTM QSTM QT OptoelectronicsTM Quiet SeriesTM SILENT SWITCHER SMART STARTTM Star* PowerTM StealthTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8 SyncFETTM TinyLogicTM UHCTM UltraFET VCXTM DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. H1