AMD-K6-2E/233AFR - Advanced Micro Devices

PRELIMINARY

Issue Date: December 1999

AMD-K6™-2E Embedded Processor

Standard- and Low-Power Processor Featuring Super7™ and Socket 7

Platform Compatibility, Superscalar MMX™ Unit, and 3DNow!™ Technology

DISTINCTIVE CHARACTERISTICS

■Advanced 6-Issue RISC86® Superscalar

Microarchitecture

– Ten parallel specialized execution units

– Multiple sophisticated x86-to-RISC86 instruction

decoders

– Advanced two-level branch prediction

– Speculative execution

– Out-of-or de r exe cu tio n

– Register renaming and data forwarding

– Up to six RISC86 instructions per clock

■Large On-Chip Split 64-Kbyte Level-One (L1)

Cache

– 32-Kbyte instruction cache with additional

20 Kbytes of predecode cache

– 32-Kbyte writeback dual-ported data cache

– Two-wa y set asso ci ati ve

– MESI protocol support

■3DNow!™ Technology

– Additional instructions to improve 3D graphics

and multimedia performance

– Separate multiplier and ALU for superscalar

instruction execution

■321-Pin Ceramic Pin Grid Array (CPGA)

Package

■Socket 7 Platform Compatible, 6 6-MHz

Frontside Bus

■Super7™ Platform Compatible, 100-MHz

Frontside Bus Supported on the 300-MHz and

350-MHz Versions of the AMD-K6-2E Processor

■High-Performance Industry-Standard MMX™

Instructions

– Dual integer ALU for superscalar execution

■High-Performance IEEE 754-Compatible and

854-Compatible Floating-Point Unit

■Industry-Standard System Management Mode

(SMM)

■IEEE 1149.1 Boundary Scan

■x86 Binary Software Compatibility

■Low-Power 0.25-micron Process Technology

– Split-plane power with support for full 3.3 V I/O

– Available with a low-power 1.9-V core voltage

and extended temperature rating or with a

standard-power 2.2-V core voltage and standard

temperature rating

■Operating Frequencies

– Standard-power devices: 233, 266, 300, 333,

and 350 MHz

– Low-power devices: 233, 266, 300, and 333 MHz

GENERAL DESCRIPTION

The AMD-K6-2E processor with 3DNow!™ technology

is a functionally compatible embedded version of the

sixth generation, Microsoft® Windows® compatible

AMD-K6- 2 proc es so r.

The AMD-K6-2E embedded processor delivers the

same high performance and incorporates the same

leading-edge features, including the innovative and

efficient RISC86® m icroarchitectur e, a large 64-Kbyt e

level-one cache (32-Kbyte dual-ported data cache,

32-Kbyte i nstruction cache with predecode data), an d

a powerful IEEE 754-compatible and 854-compatible

floating-point execution unit.

The AMD-K6-2E embedded processor also supports

the new f eatu res in corpor ated i nto th e AMD -K6-2 pro-

cessor. These features include superscalar MMX™

instruction execution support, support for the Super7™

100-MHz frontside bus, and AMD’s innovative

3DNow!™ technology for high-performance multime-

dia and 3D graphics operation based on high-perfor-

mance single instruction multiple data (SIMD)

execution resources.

The AMD-K6-2E embedded processor includes

several key features that are very beneficial to the

embedded market. The AMD-K6-2E processor offers

leading-edge performance for embedded systems re-

quiring compatibility with the extensive installed base

of x86 software. The AMD-K6-2E processor’s Socket 7

and Super7 platform-compatible, 321-pin ceramic pin

grid array (CPGA) package allows the product de-

signer to reduce time-to-market by leveraging today’s

cost-effective industry-standard infrastructure to

deliver a superior-performing embedded solution.

2AMD-K6™-2E Processor Press Data Sheet

AMD-K6™-2E PROCESSOR FEATURES

The AMD-K6-2E embedded processor is available in

two versio ns.

■The low-power version has a 1.9-V core voltage

and extended temperature rating.

■The standard-power version has a 2.2-V core

voltage and is the embedded equivalent of the

industry-standard desktop version of the AMD-K6-2

processor.

System Management Mode and Power

Management

The AMD-K6-2E processor includes the complete

industry-standard system management mode (SMM),

which is critical to system resource and power

management.

The AMD-K6-2E processor also features industry-

standard Stop-Clock (STPCLK#) control circuitry and

the Halt instr uction, both required for implementing the

ACPI power management specification.

Microarchitecture

The AMD-K6-2E processor’s RISC86 microarchitec-

ture is a decoupled decode/execution superscalar

design that implements state-of-the-art techniques to

achieve leading-edge performance.

Advanced design techniques implemented in the

AMD-K6- 2E proc esso r includ e multi ple x86 instr uctio n

decode, single-clock internal RISC operations, ten

execution units that support superscalar operation,

out-of-order execution, data forwarding, speculative

execution, and re gis te r renam ing .

In addition, the processor supports advanced branch

prediction logic by implementing an 8192-entry branch

history table, a branch target cache, and a return ad-

dress stack, which combine to deliver better than a

95% prediction rate. These design techniques enable

the AMD-K6-2E to issue, execute, and retire multiple

x86 instructions per clock, resulting in excellent

scalable performance.

3DNow!™ Technology

AMD’s 3DNow! techno logy is an ins tructio n-set exte n-

sion to x86, which includes 21 new instructions to

accelerate 3D graphics and other single-precision

floating-point compute intensive operations.

Improve men ts inc lud e fas t frame r ate s on hi gh -res olu-

tion graphics applications, superior modeling of real-

world environments and physics, life-like images,

graphics, and audio.

AMD has already shipped millions of processors with

3DNow! technology for desktop and notebook PCs,

revolutionizing the 3D experience with up to four times

the peak floating-point performance of previous sixth

generation solutions. AMD is now bringing this ad-

vanced capability to embedded systems.

AMD has taken a leadership role in developing these

new instructions that enable exciting new levels of per-

formance and realism. 3DNow! technology was de-

fined and i mplemente d in coll aboration wi th Microsof t,

application developers, and graphics vendors, and has

received an enthusiastic reception. It is compatible with

today’s existing x86 software, is supported by indus-

try-standard APIs, and requires no operating system

support, thereby enabling a broad class of applications

to benefit from 3DNow! technology.

Industry-Standard x86 Architecture

The AMD-K6-2E processor is x86 binary code compat-

ible. AM D’s extensive experience w ith six generations

of x86 processors has been carefully integrated into

the proc essor to enable compatibil ity with W indows®-

based operating systems, including Windows 95,

Windows 98, Windows CE, Windows NT®, and

Windows NTE.

The AMD-K6-2E processor is also compatible with

DOS, OS/2, UNIX, and other leading operating sys-

tems, including real-time operating systems (RTOS)

commonly used in embedded applications such as

pSOS, QNX, RTXC, and VxWorks.

The AMD-K6-2E processor is compatible with more

than 60,000 s oftware applicati ons, including t he latest

software optimized for 3DNow! and MMX technologies.

AMD has shipped more than 120 million x86 micropro-

cessors, including more than 60 million Windows-

compatible processors.

The AMD-K6-2E processor is among a long line of

Microsof t Windows compatible processors from AMD.

The combination of state-of-the-art features, leading-

edge performance, high-performance multimedia

engine, x86 compatibility, and low-cost infrastructure

enable decreased development costs and improved

time-to-m arket, makin g the AMD-K6 -2E processo r the

superior choice for embedded systems.

Process Technology

The AMD-K6-2E processor is implemented using an

advanced CMOS 0.25-micron process technology that

utilizes a split core and I/O voltage supply , which allows

the core of the processor to operate at a low voltage

while the I/O portion opera tes at the industry -stand ard

3.3 V.

This technology enables high performance while

reducing power consumption by operating the core at a

low voltage and limiting power requirements to the

acceptable levels for today’s embedded systems.

AMD-K6™-2E Processor Press Data Sheet 3

Super7™ Platform Initiative

All AMD-K6-2E processors remain pin compatible with

existing Socket 7 solutions; however, for maximum

system performance, the 300-MHz and 350-MHz

versions of the processor work optimally in Super7

designs that incorporate advanced features such as

support for the 100-MHz frontside bus and AGP

graphics.

The Super7 platform has the following advantages:

■Delivers performance and features competitive with

alternate platforms at the same clock speed, and at

a significantly lower cost

■Takes advantage of existing system designs for

superior value

■Enables OEMs and resellers to take advantage of

mature, high-volume infrastructure supported by

multiple BIOS, chipse t, graph ics, an d mother board

suppliers

■Reduces inventory and design costs with one

motherboard for a wide range of products

■Builds on a huge installed base of more than 100

million motherboards

■Provides an easy upgrade path for future embed-

ded applications, as well as a bridge to legacy

applications

By taking a dvantage of the low-cost, matur e Socket 7

infrastructure, the Super7 platform will continue to

provid e superior value and l eading-edg e performa nce

for embedded systems.

Block Diagram

As shown in Figure 1, the high-performance, out-of-or-

der execution engine of the AMD-K6-2E processor is

mated to a split level-one 64-Kbyte writeback cache

with 32 Kbytes of instruction cache and 32 Kbytes of

data cac he. The instr uction cac he feeds t he decode rs

and, in turn, the d ecoders feed the schedul er. The In-

struction Control Unit (ICU) i ssues and retires RISC8 6

operations contained in the scheduler . The system bus

interface is an industry-standard 64-bit Super7 and

Socket 7 demultiplexed bus.

The AMD-K6-2E processor combines the latest in pro-

cessor microarchitecture to provide the highest x86

performance for today’s computational systems. The

AMD-K6-2E offers true sixth-generation performance

and x86 binary software compatibility

Figure 1. AMD-K6™-2E Processor Block Diagram

Store

Unit Branch

Unit

Store

Queue

Instruction

Control Unit

Scheduler

Buffer

(24 RISC86)

Six RISC86 ®

Operation Issue

Four RISC86

Decode

Out-of-Order

Execution Engine

32-KByte Level-One Dual-Port Data Cache 128-Entry DTLB

20-KByte Predecode Cache 64-Entry ITLB

Multiple Instruction Decoders

x86 to RISC86

Branch Logic

(8192-Entry BHT)

(16-Entry BTC)

(16-Entry RAS)

16-Byte Fetch

Load

Unit

Predecode

Logic

Level-One Cache

Controller

FPU

32-KByte Level-One Instruction Cache

Integer/

Multimedia /3DNow!

100 MHz

Super7



Bus

Interface

Integer/

Multimedia/3DNow!

4AMD-K6™-2E Processor Press Data Sheet

ORDERING INFORMATION

AMD standard- and low-power products are available in several operating ranges. The ordering part number (OPN)

is formed by a combination of the elements below. See Table 1 for valid ordering part number combinations.

Table 1. Valid Ordering Part Number Combinations1

Notes:

1. This table lists con figurati ons pla nned to be sup ported in vo lume for thi s device. C onsul t the local AMD sa les office to co n fir m

availability of specific valid combinations and to check on newly-released combinations.

Device

Type OPN Package Type Operating Voltage Case

Temperature Maximum CPU/Bus

Frequency

Low

Power

AMD-K6-2E/33 3AMZ 321-pin CPGA 1.8V–2.0V (Core)

3.135V–3.6V (I/O) 0°C–85°C 333 MHz/95 MHz2

2. Also supports 66-MHz bus operation.

AMD-K6-2E/300AMZ 321-pin C PGA 1.8V–2.0V (Core)

3.135V–3.6V (I/O) 0°C–85°C 300 MHz/100 MHz2

AMD-K6-2E/266AMZ 321-pin C PGA 1.8V–2.0V (Core)

3.135V–3.6V (I/O) 0°C–85°C 266 MHz/66 MHz

AMD-K6-2E/233AMZ 321-pin C PGA 1.8V–2.0V (Core)

3.135V–3.6V (I/O) 0°C–85°C 233 MHz/66 MHz

Standard

Power

AMD-K6-2E/350AFR 321-pin CPGA 2.1V–2.3V (Core)

3.135V–3.6V (I/O) 0°C–70°C 350 MHz/100 MHz

AMD-K6-2E/333AFRl 321-pin C PGA 2.1V–2.3V (Core)

3.135V–3.6V (I/O) 0°C–70°C 333 MHz/95 MHz2

AMD-K6-2E/300AFR 321-pin CPGA 2.1V–2.3V (Core)

3.135V–3.6V (I/O) 0°C–70°C 300 MHz/100 MHz2

AMD-K6-2E/266AFR 321-pin CPGA 2.1V–2.3V (Core)

3.135V–3.6V (I/O) 0°C–70°C 266 MHz/66 MHz

AMD-K6-2E/233AFR 321-pin CPGA 2.1V–2.3V (Core)

3.135V–3.6V (I/O) 0°C–70°C 233 MHz/66 MHz

AAMD-K6-2E/

Package Type

Family/Core

A =321-pin Ceramic Pin Grid Array (CPGA)

AMD-K6-2E Embedded Processor

Case Temperature

R=0°C–70°C

Z =0°C–85°C

350

Performance Rating

/350 = 350 MHz

/333 = 333 MHz

/300 = 300 MHz

/266 = 266 MHz

/233 = 233 MHz

Operating Voltage

F =2.1 V–2.3 V (Core) / 3.135 V–3.6 V (I/O)

M =1.8 V–2.0 V (Core) / 3.135 V–3.6 V (I/O)

F R

AMD-K6™-2E Processor Press Data Sheet 5

OPERATING RANGES

The AMD -K6-2E proc essor is d esigned t o provide functional o peration if the vo ltage and t emperature parameters

are within the limits defined in Table 2.

ABSOLUTE RATINGS

The AMD-K6-2E processor is not designed to be oper-

ated beyond the operating ranges listed in Table 2.

Exposure to conditions outside these operating ranges

for extended periods of time can affect long-term reli-

ability. Permanent damage can occur if the absolute

ratings listed in Table 3 are exceeded.

Note: If the AMD-K6-2E processor shows a “7” after

the date code, refer to the numbers in the last (right-

most) column of Table 3. The

AMD-K6®-2 Revision

Guide

(order #21641) available on AMD’s web site

contains package marking details, including the

location of the date code



Table 2. Operating Ranges

Parameter Parameter Description Minimum Typical Maximum

VCC21

Notes:

1. V

CC2

and V

CC3

are referenced from V

Core Supply Voltage—Low Power2

2. V

CC2

specification for 1.9-V component.

1.8 V 1.9 V 2.0 V

Core Supply Voltage—Standard Power3

3. V

CC2

specification for 2.2-V component.

2.1 V 2.2 V 2.3 V

VCC31I/O Supply Voltage—Standard and Low Power 3.135 V 3.3 V 3.6 V

TCASE Case Temperature—Low Power4

4. Case tempera ture range required for AMD -K6-2E/xxxAM Z valid ordering part numb er combinations , where xxx repres ents the

processor core frequency.

0C– 85C

Case Temperature—Standard Power5

5. Case te mperature range requi red for AMD-K6 -2E/xxxAFR v alid order ing part nu mber com binations, w here xxx re presents the

processor core frequency.

0C– 70C

Table 3. Absolute Ratings

Parameter Minimum Maximum for OPN Suffixes:

233AFR, 233AMZ, 266AFR, 266AMZ, 300AFR1

Notes:

1. The data in this column applies to OPN suffixes 233AFR, 233AMZ, 266AFR, 266AMZ, and 300AFR, provided that the

proc ess or is

not

marked with “7” following the date code (i.e., is blank).

Maximum for All OPNs2

2. The da ta in this colum n applies to all OPNs lis ted in Table 1, “V alid Ord ering Part Number C ombinations ,” on page 4 (including

233AFR, 233AMZ, 266AFR, 266AMZ, and 300AFR when the processor is marked with a “7” following the date code).

VCC2 –0.5 V 2.6 V 2.4 V

VCC3 –0.5 V 3.6 V 3.6 V

VPIN3

3. V

(the v oltage on an y I/O pi n) mu st not be greater th an 0.5 V abov e the volta ge be ing ap plied to V

CC3

. In addition, the V

voltage must never exceed 4.0 V.

–0.5 V VCC3 + 0.5 V and < 4.0 V VCC3 + 0.5 V and < 4.0 V

TCASE (under bias) –65C+110C+110C

TSTORAGE –65C+150C+150C

6AMD-K6™-2E Processor Press Data Sheet
DC CHARACTERISTICS
The DC characteristics of the AMD-K6-2E processor are shown in Table 4.
Notes: 
1. V
CC3
 refers to the voltage being applied to V
CC3
 during functional operation.
2. V
CC2
=2.0 V —The maximum power supply current must be taken i nto account when designing a power s upply.
3. This spec ification applies to componen ts using a CLK frequency of 66 MHz.
4. This spec ification applies to componen ts using a CLK frequency of 95 MHz.
5. This spec ification applies to componen ts using a CLK frequency of 100 MHz.
6. V
CC2
=2.3 V —The maximum power supply current must be taken i nto account when designing a power s upply.
7. V
CC3
=3.6 V —The maximum power supply current must be taken i nto account when designing a power s upply.
8. Refers to inputs and I/O without an internal pullup resistor and 0 
 
V
IN 

 V
CC3
.
9. Refers to inputs with an internal pullup and V
IL
=0.4 V.
10.Refers to inputs with an internal pulldown and V
IH
=2.4 V.
Table 4. DC Characteristics
Symbol Parameter Description Min Max Comments
VIL  Input Low Voltage  –0.3 V +0.8 V
VIH1 Input High Voltage   2.0 V VCC3+0.3 V
VOL  Output Low Voltage   0.4 V IOL = 4.0-mA load
VOH  Output High Voltage 2.4 V IOH = 3.0-mA load
ICC2
Low Power
 1.9 V Power Supply Current24.75 A 233 MHz2,3
5.35 A 266 MHz2,3
5.50 A 300 MHz2,3,5
5.65 A 333 MHz2,3,4
ICC2
Standard 
Power
 2.2 V Power Supply Current66.50 A 233 MHz3,6
7.35 A 266 MHz3,6
8.45 A 300 MHz3,5,6
9.40 A 333 MHz3,4,6
9.85 A 350 MHz5,6
ICC3
Standard 
and
Low Power
 3.3 V Power Supply Current70.52 A 233 MHz3,7
0.54 A 266 MHz3,7
0.56 A 300 MHz3,5,7
0.58 A 333 MHz3,4,7
0.60 A 350 MHz5,7
ILI8Input Leakage Current 15 mA
ILO8Output Leakage Current 15 mA
IIL9Input Leakage Current Bias with Pullup –400 mA
IIH10 Input Leakage Current Bias with Pulldown  200 mA
CIN  Input Capacitance   10 pF
COUT  Output Capacitance  15 pF
COUT  I/O Capacitance  20 pF
CCLK  CLK Capacitance  10 pF
CTIN  Test Input Capacitance (TDI, TMS, TRST#)  10 pF
CTOUT  Test Output Capacitance (TDO)  15 pF
CTCK  TCK Capacitance  10 pF

 AMD-K6™-2E Processor Press Data Sheet 7
POWER DISSIPATION
Table 5 and Table 6 list the typical and maximum power dissipation of the AMD-K6-2E processor during normal and
reduced power states.
.
Notes: 
1. This spec ification applies to componen ts using a CLK frequency of 66 MHz.
2. This spec ification applies to componen ts using a CLK frequency of 95 MHz.
3. This spec ification applies to componen ts using a CLK frequency of 100 MHz.
4. The maximum power dissipated in the normal clock control state must be taken into account when designing a solution for
thermal dissipation for the AMD-K6-2E processor.
5. Maximum power is determined for the worst-case instruction sequence or function for the listed clock control states with
V
CC2
= 1.9 V, and V
CC3
 = 3.3 V.
6. Typical power  is determined for the typical instruction sequences or functions associated with normal system operation with
V
CC2
= 1.9 V, and V
CC3
 = 3.3 V.
7. The CLK signal and the internal PLL are still running but most internal clocking has stopped.
8. The CLK signal, the internal PLL, and all internal clocking has stopped.
Table 5. Typical and Maximum Power Dissipation for OPN Suffix AMZ (Low-Power Devices)
Clock Control State 233 MHz1266 MHz1300 MHz1,3 333 MHz1,2
Thermal Power
(Maximum)4,5  9.00 W  10.00 W 10.00 W  10.00 W
Thermal Power
(Typical)66.30 W 7.00 W 7.00 W 7.00 W
Stop Grant/Halt
(Maximum)71.20 W 1.20 W 1.20 W 1.20 W
Stop Clock
(Maximum)81.00 W 1.00 W 1.00 W 1.00 W
Table 6. Typical and Maximum Power Dissipation for OPN Suffix AFR (Standard-Power Devices)
Clock Control State 233 MHz1
Notes:
1. This specification applies to components using a CLK frequency of 66 MHz.
266 MHz1300 MHz1,3 333 MHz1,2
2. This specification applies to components using a CLK frequency of 95 MHz.
350 MHz3
3. This specification applies to components using a CLK frequency of 100 MHz.
Thermal Power
(Maximum)4,5
4. The maximum power  dissipated in the normal clock control state must be taken into account when designing a solution for
thermal dissipation for the AMD-K6-2E processor.
5. Maximum power is determined for the worst-case instruction sequence or function for the listed clock control states with
VCC2 = 2.2 V, and VCC3 = 3.3 V.
 13.50 W  14.70 W 17.20 W  19.00 W 19.95 W
Thermal Power
(Typical)6
6. Typic al powe r is det ermined  for th e typi cal inst ructio n seque nces or  func tions a ssociat ed with  normal  system  operat ion wi th
VCC2 = 2.2 V, and VCC3 = 3.3 V.
8.10 8.85 W 10.35 W 11.40 W 11.98 W
Stop Grant/Halt
(Maximum)7
7. The CLK signal and the internal PLL are still running but most internal clocking has stopped.
2.46 W 2.48 W 2.50 W 3.94 W 3.96 W
Stop Clock
(Maximum)8
8. The CLK signal, the internal PLL, and all internal clocking has stopped.
2.25 W 2.25 2.25 W 3.50 W 3.50 W

8AMD-K6™-2E Processor Press Data Sheet

PIN DESIGNATION DIAGRAMS

Figure 2. AMD-K6™-2E Processor Connection Diagram (Top-Side View CPGA)

AMD-K6™-2E Processor Press Data Sheet 9

Figure 3. AMD-K6™-2E Processor Connection Diagram (Bottom-Side View CPGA)

10 AMD-K6™-2E Processor Press Data Sheet

PIN DESIGNATIONS BY FUNCTIONAL GROUPING

Pin Name Pin Number Pin Name Pin Number Pin Name Pin Number Pin Name Pin Number

Control Address Data Data

A20M# AK-08 A3 AL-35 D0 K-34 D52 E-03

ADS# AJ-05 A4 AM-34 D1 G-35 D53 G-05

ADSC# AM-02 A5 AK-32 D2 J-35 D54 E-01

AHOLD V-04 A6 AN-33 D3 G-33 D55 G-03

APCHK# AE-05 A7 AL-33 D4 F-36 D56 H-04

BE0# AL-09 A8 AM-32 D5 F-34 D57 J-03

BE1# AK-10 A9 AK-30 D6 E-35 D58 J-05

BE2# AL-11 A10 AN-31 D7 E-33 D59 K-04

BE3# AK-12 A11 AL-31 D8 D-34 D60 L-05

BE4# AL-13 A12 AL-29 D9 C-37 D61 L-03

BE5# AK-14 A13 AK-28 D10 C-35 D62 M-04

BE6# AL-15 A14 AL-27 D11 B-36 D63 N-03

BE7# AK-16 A15 AK-26 D12 D-32 Test

BF0 Y-33 A16 AL-25 D13 B-34 TCK M-34

BF1 X-34 A17 AK-24 D14 C-33 TDI N-35

BF2 W-35 A18 AL-23 D15 A-35 TDO N-33

BOFF# Z-04 A19 AK-22 D16 B-32 TMS P-34

BRDY# X-04 A20 AL-21 D17 C-31 TRST# Q-33

BRDYC# Y-03 A21 AF-34 D18 A-33 Parity

BREQ AJ-01 A22 AH-36 D19 D-28 AP AK-02

CACHE# U-03 A23 AE-33 D20 B-30 DP0 D-36

CLK AK-18 A24 AG-35 D21 C-29 DP1 D-30

D/C# AK-04 A25 AJ-35 D22 A-31 DP2 C-25

EADS# AM-04 A26 AH-34 D23 D-26 DP3 D-18

EWBE# W-03 A27 AG-33 D24 C-27 DP4 C-07

FERR# Q-05 A28 AK-36 D25 C-23 DP5 F-06

FLUSH# AN-07 A29 AK-34 D26 D-24 DP6 F-02

HIT# AK-06 A30 AM-36 D27 C-21 DP7 N-05

HITM# AL-05 A31 AJ-33 D28 D-22

HLDA AJ-03 D29 C-19

HOLD AB-04 D30 D-20

IGNNE# AA-35 D31 C-17

INIT AA-33 D32 C-15

INTR AD-34 D33 D-16

INV U-05 D34 C-13

KEN# W-05 D35 D-14

LOCK# AH-04 D36 C-11

M/IO# T-04 D37 D-12

NA# Y-05 D38 C-09

NMI AC-33 D39 D-10

PCD AG-05 D40 D-08

PCHK# AF-04 D41 A-05

PWT AL-03 D42 E-09

RESET AK-20 D43 B-04

SCYC AL-17 D44 D-06

SMI# AB-34 D45 C-05

SMIACT# AG-03 D46 E-07

STPCLK# V-34 D47 C-03

VCC2DET AL-01 D48 D-04

VCC2H/L# AN-05 D49 E-05

W/R# AM-06 D50 D-02

WB/WT# AA-05 D51 F-04

AMD-K6™-2E Processor Press Data Sheet 11

Pin Numbers

No Connect (NC) VCC2 V

CC3 VSS V

A-37 A-07 A-19 A-03 AJ-27

E-17 A-09 A-21 B-06 AJ-31

E-25 A-11 A-23 B-08 AJ-37

R-34 A-13 A-25 B-10 AL-37

S-33 A-15 A-27 B-12 AM-08

S-35 A-17 A-29 B-14 AM-10

W-33 B-02 E-21 B-16 AM-12

AJ-15 E-15 E-27 B-18 AM-14

AJ-23 G-01 E-37 B-20 AM-16

AL-19 J-01 G-37 B-22 AM-18

AN-35 L-01 J-37 B-24 AM-20

Internal No Connect (INC) N-01 L-33 B-26 AM-22

C-01 Q-01 L-37 B-28 AM-24

H-34 S-01 N-37 E-11 AM-26

Y-35 U-01 Q-37 E-13 AM-28

Z-34 W-01 S-37 E-19 AM-30

AC-35 Y-01 T-34 E-23 AN-37

AL-07 AA-01 U-33 E-29

AN-01 AC-01 U-37 E-31

AN-03 AE-01 W-37 H-02

Reserved (RSVD) AG-01 Y-37 H-36

J-33 AJ-11 AA-37 K-02

L-35 AN-09 AC-37 K-36

P-04 AN-11 AE-37 M-02

Q-03 AN-13 AG-37 M-36

Q-35 AN-15 AJ-19 P-02

R-04 AN-17 AJ-29 P-36

S-03 AN-19 AN-21 R-02

S-05 AN-23 R-36

AA-03 AN-25 T-02

AC-03 AN-27 T-36

AC-05 AN-29 U-35

AD-04 V-02

AE-03 V-36

AE-35 X-02

Key X-36

AH-32 Z-02

Z-36

AB-02

AB-36

AD-02

AD-36

AF-02

AF-36

AH-02

AJ-07

AJ-09

AJ-13

AJ-17

AJ-21

AJ-25

12 AMD-K6™-2E Processor Press Data Sheet

The contents of this document are provided in connection with Advanced Micro Devices, Inc.

(“AMD”) products. AMD makes no representations or warranties with respect to the

accuracy or c om pl eten ess o f th e c ont ent s o f thi s pub lic ati on and res erv es th e rig ht to m ak e

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may occur. AMD reserves the right to discontinue or make changes to its products at any

time without notice.