ANALOG DEVICES Dual 8-Bit CMOS D/A Converter with Voltage Output DAC8228 FEATURES * Two 8-Bit Voltage Out DACs in a Single Chip * Fits 7528/7628 Sockets Adjustment Free Internal CMOS Op Amps * Single +12V to +15V Operation * TTL Compatible Over Full V,,, Range * Fast Interface Timing ..............-ccessesecnersserees T. Improved Resistance to ESD * Available in Small Outline Package * CerDIP and Epoxy Packages Come in the Extended Industrial Temperature Range of 40C to +85C * Available in Die Form APPLICATIONS * Disk Drive Systems * Automatic Test Equipment * Process/Industrial Controls * Energy Controls * Programmable Instrumentation * Multi-Channel Microprocessor-Controlled Systems * Servo Control Systems ORDERING INFORMATION ' PACKAGE: 20-PIN DIP/SOL EXTENDED INDUSTRIAL RELATIVE GAIN TEMPERATURE ACCURACY ERROR -40C to +85C +1/2LSB +2LSB DAC8228FR +1/2LSB +2LSB DACB228FP +1/2LSB #2LSB DAC8228FS t Allcommercial and industrial temperature range parts are available with burn- in. FUNCTIONAL DIAGRAM Yoo DB; INPUT 1 BUFFER LATCH A DBo wa CONTROL LATCH B __ oS LoGic DAC A/DAC B GND REV.A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. GENERAL DESCRIPTION The DAC-8228 is a dual 8-bit, voltage output, CMOS, D/A con- verter in a single chip. ltwas designed to drop into AD7528/7628 sockets eliminating two external op amps in applications such as hard disk drives. These applications generally operate the AD7528/7628 with zero volts applied to V,,_. and offset AGND to +2.5 or +5 volts. The DAC-8228 is tested under both these conditions. The DAC-8228 can also be used in those applications requiring a unipolar output voltage. It can deliver an output voltage be- tween OV and +10V with V_ . = +14V (maximum output voltage is Voy ~4V). The DAC-8228's reference input can accept a negative voitage from OV to -10V (the DAC's internal unity-gain inverting amplifier inverts the input signal). Choose the DAC- 8229 for bipolar operation. Continued PIN CONNECTIONS 20-PIN 0.3" CERDIP (R-Suffix) 20-PIN SOL (S-Suffix) 20-PIN EPOXY DIP (P-Suffix) VrerA VourA Vour B Vrer B One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 617/329-4700 Fax: 617/326-8703 Twx: 710/394-6577 Telex: 924491 Cable: ANALOG NORWOODMASSDAC8228 GENERAL DESCRIPTION Continued The DAC-8228 offers CerDIP and plastic packaged devices in the extended industrial temperature range of -40C to +85C. Applications requiring the military temperature range should use the DAC-8229. To make the DAC-8229 pin and functionally compatible with the DAC-8228, AGND Aand AGND B should be tied together to function as V,, and V,, connected to GND. The DAC-8228 consists of two CMOS voltage output amplifiers, two high-accuracy R-2R resistor ladder networks, interface control logic, and two 8-bit registers. An internal regulator main- tains TTL logic compatibility and fast microprocessor interface timing over the full V_, , range. The DAC-8228 dissipates only 9OmW in the space saving 20- pin 0.3" DIP or the 20-lead SO surface mount package. Its compact size, low power, and economical cost per channel, makes it attractive for applications requiring multiple D/A con- verters without sacrificing circuit-board space. Reduced parts count also improves system reliability. Using PMI's advanced oxide-isolated, silicon-gate CMOS proc- ess, coupled with its highly-stable thin-film resistor ladder, al- lows the DAC-8228 to offer superior matching and temperature tracking between DACs. ABSOLUTE MAXIMUM RATINGS (T, = +25C, unless otherwise noted.) Vpp to V, or GND V7 tO GND 0... cesses teseeeeeeeereees Digital input Voltage to GND Veer a Mpeg gp tO GND un. ceeseececeeesessreareneeeeneearenceres out A Mout p tO Vz (Note 1) 0. eeecssseresseeerseereeies ~0.3V, Vin Operating Temperature Range FR/FP/FS Versions .........ccccescecscescecerereneeees 40C to +85C Junction Temperature ........ eee cececceeecsseneeeetenseneerentenee +150C Storage Temperature... cecccsssereeeesereees -65C to +150C Lead Temperature (Soldering, 60 S@C) ...........ecceeeee +300C PACKAGE TYPE @,, (NOTE 3) Bic UNITS 20-Pin Hermetic DIP (R) 76 11 C/W 20-Pin Plastic DIP (P) 69 27 C/W 20-Pin SOL (8) 88 25 Cw NOTES: 1. Outputs may be shorted to any terminal provided the package power dissipa- tion is not exceeded. Typical output short-circuit current to GND is 50mA. 2. Use proper anti-static handling procedures when handling these devices. 3. BO, is specified for worst case mounting conditions, i.e., @,, is specified for device in socket for CerDIP and P-DIP packages; @, ais specified for device soldered to printed circuit board for SOL package. ELECTRICAL CHARACTERISTICS at V,,,, = +12V 25%, Va, = OV, V, = +2.5V and V,,,, = +15V #5%, Vac, = OV, V, = +5V. T, = Full Temperature Range specified under Absolute Maximum Ratings, unless otherwise noted. DAC-8228 PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS STATIC ACCURACY (Note 1) Resolution N 8 _ - Bits Relative Accuracy INL - ~ +1 LSB (Note 2) Differential Nonlinearity - - 1 LSB (Note 3) DNL * Gain Error Gese DAC Latches Loaded with 1111 1111 - - +2 LSB Gain Error Temperature Coefficient TCG, - +0.0003 +0.002 *PC (Note 4) Zero Code Error Voge - - 215 mv Zero Code Error . Temperature Coefficient TCV 5 ~ +10 - pvePG (Note 4) REFERENCE INPUT (Note 8) Input Resistance R Pin 4 and Pin 18 7 - 18 ka (Note 5) IN Input Resistance Match AR _ 40.1 ~ % VaerAVper 8) Rin Input Capacitance - 9 20 F (Note 4) Cin p V, Input Resistance . z i = 2 - - kQ (Note 10) Ryz Digital Inputs = OV REV. ADAC8228 ELECTRICAL CHARACTERISTICS at V,,, = +12V 45%, Vag, = OV, V, = +2.5V and Vp, = +15V 5%, Veep = OV, Vz = +5V. T, = Full Temperature Range specified under Absolute Maximum Ratings, unless otherwise noted. Continued DAC-8228 PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS DIGITAL INPUTS Digital Input High VINH 2.4 - - Vv Digital Input Low VINL - - 0.8 Vv Input Current Nn Vin = OV Or Von - - +1 pA Input Capacitance - 4 8 F (Note 4) Cin p POWER SUPPLIES Supply Current | - - 7 mA (Note 6) DD Vop=tt 2V _ _ 84 Power 12x 7mA Dissipation Po Vo j=+15V mw DD - - 105 15x 7mA DC Power Supply Rejection Ratio PSRR AV 5 p = 5% - - 0.01 el Yo (AGain/AV , 5) DYNAMIC PERFORMANCE Siew Rate (V5.7) Ta= +25C - 2. - Vi (Note 4) SR Digital Inputs = OV to +5V 8 us Settling Time (Vo.j7) Positive or Negative t, Digital Inputs = OV to +5V - 2 5 us (Note 4, 7) T, =+25C Channel-to-Channel A AorV,_-Ato V B - -80 - B Isolation (Note 4) cel VaerB to joun OO et Vaer = VacpA = 20V,, , @ f = 10kHz T, = +25C _ A i Q For Code Transition - 4 10 nVs ( 9) 0000 0000 to 1411 1111 T, =+25C iai A ote wage Q For Code Transition - 100 - nVs 0000 0000 to 11111111 AC Feedthrough FT - - -70 dB (Notes 4, 11) T, =+25C Harmonic Distortion THD an #25 - -85 - dB Vin = Vays @ f= 1kHz REV. ADAC8228 ELECTRICAL CHARACTERISTICS at V,,, = +12V 45%, V,-, = OV, V, = +2.5V and V,, = +15V 15%, Vp_, = OV, V, = +5V. T, = Full Temperature Range specified under Absolute Maximum Ratings, unless otherwise noted. Continued DAC-8228 PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS SWITCHING CHARACTERISTICS (Note 4) Chip Select to Write Set-Up Time es 60 ~ ~ ns Chip Select to Write Hold Time oH 0 ~ 7 ns DAC Select to t 60 - - ns Write Set-Up Time AS DAC Select to t 10 _ _ ns Write Hold Time AH Data Valid to t 60 ns Write Set-Up Time DS Data Valid to t 10 - - ns Write Hold Time DH Write Pulse Width twr 50 ~ - ns NOTES: 1. Specifications apply to both DAC A and DAC B. 2. This is an endpoint linearity specification. 3. Alldevices are guaranteed to be monotonic over the full operating temperature range. 4. These characteristics are for design guidance only and not subject to produc- tion test. 5. Input resistance temperature coefficient = +300ppm/C. Vin = Vine Of Vinge Outputs unioaded. = 72.5V; to where output settles to +1/2 LSB. a REF BURN-IN CIRCUIT NOTES: 1.1 = 10uF 2. C2 =0.1pF DAC-8228 100 Ce +15V C2 8. Ger : Veer! = Vpp-4V: voltage range is OV to -10V; the absolute maximum negative value is: 9. Digital crosstalk is a measure of the amount of digital input pulse appearing at the analog output of the unselected DAC while applying it to the digital inputs of the other DAC. 10. Resistance looking into the V_ terminal. 11. Veep A, VaerB = 20V..5 Sinewave @ f = 10kHz; VacrA to Vourh or VaerB to VoytB: both DAC latches loaded with 0000 0000. REV.ADAC8228 DICE CHARACTERISTICS (2.08 x 2.82 mm, 5.87 sq. mm) DIE SIZE 0.082x 0.111 inch, 9,102 sq. mils AMPLIFIER REFERENCE (V. N.C. VOLTAGE OUTPUT (V,,,A) 2) GROUND (GND) DAC SELECTION (DAC A/DAC B) DIGITAL INPUT DB, (MSB) DIGITAL INPUT DB, DIGITAL INPUT DB, . DIGITAL INPUT DB, SOESPNDAPYWNS = DAC A REFERENCE INPUT (V_--A) . DIGITAL INPUT DB, . DIGITAL INPUT DB, . DIGITAL INPUT DB, . DIGITAL INPUT DB, (LSB) CHIP SELECT (CS) . WRITE (WR) POSITIVE POWER SUPPLY (V,,,) DAC B REFERENCE INPUT (V_,_B) VOLTAGE OUTPUT (VB) . N.C. Substrate (die backside) is internally connected to V,). WAFER TEST LIMITS at V,,, = V5, = +12V 25%, Vage = OV, V, = 2.5V OF Vpn = +15V 45%, Vacg = OV, V, = +5V, T, = +25C. DAC-8228GBC PARAMETER SYMBOL CONDITIONS LIMITS UNITS Relative Accuracy INL Endpoint Linearity Error 41 LSB MAX (Note 3) Differential Nonlinearity D + B MAX (Notes 1, 3) NL 1 LS Gain Error Gese DAC Latches Loaded with 1111 1111 +2 LSB MAX Zero Code Error VosE 415 mV MAX Input Resistance Fin Pad 4 and 18 7H5 kQ MIN/kKQ MAX V,--A/V,-_-B Input AR REF REF IN % MAX Resistance Match Rin 1 eM V, Input Resistance a z DB I =0V 2 kQ MIN (Note 3) Ryz igital Inputs = 0 Digital Input High IH 2.4 V MIN Digital Input Low IL 0.8 V MAX Input Current lin Vin= OV orVop +1 HA MAX DC Supply Rejection PSRR Vi, = +5 .01 %ol% MAX (AGain/AV,, 5) pp = 10% 0.0 Yol Yo Positive Supply Current I 7 mA MAX (Note 2) DD NOTES: 1. Alldice guaranteed monotonic over the full operating temperature range. 2. Vin = Vin OF Vinyys Output unloaded. 3. Resistance looking into the V, terminal. Electrical tests are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed for standard product dice. Consult factory to negotiate specifications based on dice lot qualifications through sample lot assembly and testing. REV. ADAC8228 TYPICAL PERFORMANCE CHARACTERISTICS RELATIVE ACCURACY (LSB) RELATIVE ACCURACY (LSB) SUPPLY CURRENT ~ Ipp (mA) RELATIVE ACCURACY VS CODE (Vage= OV, V, = +2.5V) 0.5 04 ey 0.3 - Vz=+2.5V Vagr = OV 0.2 0.41 o 0.1 0.2 0.3 0.4 ~0.5 o 32 64 96 128 160 192 224 256 DIGITAL INPUT CODE (DECIMAL) RELATIVE ACCURACY vs REFERENCE VOLTAGE 1.0 08 Ta = 425C Vpp=+15'V o6 } Vz=0V 0.4 0.2 POSITIVE ERROR 0 0.2 0.4 NEGATIVE ERROR 0.6 0.8 -1.0 2 3 4+ 6 46 7F -8 -9 -10 Veer (VOLTS) SUPPLY CURRENT vs DIGITAL INPUT VOLTAGE Ty = 425C 6 | Vrer=0V Vop = +18V, Vz =45V 3 Vpp = +12V, Vz = 0 5 10 15 DIGITAL INPUT VOLTAGE Vj (VOLTS) BIT "ON" (ALL OTHER BITS ARE "OFF") RELATIVE ACCURACY (LSB) DIFFERENTIAL NONLINEARITY ~ DNL (LSB) RELATIVE ACCURACY vs V_, Ty = 425C Vpp = +15V Vrer = OV POSITIVE ERROR NEGATIVE ERROR 1 2 3 4 5 Vz (VOLTS) DIFFERENTIAL NONLINEARITY vs REFERENCE VOLTAGE 1.0 Ty = 425C Vpp = +15'V Vz=0V 0.8 0.6 a4 0.2 POSITIVE ERROR Q 0.2 0.4 NEGATIVE ERROR 0.6 0.8 4 5 6 -7 -# -9 REFERENCE VOLTAGE - V per (VOLTS) -10 MULTIPLYING MODE FREQUENCY RESPONSE ALL BITS ON (MSB) DB; DBs 12 DBs DB, -24 DB DB, 36 DB, (LSB) DBy 48 -60 -72 ALL BITS OFF 84 Vop=+12V 96 Vz =4+2.5V Var = 200MVp,p tI! 408 120 10M 100k FREQUENCY (Hz) 1k 10k 1M ATTENUATION (dB) RELATIVE ACCURACY (LSB) OUTPUT VOLTAGE (VOLTS) DIFFERENTIAL NONLINEARITY (LSB) DIFFERENTIAL NONLINEARITY vs V, Ty = +25C Vpp = +15V Vrer = 0V 0.6 0.4 9.2 POSITIVE ERROR 0.2 0.4 NEGATIVE ERROR 0.6 0.8 -1.0 1 2 3 4 5 vz (VOLTS) RELATIVE ACCURACY vs CODE (Vpe-= -10V, V, = OV) Vop = +15V Vz=0V Veer = -10 0.3 0.2 0.1 0 ~0.41 0.2 0.3 ~0.4 0.5 0 32 64 96 128 160 192 DIGITAL INPUT CODE (DECIMAL) 224 = 25t OUTPUT VOLTAGE vs OUTPUT SOURCE CURRENT oD Ty = 425C Vpo2 Voo-4 Vpp6 Ypp8 Vpn19 0 20 30 4 50 60 70 80 OUTPUT SOURCE CURRENT (mA) REV. ADAC8228 TYPICAL PERFORMANCE CHARACTERISTICS Continued FULL SCALE GAIN ERROR vs TEMPERATURE Vpp= +12.6V Vz =42.5V V per = 0V FULL SCALE GAIN ERROR (LSB) -75 -50 -25 0 25 50 75 100-125 TEMPERATURE (C) POWER SUPPLY CURRENT vs TEMPERATURE 8 Vp = +15.75V 7P vz=45V Vier = OV POWER SUPPLY CURRENT - Ipp (mA) ~75 -50 -25 0 25 50 76 100 (125 TEMPERATURE (C) WRITE CYCLE TIMING DIAGRAM ZERO CODE ERROR vs TEMPERATURE Vpp = +12.6V Vz=+25V Vargr = 0V ZERO CODE ERROR (LSB) "75 -50 -25 0 25 50 75 100 125 TEMPERATURE (C) POWER SUPPLY REJECTION vs TEMPERATURE 0.0004 Vop = #12.6V Vz 5 +2.5V Veer = OV 0.0003 0.0002 0.0001 POWER SUPPLY REJECTION (%/%) Q 75-50 -25 (0 25 50 75 100 125 TEMPERATURE (C) CHIP SELECT \ +5V DAC A/DAC B \ twr +| WRITE tos ton as 45V YO +5V / 0 ton +5V Vin DATA IN (DB, -DB,} Vie NOTES: DATA IN STABLE x A 0 1. ALL INPUT SIGNAL RISE AND FALL TIMES MEASURED FROM 10% TO 90% ARE t, =t; = 20ns. 2. TIMING MEASUREMENT REFERENCE LEVEL IS Vy + Vib- 2 REV.ADAC8228 PARAMETER DEFINITIONS RESOLUTION (N) The resolution of a DAC is the number of states (2") that the full- scale range (FSR) is divided (or resolved) into; where nis equal to the number of bits. RELATIVE ACCURACY (INL) Relative accuracy, or integral nonlinearity, is the maximum deviation of the analog output (from the ideal) from a straight line drawn between the end points. It is expressed in terms of least significant bits (LSB), or as a percent of full-scale. DIFFERENTIAL NONLINEARITY (DNL) Differential nonlinearity is the worst case deviation of any adja- cent analog output from the ideal 1 LSB step size. The deviation of the actual "step size" from the ideal step size of 1 LSBis called the differential nonlinearity error or DNL. DACs with DNL greater than +1 may be non-monotonic. +1/2 LSB INL guarantees monotonicity and +1 LSB maximum DNL. GAIN ERROR (G,,,,) Gain error is the difference between the actual and the ideal analog output range, expressed as a percent of full-scale or in terms of LSB value. It is the deviation in slope of the DAC trans- fer characteristic from ideal. Zero code error is not included in this measurement. ZERO CODE ERROR (Vise) Zero Code Error means, for the DAC-8228 specification table, the amount of offset voltage referenced to Vo i.e., Vz = +2.5V, +10mV offset is equal to +2.490V to +2.510V referenced to ground. See Orientation in Digital-to-Analog Converters Section of the current data book, for additional parameter definitions. GENERAL CIRCUIT DESCRIPTION The DAC-8228 consists of two voltage output amplifiers, two high accuracy R-2R resistor ladder networks, an 8-bit input buffer, two 8-bit DAC registers, and interface control logic cir- cuitry. Also included are 16 single-pole, double-throw NMOS transis- tor switches. These switches, which are controlled by the digital input code, were designed to switch each 2A resistor leg be- tween the amplifier inverting input and V,, see Figure 1. This configuration inverts the reference input voltage, and also al- lows biasing V, above digital ground simplifying many applica- tions. REFERENCE INPUT The DAC-8228's reference input voltage range is limited by the internat amplifier voltage swing. The amplifier output can swing from OV to +10V when Voo = +14V; note that the output voltage is 4 volts less than V.,... V,,,4V sets the maximum voltage that the reference input can accept (but in the negative direction due to the inverting amplifier, see Figure 1). V._, voltage range is OV to|V,,,, -4V |; in equation form: -V,,..(max) = |V,,,4V|. BUFFER AMPLIFIER SECTION The DAC-8228 internal amplifier's output stage is an NPN bipo- lar transistor connected to a 450uA current source, see Figure 2. This transistor provides a low output impedance that can drive 5mA across a 2k load. In fact, it can drive up to 65mA, but with a reduced output amplitude. See the Output Voltage vs. Output Source Current graph under the typical electrical char- acteristics curves. The user must use caution that the package power dissipation is not exceeded when driving low impedances and high currents. wruro| OUTPUT [om CQ) CQ) GND FIGURE 2: Amplifier Output Stage Ver 2k O Vout DB, (LSB) Ll FIGURE 1: Simplified single DAC configuration (switches shown for all digital inputs at logic "0"). REV. ADAC8228 Figure 3 depicts a typical output current-sink versus voltage graph for the amplifiers output stage. It shows the output com- ing out of its saturation region and starting to appear resistive as the output approaches zero volts. The amplifier's internal gain stages were designed to maintain sufficient gain over its common mode range. This results in good offset performance over the specified voltage range. In addition, the amplifier's offset voltage is laser-trimmed during manufac- turing. This eliminates user offset trimming. 700 Ty = 425C Vop = +15V 600 a 2 6 OUTPUT CURRENT SINK (LA) 4 5 6 Vout (VOLTS) 7 8 g 10 FIGURE 3: DAC Output Current Sink DIGITAL SECTION Figure 4 shows one digital input structure of the DAC-8228. A built-in 5V regulator and level shifter converts TTL digital input signals into CMOS levels to drive the internal circuitry. This pro- vides full TTL compatibility over a V,,,, range of 5 to 15V. As shown in Figure 4, each digital input is protected from elec- trostatic-discharge with two internal diodes connected between Vp and GND. Each input has a typical input current of less than 1nd. INTERFACE CONTROL INFORMATION DAC SELECTION DAC A and DAC B both share a common 8-bit input port. The controlinput, DAC A/DAC B, selects which DAC can accept data from the input port. A logic low selects DAC A and a logic high selects DAC B. DAC OPERATION Inputs CS and WR control the operation of the selected DAC. See Mode Selection Table below. WRITE MODE When CS and WR are both low, the selected DAC is in the write mode. The input buffer and DAC register of the selected DAC are transparent and its analog output responds to the codes on the digital input pins. HOLD MODE The selected DAC register latches the data present on the digi- tal input pins just prior to CS and WR assuming ahigh state. Both analog outputs remain at the values corresponding to the data in their respective registers. MODE SELECTION TABLE DAC A/ _ 7 DACB cs WR DACA DACB L L L WRITE HOLD H L L HOLD WRITE X H X HOLD HOLD X X H HOLD HOLD L=Low State H=High State X=Don't Care DIGITAL INPUT el ___ pp} TO R-2R LADDER NMOS SWITCHES GND FIGURE 4: Simplified Digital Input Structure REV. ADAC8228 APPLICATIONS INFORMATION Figure 5 shows the DAC-8228 configured to operate with V, biased above ground. Note how the reference source is con- nected between V,, and ground; also note how the DAC's Veer pin is connected directly to ground. Not shown but equally im- portant is that the reference voltage source at V, is common to both DAC A and DAC B. +12V Yop Vour DI Veer 1/2 DAC-8228* g ~ Vout |; +12VO Vy REF-03 GND I Vour = 25 $ Your $5V PO +2.5V 1pF iH * DIGITAL CIRCUITRY OMITTED FOR SIMPLICITY. FIGURE 5: Single Supply Configuration (+2.5V< Vo,,,5 +5V) The +2.5V reference voltage is obtained from PMI's REF-03; if greater accuracy is desired, use the REF-43. The REF-02 or REF-05, depending on accuracy required, can be used for +5V applications. The transfer equation for the circuit of Figure 5 is: Voyr = Vz (1 + 0/256) where V, = Reference voltage applied to V, D = whole number binary digital input With ail 1s on the digital inputs for the circuit of Figure 5, V,\)+ results in: Vout = 2-5(1 + 255/256) = +5V And with all Os on all digital inputs: Vout = +2:5V Note that this configuration's output voltage range is determined by the input reference voltage and V,. A digital zero input pro- vides an output voltage equal to V,. An all ones digital input provides an output voltage equal to: 2(V,V,,,). Figure 6 shows a plot of Relative Accuracy versus V, voltage. Figure 7 shows the DAC-8228 in another single supply configu- ration. In this circuit, a PMI REF-08 is used for the reference voltage source and V, is grounded. The output swings from OV to +10V, see Figure 8. ~10 RELATIVE ACCURACY vs V, Ty = 425C Vpn = +15V Vrcr = OV POSITIVE ERROR NEGATIVE ERROR RELATIVE ACCURACY (LSB) 1 2 3 4 5 Vz (VOLTS) FIGURE 6: Relative Accuracy vs. AGND +15V 4 3s < -15v0 ? Veer PP Vy REF-08 1/2 DAC-8228" | *DIGITAL CIRCUITRY OMITTED FOR CLARITY Vy = OVS Vgyy S+10V + 1wF Vz (I-44 FIGURE 7: Single Supply Contiguration (V.< Voy_< +10V) RELATIVE ACCURACY vs CODE (Vpe-= 10V, V> = OV) Vop = +15V Vz=0V Ver =-10V RELATIVE ACCURACY (LSB) 0 32 64 96 128 160 192 224 256 DIGITAL INPUT CODE (DECIMAL) FIGURE 8: Feiative Accuracy vs. Vp-- (V,= OV) REV. ADAC8228 MICROPROCESSOR INTERFACE CIRCUITS The DAC-8228's versatile input structure allows direct interface to 8- or 16-bit microprocessors. Its simplicity reduces the num- AgAis ADDRESS BUS ) ber of required glue logic components. Figures 9 and 10 show LI . the DAC-8228 interface configurations with the 6800 and 8085 A _ microprocessors. ADDRESS DAC A/DAC B ore Proape pb es Atl DAC-8228* WR 7 T wr] DACB h ALE LATCH DB, Ay~Ays ADDRESS BUS ) 8212 DB, " TT h AD) AD, ADDR/DATA BUS A DAC A'DAC B " ADDRESS D [eaca) * ANALOG CIRCUITRY OMITTED FOR SIMPLICITY VMA {[-9 ts [pac a) LOGIC NOTE: DAC-8228* 8085 INSTRUCTION SHLD (STORE H & L DIRECT) CAN UPDATE DL CPU Avi 6800 BOTH DACs WITH DATA FROM H AND L REGESTERS. _ [oace) B _____..____] WR c v2 = DB FIGURE 10: DAC-8228 interface to 8085 Microprocessor 7 h Dy D, DATA BUS ) * ANALOG CIRCUITRY OMITTED FOR SIMPLICITY FIGURE 9: DAC-8228 Interface to 6800 Microprocessor REV.A -11--12