1/20
PRELIMINARY DATA
June 2005
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notic e.
STM1810, STM1811, STM1812, STM1813
STM1815, STM1816, STM1817, STM1818
Low Power Reset Circu it
Rev 5
FEATURES SUMMARY
■PRECISION MONITORING OF 3V, 3.3V,
AND 5V SUPPLY VOLT AGES
■FOUR OUTPUT CONFIGURATIONS
– Push-P ull, Active-High (STM1812 ,1817)
– Push-P ull, Active-Low (STM1810, 1815)
– Open Drain, Active-Low (ST M1 811,1816)
– Open Drain, Active-Low with Push-Button
Detect (ST M1813,1818)
■R ESET PULS E WIDTH - 100ms (min)
■LOW SUP PLY CURRENT - 4 uA (typ )
■GUARANTEED ASSERTION DOWN TO
VCC = 1.0V (0°C to 105°C)
■FACTORY-TRIMMED RESET
THRE SH OLDS OF 2.55V, 2.88V, 3.06V,
4.37V, and 4.62V (typ)
■POWER SUPPLY TRAN SIENT IMMU N ITY
■PUSH-BUTTON/M ANUAL RESET DETECT
(STM1813/1818)
■OPERATING TEMPERAT UR E:
–40°C TO 105°C
■±2.5% RESET THRESHOLD ACCURACY
(–40°C TO 105°C)
■AVAIL ABLE IN THE SOT23 -3 PACKAGE
■FULLY COM PATIBLE WITH DS181x AND
MXD181x PRODUCTS
Figure 1. Packages
Table 1. Device Options
Note: 1. Active-low RST with int ernal pu l l -up resist or
SOT23-3 (WX)
5V 3.3V/
3.0V
Active-Low
RESET
(Push-Pull)
Active-Low
RESET
(Open Drain)
Active-High
RESET
(Push-Pull)
Active-Low RESET
(Open Drain,
Bi-directional, with MR Detect)
STM1810L/M ✔✔
STM1811L/M ✔✔(1)
STM1812L/M ✔✔
STM1813L/M ✔ ✔
STM1815T/S/R ✔✔
STM1816T/S/R ✔✔(1)
STM1817T/S/R ✔✔
STM1818T/S/R ✔✔
STM1810/1811/1812/1813/1815/1816/1817/1818
2/20
TABLE OF CONTENTS
FEATUR ES SUMM ARY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Figure 1. Packages. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table 1. Device Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
SUMM ARY DESCRIPTION. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Figure 2. Logic Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Table 2. Signal Names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Figure 3. SOT23-3 Connec tions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Figure 4. Hardware Hookup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
FUNCTIO NAL BLOCK DIAG RAMS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
Figure 5. Push-pull Active-Low Out put (STM1810/ 1812 /18 15/1817) . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 6. Open D rain, Active-Low Outp ut (STM1811/1816). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 7. Open D rain, Active-Low Output (Bi-directional, Man ual Reset Detect, STM 1813/1818). . 5
PIN DESCRIPTIONS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 3. S TM 1810 /STM 181 5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 4. S TM 1811 /STM 181 6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 5. S TM 1812 /STM 181 7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 6. S TM 1813 /STM 181 8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
OPERATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
R eset Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Pu sh-Button Detect Reset (STM1813/ 1818) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Interfacing to Bidirectio nal Microcontrolle rs (MCU’s). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
N egative Going VCC Transients . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Valid RST Output Down to VCC = 0V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 8. Reset T iming Diagra m. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 9. P ush-B utton Ma nual Reset with MR Detect (STM1813/181 8) . . . . . . . . . . . . . . . . . . . . . 8
Figure 10.Manual Reset Timing Diagram, Switch Bounc e/D ebounce (S TM1813/ 1818). . . . . . . . . . 8
Figure 11.Interfacing MCUs with Bi-Directional Reset Pins (RST, Open Drain, STM1811/1816). . . 8
Figure 12. Vali d Reset (RST) Ou tput Down to VCC = 0V (Push -pull). . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 13.Valid Reset (RST ) Ou tput Down to VCC = 0V (Push -pull). . . . . . . . . . . . . . . . . . . . . . . . . 9
TYPICAL OPERATING CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 14.Supply Current vs. Temperature (no load) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 15. Normali zed Reset Time-out Period (trec) vs. Temperature - VOD = V TH – V CC . . . . . . . 10
Figure 16.VCC-to-Reset Output Delay vs. Temperature - VOD = V TH – VCC . . . . . . . . . . . . . . . . . 11
Figure 17. Voltage Output Low vs. ISINK. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 18.Voltage Output High vs. ISOURCE. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 19.Normalized Reset Threshold vs. Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 20. Max Transient Dur ation NOT Causing Reset Pulse vs. Reset Threshold Overdrive . . . 13
3/20
STM1810/1811/1812/1813/1815/1816/1817/1818
MAXIMUM RATING. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 7. Absolute Maximum Rati ngs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
DC AND AC PARAMETERS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 8. Operati ng a nd AC Measurement Conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 21.AC Testing Input/Output Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 9. DC and A C Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
PACKAGE MECHANICAL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 22.SOT23-3 – 3-lead Small Outline Transistor Package Outli ne. . . . . . . . . . . . . . . . . . . . . 16
Table 10. SOT23-3 – 3-l ead Small Outline Transi stor Package Mechani cal Data . . . . . . . . . . . . . 16
PAR T NUMBERING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 11. Ordering Information Scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 12. M arking Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
REVISIO N HISTO RY. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Table 13. Document Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
STM1810/1811/1812/1813/1815/1816/1817/1818
4/20
S UM MARY DESCRIPTIO N
STM181x devices are low power reset devices
used to monitor power supplies for microcontrol-
lers. They perform a single function: asserting a
reset signal whenever VCC supply voltage drops
below a preset val ue and keeping it asserted until
VCC has risen above the preset threshold for a
minimum peri od of time (trec). They provide excel-
lent circuit reliability without additional external
components when used with +3.0V/+3.3V
(STM1815–STM1818), and +5V (STM1810–
STM1813) power supply systems.
A precision voltage reference and comparator
monitors the VCC input for an out-of-tolerance con-
dition. When an invalid VCC condition occurs, the
reset output (RST) is forced low (or high in the
case of RST) and remains asserted for trec after
VCC rises above the reset threshold. The
STM1813/1818 also keep reset asserted for trec
after the out put is m oment arily pulled to ground by
an external push-button switch.
The ST M1812 and STM1817 hav e an active-high,
push-pull output. The STM1810 and STM1815
(push-pull) and STM1811, STM1813, STM1816,
and STM1818 (open drain) have an active-low
RST output. The open drain devices (STM1811/
STM1813/STM1816/STM1818) also have an in-
ternal pull-up resistor to VCC. The STM1813 and
STM1818 fea ture a debounced manual reset fea-
ture that asserts a reset if the RST pi n is pulled low
for more than 1.5µs. When used t o initiate manual
reset, RST debounc es s ignals from device s such
as mechani cal switches . For devi ces with this fea-
ture, the rel ease of the external switch tri ggers the
reset period.
The STM181x devices are guaranteed to output
the correct logic state for VCC down to 1.0V (0°C
to +105°C). They also provide a reset comparator
designed to ignore fast transients on VCC.
Reset thresholds are available between +2.55V
and +4.62V These small, low power devices are
ideal for u se in portable equipment. All are avail-
able in the space-saving 3-pin SOT23 package,
and are specified from –40°C to +105°C. Figure
4., page 5 shows a typical hardware hookup for
STM181x devices to a Microcontroller.
Figure 2. Logic Diagram
Note: 1. F or S T M 1812, S T M 1817
Table 2. Signal Names
No te : 1. F or S T M1812, STM18 17
Figure 3. SOT23-3 Connections
Note: RST for STM 1812 and STM1 817
AI09648
VCC
STM181x
VSS
RST (RST)(1)
VSS Ground
RST Active-low Reset Output
RST(1) Active-high Reset Output
VCC Supply Voltage and Input for Reset
Threshold Monitor
AI09649
23
1
RST (RST) VSS
VCC
5/20
STM1810/1811/1812/1813/1815/1816/1817/1818
Figure 4. Hardware Hookup
Note: 1. RS T for STM1812 and S T M 1817 (see Table 1., Devic e Options)
2. Only valid for STM1813 and STM1818.
F UNCTIONAL BLOCK DIAGRAMS
Figure 5. Push-pull Active-Low Ou tput (STM1810/ 1812/ 181 5/18 17)
Note: 1. RS T for STM1812 and S T M 1817.
Figure 6. Open Drain, Active-Low Output (ST M1811/1816)
Note: 1. 5.5kΩ intern al pu l l -up res i s tor
Figure 7. Open Drain, Active-Low Output (Bi-directio nal, Manual Reset Detect, STM1813/1818)
Note: 1. 5.5kΩ intern al pu l l -up res i s tor
AI09652a
VCC
VSS
VCC
MCU
STM181x
RST(1)
VCC
VSS
RESET
Input
Push-button
RESET(2)
AI09651a
COMPARE
V
RST
V
CC
trec
Generator RST
(1)
AI09672
COMPARE
VRST
VCC trec
Generator RST
5.5kΩ(1)
AI09673
COMPARE
Push-button
Detect
VRST
VCC trec
Generator
RST
5.5kΩ(1)
STM1810/1811/1812/1813/1815/1816/1817/1818
6/20
PI N DE SCRIPTION S
See F igure 2., Logic Diagram and Table 2., Signal
Names for a brief overv iew of t he si gnal s connect-
ed to this device .
Active-Low RST Output (Push-pull). Pulses
low when VCC drops below VRST, and stays low as
long as VCC is below the reset threshold. It re-
mains low fo r trec after VCC rises above the reset
threshold.
Active-Low RST Output (Op en Drain). Pulses
low when VCC drops below VRST, and stays low as
long as VCC is below the reset threshold. It re-
mains low fo r trec after VCC rises above the reset
thr es ho ld . R ST output has an in ternal 5.5kΩ p ull-
up resistor.
Active-hi gh RS T Output (Push-p ul l ). Pulses
high when V CC drops below VRST, and stays high
as long as VCC is below the reset thresh old. It re-
mains high for trec af ter VCC rises abo ve the re set
threshold.
Active-Low RST O utput (Open Drain with inter-
nal 5.5kΩ pull-up) with Manual Reset Detect.
Pulses low when VCC drop s below VRST, or RST
is externally pulled low for at least 1.5µs. It re-
mai n s low for tPBRST after VCC rises above the re-
set threshol d, or after the external manual reset is
released (see Figure 10., page 8). RST output has
an internal 5.5kΩ pul l-up resistor.
VCC.Supply volt age and input f or VRST compara-
tor.
VSS.G round, is the reference for the power sup-
ply. It mu st be connec ted to the system ground.
Table 3. STM18 10/ST M18 15
Table 4. STM18 11/ST M18 16
Table 5. STM18 12/ST M18 17
Table 6. STM18 13/ST M18 18
Pin Name Function
1RST
Active-low Reset Output (Push-pull)
2VCC Supply Voltage and Input for Reset Threshold Monitor
3VSS Ground
Pin Name Function
1RST
Active-low Reset Output (Open Drain, with internal 5.5kΩ pull-up resistor)
2VCC Supply Voltage and Input for Reset Threshold Monitor
3VSS Ground
Pin Name Function
1 RST Active-high Reset Output (Push-pull)
2VCC Supply Voltage and Input for Reset Threshold Monitor
3VSS Ground
Pin Name Function
1RST
Active-low Reset Output (Open Drain, with internal 5.5kΩ pull-up) with Push-Button/Manual
Reset Detect
2VCC Supply Voltage and Input for Reset Threshold Monitor
3VSS Ground
7/20
STM1810/1811/1812/1813/1815/1816/1817/1818
OPERATION
Reset Output
The STM 181x ass erts a reset signa l to t he M icro-
controller (MCU) whenever VCC goes below the
reset threshold (VRST), and is guaranteed valid
down to VCC = 1.0V (0° to 105° C). A microcontrol-
ler’s (MCU) reset i nput starts the MCU in a known
state. The STM1810 - STM1813/ STM1815 -
STM1818 Low Power Reset circuits assert reset to
prevent code-execution errors during power-up,
power-down, and brownout conditions (Figure
8., page 7).
During power-up, once VCC exceeds the reset
threshold an internal timer keeps RST low for the
reset time-out p eriod, trec. After this interva l, RST
returns high .
If VCC drops below th e reset threshol d, RST goes
low. Ea ch time RST i s asserted, it stays low for at
least the reset time-out period. Any ti me VCC goes
below the reset threshold, the internal timer clears.
The reset timer starts when VCC returns above the
reset threshold. Reset trec is also triggered by an
externally initiated rising edge on the RST pin
(STM1813/STM1818), following a low signal of
1.5µs mi nimum durat ion.
Push-Button Detect Reset (STM1813/1818)
Many systems require push-button reset capability
(Figure 9., page 8), allowing the user or external
logic circuitry to initiate reset. On the STM1813/
STM1818, a logic low on RST held for greater than
1.5µs asserts a reset. RST deasserts following a
100ms minimum reset time-out delay (trec). A
manual reset input shorter than 1.5µs may release
RST without the 100ms minimum reset time-out
delay. T o fac ilitate us e with mec hanical switche s,
the STM1813/STM1818 contain internal de-
bounce circuitry. A debounced wav eform is shown
in F igure 10 ., pag e 8 The RST output has an inter-
nal 5.5kΩ pul l-up resistor.
Interfacing to Bidirectional Microcontrollers
(MCU’s)
As the RST output on the STM1811/STM1816 is
open drain, these devices interface easily with
MCU’s that have bidirectional reset pins. Connect -
ing the µP super visor’s reset (RST) output directly
to the microcontroller’ s reset (RST) pin allows ei-
ther device to assert reset (Figure 11., page 8). No
external pull-up resistor is req uired, as it is within
the STM1811/STM1816.
Negat i ve Going V CC Transi ents
The STM181x are relatively immune to negative-
going VCC transients (glitches). Figure
20., page 13 s hows typical transient duration ver-
sus reset comparator overdrive (for which the
STM181x will NOT generate a reset pulse). The
graph was generated using a negative pulse ap-
plied to V CC, starting at 0.5V above the actual re-
set threshold and ending below it by the
magnitude indicated (comparator overdrive). The
graph indicates the maxim um pulse widt h a nega-
tive VCC t ransient ca n have without causing a re-
set pulse. As the magnitude of the transient
increases (furthe r below the t hreshold), the maxi-
mum allowable pulse width decreases. Any com-
bination of duration and overdrive whic h lies under
the curve will NOT generate a reset signal. Typi-
cally , a VCC transient that goes 100mV below the
reset threshold and lasts 20µs or less will not
cause a reset pulse. A 0.1µF bypass capacitor
mounted as close as possibl e to the VCC p in pro-
vides addi tional transient immunity.
Va lid RST Output Down to VCC = 0V
When VCC falls bel ow 1V, the RST output no long-
er sinks current, but becomes an open circuit. In
most syst ems this is not a problem , as most MCUs
do not operate below 1V. However, in appl ications
where RST output must be valid down to 0V, a
pull-down resistor ma y be adde d to hold the RS T
output low (see Figure 12., page 9). This resistor
must be large enough to not loa d the RST output,
and still be small enough to pull the output to
ground. A 100kΩ resistor is recom m ended .
Note: The same situation applies for the active-
high RST of the STM18 10/1812. A 100kΩ pull-up
resist or to VCC should be used if RST must remain
valid fo r V CC < 1.0V.
Figure 8. Reset Timing Diagram
Note: 1. RS T for STM1812 and S T M 1817
AI09653
RST
RST(1)
VCC VRST
VCC (min) trec
trec
STM1810/1811/1812/1813/1815/1816/1817/1818
8/20
Figure 9. Push-Button Manual Reset with MR Detect (STM1813/1818)
Figure 10. Manual Rese t Timing Diagram, Switch Bou nce/Deb ounce (S TM1813/ 1818)
Figure 11. Interfacing MCUs with Bi- Direct ional Reset Pins (RS T, Open Drain, STM 1811/ 1816)
AI09654
VCC
STM1813
STM1818
RST
Push-button RESET
VCC
VSS
Micro RESET
5.5kΩ
Reset
Monitor
AI09655
RST
VCC
External
Push-button
tPBRST
(Closed)
(Open) tPBRST
Switch Bounce
AI09656
VCC
STM1811
STM1816
RST
VCC
VSS VSS
VCC
MCU
5.5kΩ
RST
Input
9/20
STM1810/1811/1812/1813/1815/1816/1817/1818
Figu re 12 . Vali d R eset (RST) Ou tput Down to VCC = 0V (Pus h- pu ll )
No te : 1. ~ 100 kΩ resistor re commended.
Figu re 13. V ali d Re set (RST) Output Down to VCC = 0 V (Push-pu ll)
No te : 1. ~ 100 kΩ resistor re commended.
AI09657
VCC
RP(1)
STM1810
STM1815
RST
VCC
VSS VSS
VCC
MCU
RST
Input
AI09658
VCC RP(1)
STM1812
STM1817
RST
VCC
VSS VSS
VCC
MCU
RST
Input
STM1810/1811/1812/1813/1815/1816/1817/1818
10/20
TYPICAL OPERATING CHARACTERISTICS
Note: Typical values are at T A = 25°C.
Figure 14. Suppl y Current vs. Temperatu re (no load)
Figu re 15 . Nor m a liz ed R e set Tim e -out Per io d (trec) vs. T emper ature - VOD = VTH – VCC
Temperature (˚C)
Supply Current (µA)
AI10402
0
1
2
3
4
5
–40 –20 0 20 40 60 80 100
VCC = 1.8V
VCC = 3V
VCC = 5V
Temperature (°C)
Normalized Reset Time-out
Period (trec)
AI10403
0.99
1.01
1.03
1.05
1.07
–40 –20 0 20 40 60 80 100
11/20
STM1810/1811/1812/1813/1815/1816/1817/1818
Figure 16. VCC-to-Reset Ou tput Delay vs. Tempera ture - VOD = VTH – VCC
Figure 17. Voltage Ou tpu t Low vs. ISINK
Temperature (°C)
VCC-to-Reset Output Delay (µs)
AI10404
0.0
0.5
1.0
1.5
2.0
2.5
3.0
–40 –20 0 20 40 60 80 100
0.00
0.02
0.04
0.06
0.08
0.10
0123456
ISINK (mA)
VOUT (V)
VCC = 3V
AI10406
STM1810/1811/1812/1813/1815/1816/1817/1818
12/20
Figure 18. Voltage Outpu t High vs. ISOURCE
Figu re 19 . Nor m a liz ed R es et Thres hol d v s. Tem perature
0.00
0.20
0.40
0.60
0.80
1.00
1.20
0.0 1.0 2.0 3.0 4.0 5.0 6.0
ISOURCE (mA)
VOUT / VCC
VCC = 3V
AI10407
Temperature (°C)
Normalized Reset Threshold Voltage
AI10405
0.990
0.995
1.000
1.005
1.010
–40 –20 0 20 40 60 80 100
13/20
STM1810/1811/1812/1813/1815/1816/1817/1818
Figure 20. Max Transient Duration NOT Causing Reset Pulse vs. Reset Thresh old Over drive
Note: Reset occ u rs abov e t he l i ne.
0
5
10
15
20
25
30
10 100 1000
Reset Threshold Overdrive (mV)
Transient Duration (µs)
AI10408
STM1810/1811/1812/1813/1815/1816/1817/1818
14/20
MAXI MUM RAT IN G
Stressing the device above t he rating l isted in t he
Absolute Maximum Rat ings” tabl e may cause per-
manent damage to the device. These are stress
ratings only and operation of the device at t hese or
any other con ditions ab ove those i ndicated in t he
Operating sections of this specification is not im-
plied. Exposure to Absolute Max imum Rating con-
ditions for extended periods may affect device
reliability. Refer also to the STMicroelectronics
SURE Program and other relevant quality docu-
ments.
Table 7. Absolute Maximum Ratings
Note: 1. Ref l ow at pea k t em perature of 2 55°C to 2 60°C for < 30 seconds (total t herma l budget not t o exceed 1 80°C for bet ween 90 to 150
seconds).
DC AND AC PARAMETERS
This section summarizes the operating measure-
ment cond itions , a nd the DC and AC characteris-
tics of the device. The p arameters in the DC and
AC characteristics Tables that follow, are derived
from tests performed under the Measurement
Conditions summarized in Table 8, Operating and
AC Measurement Conditions. Designers should
check t hat the operating cond itions in their circuit
match the operating conditions when relying on
the quot ed parameters.
Table 8. Operating and AC Measurem en t Conditions
Figure 21. AC Testing Input/Output Waveforms
Symbol Parameter Value Unit
TSTG Storage Temperature (VCC Off) –55 to 150 °C
TSLD(1) Lead Solder Temperature for 10 seconds 260 °C
VIO Input or Output Voltage –0.3 to VCC +0.3 V
VCC Supply Voltage –0.3 to 7.0 V
IOOutput Current 20 mA
PDPower Dissipation 320 mW
Parameter STM1810 - 1818 Unit
VCC Supply Voltage 1.0 to 5.5 V
Ambient Operating Temperature (TA)–40 to 105 °C
Input Rise and Fall Times ≤ 5ns
Input Pulse Voltages 0.2 to 0.8VCC V
Input and Output Timing Ref. Voltages 0.3 to 0.7VCC V
AI02568
0.8VCC
0.2VCC
0.7VCC
0.3VCC
15/20
STM1810/1811/1812/1813/1815/1816/1817/1818
Table 9. DC and AC Characte ris tics
Note: 1. Va l i d for Ambi ent Opera ting Temperature: TA = –40 to 105°C; VCC = 1.2V to 5.5V (except where noted) .
2. The STM18 11/1813/1816 /1818 hav e an internal pull-u p resist or which m ay sink 1m A of c urrent.
Sym Alter-
native Description Test Condition(1) Min Typ Max Unit
VCC Operating Voltage TA = 0 to +105°C 1.0 5.5 V
TA = –40 to +105°C 1.2 5.5 V
ICC VCC Supply Current VCC = 3.6V, No load 410µA
VCC = 5.5V, No load 916µA
VIH Input High Voltage STM1813/1818 only 0.7VCC V
VIL Input Low Voltage STM1813/1818 only 0.4 V
VOH Output High Voltage 0 < IOH < 500µAVCC –
0.5 VCC
– 0.1 V
IOH
RST Output Source Current VCC ≥ VRST (max), Reset not
asserted (STM1810/STM1815) 350 µA
RST Output Source Current VCC ≤ VRST (min), Reset asserted
(STM1812/STM1817) 350 µA
IOL
RST Output Sink Current VCC ≥ 2.7V, Reset asserted,
VOUT = 0.4V (STM1810/1811/
1813/1815/1816/1818) 10 mA
RST Output Sink Current VCC ≥ 2.7V, Reset not asserted,
VOUT = 0.4V, (STM1812/1817) 10 mA
COUT Output Capacitance(2) 10 pF
Reset Thresholds
VRST Reset Threshold
STM181xL 25°C 4.62 V
–40 to 105°C 4.50 4.75 V
STM181xM 25°C 4.37 V
–40 to 105°C 4.25 4.49 V
STM181xT 25°C 3.06 V
–40 to 105°C 2.98 3.15 V
STM181xS 25°C 2.88 V
–40 to 105°C 2.80 2.97 V
STM181xR 25°C 2.55 V
–40 to 105°C 2.47 2.64 V
tRD VCC to RST Delay VCC = (VTH + 100mV) falling to
(VTH – 200mV) 25µs
trec RST Pulse Width VCC Rising 100 150 200 ms
Push-Button Reset Detect (STM1813, STM1818)
tPB Push-button Detect to RST STM1813/1818 1.5 µs
tPBRST Push-b utton RST Time-out From Rising Edge 100 150 200 ms
Internal Pull-up Resistance STM1811/1816 3.5 5.5 7.5 kΩ
STM1813/1818 3.1 5.5 7.5 kΩ
STM1810/1811/1812/1813/1815/1816/1817/1818
16/20
P ACKAGE MECHANI CAL
Figure 22. SOT23-3 – 3-lead Small Outl ine Transisto r Package Outline
No te : Drawing is not to scal e.
Table 10. SOT23-3 – 3-lead Small Outline Transis tor Package Mech anical Data
Symbol mm inches
Typ Min Max Typ Min Max
A 0.89 1.12 0.035 0.044
A1 0.01 0.10 0.001 0.004
A2 0.88 1.02 0.035 0.042
b 0.30 0.50 0.012 0.020
C 0.08 0.20 0.003 0.008
D 2.80 3.04 0.110 0.120
E 2.10 2.64 0.083 0.104
E1 1.20 1.40 0.047 0.055
e 0.89 1.03 0.035 0.041
e1 1.78 2.05 0.070 0.081
L 0.54 0.021
L1 0.40 0.60 0.016 0.024
Θ0° 8° 0° 8°
N3 3
SOT23-3
0.10 C
A
A2
A1
3X
C
C
L1
θ
L
C
e1 D
e
3X b
E
M
0.15 CAB
B
E1
A
M
0.20 C A B
1
17/20
STM1810/1811/1812/1813/1815/1816/1817/1818
PART NUMBERING
Table 11. Ordering Information Scheme
Note: 1. Contact the local ST sales office for availability.
For other options, or for more information on any aspec t of this device, please contact the ST Sales Office
nearest you.
Example: STM1810 L WX 7 F
Device Type
STM181x
Reset Threshold Voltage
STM1810 - 1813:
L = VRST = 4.50V to 4.75V (4.62 typ)
M = VRST = 4.25V to 4.49V (4.37 typ)
STM1815 - 1818:
T = VRST = 2.98V to 3.15V (3.06 typ)
S = VRST = 2.80V to 2.97V (2.88 typ)
R = VRST = 2.47V to 2.64V (2.55 typ)
Package
WX = SOT23-3
Temperature Range
7 = –40 to 105°C
Shipping Method
F = Pb-Free Package, Tape & Reel
STM1810/1811/1812/1813/1815/1816/1817/1818
18/20
Table 12. Marking Description
Part Number Reset Threshold Output Topside Marking
STM18 10L 4.62V Push-Pull R ST
STM18 10M 4.37V Push-Pull R ST
STM1811L 4.62V Open Drain RST
STM1811M 4.37V Open Drain RST
STM1812L 4.62V Push-Pull RST
STM1812M 4.37V Push-Pull RST
STM1813L 4.62V Open Drain RST
STM1813M 4.37V Open Drain RST
STM18 15T 3.06V Push -Pull R ST
STM18 15S 2.88V Push-Pull R ST
STM18 15R 2.55V Push -Pull R ST
STM1816T 3.06V Open Drain RST
STM1816S 2.88V Open Drain RST
STM1816R 2.55V Open Drain RST
STM1817T 3.06V Push-Pull RST
STM1817S 2.88V Push-Pull RST
STM1817R 2.55V Push-Pull RST
STM1818T 3.06V Open Drain RST
STM1818S 2.88V Open Drain RST
STM1818R 2.55V Open Drain RST
19/20
STM1810/1811/1812/1813/1815/1816/1817/1818
REVISION HI STORY
Table 13. Document Revi sion History
Date Revision Revision Details
26-Aug-04 1.0 First Issue
05-Oct-04 2.0 Update reset characteristics, add typical graphs, remove SC70 references (Figure
1, 2, 4, 7, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20; Table 9, 11, 12)
19-Nov-04 3.0 Update dimensions (Table 10)
07-Dec-04 4.0 Remove some voltage options (Table 1, 9, 11, 12)
29-Jun-05 5 Temperature range change (Figure 14, 15, 16, 19; Table 8, 9, 11)
STM1810/1811/1812/1813/1815/1816/1817/1818
20/20
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