Low Cost, High Speed Differential Amplifier AD8132 Low power differential ADC drivers Differential gain and differential filtering Video line drivers Differential in/out level shifting Single-ended input to differential output drivers Active transformers GENERAL DESCRIPTION The AD8132 is a low cost differential or single-ended input to differential output amplifier with resistor settable gain. The AD8132 is a major advancement over op amps for driving differential input ADCs or for driving signals over long lines. The AD8132 has a unique internal feedback feature that provides output gain and phase matching balanced to -68 dB at 10 MHz, suppressing harmonics and reducing radiated EMI. Manufactured using ADI's next generation XFCB bipolar process, the AD8132 has a -3 dB bandwidth of 350 MHz and delivers a differential signal with -99 dBc SFDR at 5 MHz, despite its low cost. The AD8132 eliminates the need for a transformer with high performance ADCs, preserving the low frequency and dc information. The common-mode level of the differential output is adjustable by applying a voltage on the VOCM pin, easily level shifting the input signals for driving single-supply ADCs. Fast overload recovery preserves sampling accuracy. AD8132 8 +IN VOCM 2 7 NC V+ 3 6 V- +OUT 4 5 -OUT NC = NO CONNECT Figure 1. The AD8132 can also be used as a differential driver for the transmission of high speed signals over low cost twisted pair or coaxial cables. The feedback network can be adjusted to boost the high frequency components of the signal. The AD8132 can be used for either analog or digital video signals or for other high speed data transmission. The AD8132 is capable of driving either cat3 or cat5 twisted pair or coaxial with minimal line attenuation. The AD8132 has considerable cost and performance improvements over discrete line driver solutions. Differential signal processing reduces the effects of ground noise that plagues ground referenced systems. The AD8132 can be used for differential signal processing (gain and filtering) throughout a signal chain, easily simplifying the conversion between differential and single-ended components. The AD8132 is available in both SOIC and MSOP packages for operation over -40C to +125C temperatures. 6 VS = 5V G = +1 VO, dm = 2V p-p RL, dm = 499 3 0 -3 -6 -9 01035-002 APPLICATIONS -IN 1 GAIN (dB) High speed 350 MHz -3 dB bandwidth 1200 V/s slew rate Resistor settable gain Internal common-mode feedback to improve gain and phase balance -68 dB @ 10 MHz Separate input to set the common-mode output voltage Low distortion: -99 dBc SFDR @ 5 MHz 800 Load Low power: 10.7 mA @ 5 V Power supply range: +2.7 V to 5.5 V FUNCTIONAL BLOCK DIAGRAM 01035-001 FEATURES -12 1 10 100 FREQUENCY (MHz) 1k Figure 2. Large Signal Frequency Response Rev. D Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.326.8703 (c) 2004 Analog Devices, Inc. All rights reserved. AD8132 TABLE OF CONTENTS Specifications..................................................................................... 3 Varying 2 ................................................................................... 22 DIN to OUT Specifications...................................................... 3 1 = 0............................................................................................ 22 VOCM to OUT Specifications ..................................................... 4 Estimating the Output Noise Voltage ...................................... 22 DIN to OUT Specifications...................................................... 5 Calculating an Application Circuit's Input Impedance ......... 23 VOCM to OUT Specifications ..................................................... 6 Input Common-Mode Voltage Range in Single-Supply Applications ................................................................................ 23 DIN to OUT Specifications...................................................... 7 VOCM to OUT Specifications ..................................................... 7 Absolute Maximum Ratings............................................................ 8 ESD Caution.................................................................................. 8 Pin Configuration and Function Descriptions............................. 9 Typical Performance Characteristics ........................................... 10 Test Circuits..................................................................................... 19 Operational Description................................................................ 20 Definition of Terms.................................................................... 20 Basic Circuit Operation ............................................................. 20 Theory of Operation ...................................................................... 21 General Usage of the AD8132................................................... 21 Resistorless Differential Amplifier (High Input Impedance Inverting Amplifier)................................................................... 21 Setting the Output Common-Mode Voltage .......................... 23 Driving a Capacitive Load......................................................... 23 Layout, Grounding, and Bypassing .............................................. 24 Circuits......................................................................................... 24 Applications..................................................................................... 25 A/D Driver .................................................................................. 25 Balanced Cable Driver............................................................... 25 Transmit Equalizer ..................................................................... 26 Low-Pass Differential Filter ...................................................... 26 High Common-Mode Output Impedance Amplifier............ 27 Full-Wave Rectifier .................................................................... 27 Outline Dimensions ....................................................................... 29 Ordering Guide .......................................................................... 29 Other 2 = 1 Circuits ................................................................. 22 REVISION HISTORY 12/04--Rev. C to Rev. D. Changes to the General Description.............................................. 1 Changes to the Specifications ......................................................... 2 Changes to the Absolute Maximum Ratings................................. 8 Updated the Outline Dimensions................................................. 29 Changes to the Ordering Guide.................................................... 29 2/03--Rev. B to Rev. C. Changes to SPECIFICATIONS .......................................................2 Addition to Estimating the Output Noise Voltage section ....... 15 Updated OUTLINE DIMENSIONS ............................................ 21 1/02--Rev. A to Rev. B. Edits to TRANSMITTER EQUALIZER section ...........................18 Rev. D | Page 2 of 32 AD8132 SPECIFICATIONS DIN TO OUT SPECIFICATIONS At 25C, VS = 5 V, VOCM = 0 V, G = 1, RL, dm = 499 , RF = RG = 348 , unless otherwise noted. For G = 2, RL, dm = 200 , RF = 1000 , RG = 499 . Refer to Figure 56 and Figure 57 for test setup and label descriptions. All specifications refer to single-ended input and differential outputs, unless otherwise noted. Table 1. Parameter DYNAMIC PERFORMANCE -3 dB Large Signal Bandwidth -3 dB Small Signal Bandwidth Bandwidth for 0.1 dB Flatness Slew Rate Settling Time Overdrive Recovery Time NOISE/HARMONIC PERFORMANCE Second Harmonic Third Harmonic IMD IP3 Input Voltage Noise (RTI) Input Current Noise Differential Gain Error Differential Phase Error INPUT CHARACTERISTICS Offset Voltage (RTI) Input Bias Current Input Resistance Input Capacitance Input Common-Mode Voltage CMRR OUTPUT CHARACTERISTICS Output Voltage Swing Output Current Output Balance Error Conditions Min Typ VOUT = 2 V p-p VOUT = 2 V p-p, G = 2 VOUT = 0.2 V p-p VOUT = 0.2 V p-p, G = 2 VOUT = 0.2 V p-p VOUT = 0.2 V p-p, G = 2 VOUT = 2 V p-p 0.1%, VOUT = 2 V p-p VIN = 5 V to 0 V Step, G = 2 300 350 190 360 160 90 50 1200 15 5 MHz MHz MHz MHz MHz MHz V/s ns ns VOUT = 2 V p-p, 1 MHz, RL, dm = 800 VOUT = 2 V p-p, 5 MHz, RL, dm = 800 VOUT = 2 V p-p, 20 MHz, RL, dm = 800 VOUT = 2 V p-p, 1 MHz, RL, dm = 800 VOUT = 2 V p-p, 5 MHz, RL, dm = 800 VOUT = 2 V p-p, 20 MHz, RL, dm = 800 20 MHz, RL, dm = 800 20 MHz, RL, dm = 800 f = 0.1 MHz to 100 MHz -96 -83 -73 -102 -98 -67 -76 40 8 dBc dBc dBc dBc dBc dBc dBc dBm nV/Hz pA/Hz % Degrees 1000 f = 0.1 MHz to 100 MHz 1.8 NTSC, G = 2, RL, dm = 150 NTSC, G = 2, RL, dm = 150 0.01 0.10 VOS, dm = VOUT, dm/2; VDIN+ = VDIN- = VOCM = 0 V TMIN to TMAX Variation 1.0 10 3 12 3.5 1 -4 to +3 -70 Differential Common-Mode VOUT, dm/VIN, cm; VIN, cm = 1 V; Resistors Matched to 0.01% Maximum VOUT; Single-Ended Output VOUT, cm/VOUT, dm; VOUT, dm = 1 V Rev. D | Page 3 of 32 -3.6 to +3.6 70 -70 Max 3.5 7 -60 Unit mV V/C A M M pF V dB V mA dB AD8132 VOCM TO OUT SPECIFICATIONS At 25C, VS = 5 V, VOCM = 0 V, G = 1, RL, dm = 499 , RF = RG = 348 , unless otherwise noted. For G = 2, RL, dm = 200 , RF = 1000 , RG = 499 . Refer to Figure 56 and Figure 57 for test setup and label descriptions. All specifications refer to single-ended input and differential outputs, unless otherwise noted. Table 2. Parameter DYNAMIC PERFORMANCE -3 dB Bandwidth Slew Rate Input Voltage Noise (RTI) DC PERFORMANCE Input Voltage Range Input Resistance Input Offset Voltage Input Bias Current VOCM CMRR Gain POWER SUPPLY Operating Range Quiescent Current Power Supply Rejection Ratio OPERATING TEMPERATURE RANGE Conditions Min VOCM = 600 mV p-p VOCM = -1 V to +1 V f = 0.1 MHz to 100 MHz VOS, cm = VOUT, cm; VDIN+ = VDIN- = VOCM = 0 V VOUT, dm/VOCM; VOCM = 1 V; Resistors Matched to 0.01% VOUT, cm/VOCM; VOCM = 1 V VDIN+ = VDIN- = VOCM = 0 V TMIN to TMAX Variation VOUT, dm/VS; VS = 1 V 0.985 1.35 11 -40 Rev. D | Page 4 of 32 Typ Max Unit 210 400 12 MHz V/s nV/Hz 3.6 50 1.5 0.5 -68 1 V k mV A dB V/V 12 16 -70 7 1.015 5.5 13 -60 +125 V mA A/C dB C AD8132 DIN TO OUT SPECIFICATIONS At 25C, VS = 5 V, VOCM = 2.5 V, G = 1, RL, dm = 499 , RF = RG = 348 , unless otherwise noted. For G = 2, RL, dm = 200 , RF = 1000 , RG = 499 . Refer to Figure 56 and Figure 57 for test setup and label descriptions. All specifications refer to single-ended input and differential outputs, unless otherwise noted. Table 3. Parameter DYNAMIC PERFORMANCE -3 dB Large Signal Bandwidth -3 dB Small Signal Bandwidth Bandwidth for 0.1 dB Flatness Slew Rate Settling Time Overdrive Recovery Time NOISE/HARMONIC PERFORMANCE Second Harmonic Third Harmonic IMD IP3 Input Voltage Noise (RTI) Input Current Noise Differential Gain Error Differential Phase Error INPUT CHARACTERISTICS Offset Voltage (RTI) Input Bias Current Input Resistance Input Capacitance Input Common-Mode Voltage CMRR OUTPUT CHARACTERISTICS Output Voltage Swing Output Current Output Balance Error Conditions Min Typ VOUT = 2 V p-p VOUT = 2 V p-p, G = 2 VOUT = 0.2 V p-p VOUT = 0.2 V p-p, G = 2 VOUT = 0.2 V p-p VOUT = 0.2 V p-p, G = 2 VOUT = 2 V p-p 0.1%, VOUT = 2 V p-p VIN = 2.5 V to 0 V Step, G = 2 250 300 180 360 155 65 50 1000 20 5 MHz MHz MHz MHz MHz MHz V/s ns ns VOUT = 2 V p-p, 1 MHz, RL, dm = 800 VOUT = 2 V p-p, 5 MHz, RL, dm = 800 VOUT = 2 V p-p, 20 MHz, RL, dm = 800 VOUT = 2 V p-p, 1 MHz, RL, dm = 800 VOUT = 2 V p-p, 5 MHz, RL, dm = 800 VOUT = 2 V p-p, 20 MHz, RL, dm = 800 20 MHz, RL, dm = 800 20 MHz, RL, dm = 800 f = 0.1 MHz to 100 MHz f = 0.1 MHz to 100 MHz NTSC, G = 2, RL, dm = 150 NTSC, G = 2, RL, dm = 150 -97 -100 -74 -100 -99 -67 -76 40 8 1.8 0.025 0.15 dBc dBc dBc dBc dBc dBc dBc dBm nV/Hz pA/Hz % Degree VOS, dm = VOUT, dm/2; VDIN+ = VDIN- = VOCM = 2.5 V TMIN to TMAX Variation 1.0 6 3 10 3 1 1 to 3 -70 Differential Common-Mode VOUT, dm/VIN, cm; VIN, cm = 1 V; Resistors Matched to 0.01% Maximum VOUT; Single-Ended Output VOUT, cm/VOUT, dm; VOUT, dm = 1 V Rev. D | Page 5 of 32 800 1.0 to 4.0 50 -68 Max 3.5 7 -60 Unit mV V/C A M M pF V dB V mA dB AD8132 VOCM TO OUT SPECIFICATIONS At 25C, VS = 5 V, VOCM = 2.5 V, G = 1, RL, dm = 499 , RF = RG = 348 , unless otherwise noted. For G = 2, RL, dm = 200 , RF = 1000 , RG = 499 . Refer to Figure 56 and Figure 57 for test setup and label descriptions. All specifications refer to single-ended input and differential outputs, unless otherwise noted. Table 4. Parameter DYNAMIC PERFORMANCE -3 dB Bandwidth Slew Rate Input Voltage Noise (RTI) DC PERFORMANCE Input Voltage Range Input Resistance Input Offset Voltage Input Bias Current VOCM CMRR Gain POWER SUPPLY Operating Range Quiescent Current Power Supply Rejection Ratio OPERATING TEMPERATURE RANGE Conditions Min VOCM = 600 mV p-p VOCM = 1.5 V to 3.5 V f = 0.1 MHz to 100 MHz VOS, cm = VOUT, cm; VDIN+ = VDIN- = VOCM = 2.5 V VOUT, dm/VOCM; VOCM = 2.5 V 1 V; Resistors Matched to 0.01% VOUT, cm/VOCM; VOCM = 2.5 V 1 V VDIN+ = VDIN- = VOCM = 2.5 V TMIN to TMAX Variation VOUT, dm/VS; VS = 1 V 0.985 2.7 9.4 -40 Rev. D | Page 6 of 32 Typ Max Unit 210 340 12 MHz V/s nV/Hz 1.0 to 3.7 30 5 0.5 -66 1 V k mV A dB V/V 10.7 10 -70 11 1.015 11 12 -60 +125 V mA A/C dB C AD8132 DIN TO OUT SPECIFICATIONS At 25C, VS = 3 V, VOCM = 1.5 V, G = 1, RL, dm = 499 , RF = RG = 348 unless otherwise noted. For G = 2, RL, dm = 200 , RF = 1000 , RG = 499 . Refer to Figure 56 and Figure 57 for test setup and label descriptions. All specifications refer to single-ended input and differential outputs, unless otherwise noted. Table 5. Parameter DYNAMIC PERFORMANCE -3 dB Large Signal Bandwidth -3 dB Small Signal Bandwidth Bandwidth for 0.1 dB Flatness NOISE/HARMONIC PERFORMANCE Second Harmonic Third Harmonic INPUT CHARACTERISTICS Offset Voltage (RTI) Input Bias Current CMRR Conditions Min Typ Max Unit VOUT = 1 V p-p VOUT = 1 V p-p, G = 2 VOUT = 0.2 V p-p VOUT = 0.2 V p-p, G = 2 VOUT = 0.2 V p-p VOUT = 0.2 V p-p, G = 2 350 165 350 150 45 50 MHz MHz MHz MHz MHz MHz VOUT = 1 V p-p, 1 MHz, RL, dm = 800 VOUT = 1 V p-p, 5 MHz, RL, dm = 800 VOUT = 1 V p-p, 20 MHz, RL, dm = 800 VOUT = 1 V p-p, 1 MHz, RL, dm = 800 VOUT = 1 V p-p, 5 MHz, RL, dm = 800 VOUT = 1 V p-p, 20 MHz, RL, dm = 800 -100 -94 -77 -90 -85 -66 dBc dBc dBc dBc dBc dBc VOS, dm = VOUT, dm/2; VDIN+ = VDIN- = VOCM = 1.5 V 10 3 -60 mV A dB VOUT, dm/VIN, cm; VIN, cm = 0.5 V; Resistors Matched to 0.01% VOCM TO OUT SPECIFICATIONS At 25C, VS = 3 V, VOCM = 1.5 V, G = 1, RL, dm = 499 , RF = RG = 348 unless otherwise noted. For G = 2, RL, dm = 200 , RF = 1000 , RG = 499 . Refer to Figure 56 and Figure 57 for test setup and label descriptions. All specifications refer to single-ended input and differential outputs, unless otherwise noted. Table 6. Parameter DC PERFORMANCE Input Offset Voltage Gain POWER SUPPLY Operating Range Quiescent Current Power Supply Rejection Ratio OPERATING TEMPERATURE RANGE Conditions Min VOS, cm = VOUT, cm; VDIN+ = VDIN- = VOCM = 1.5 V VOUT, cm/VOCM; VOCM = 0.5 V Typ 7 1 2.7 VDIN+ = VDIN- = VOCM = 0 V VOUT, dm/VS; VS = 0.5 V Unit mV V/V 11 7.25 -70 -40 Rev. D | Page 7 of 32 Max +125 V mA dB C AD8132 ABSOLUTE MAXIMUM RATINGS Table 7. 1 Stresses above those listed under absolute maximum ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational section of this specification is not implied. Exposure to Absolute Maximum Ratings for extended periods may affect device reliability. 2.0 Thermal resistance measured on SEMI-standard, 4-layer board. 8-Lead SOIC: JA = 121C/W 8-Lead MSOP: JA = 142C/W MAXIMUM POWER DISSIPATION (W) 1 Ratings 5.5 V VS 250 mW -40C to +125C -65C to +150C 300C TJ = 150C 1.5 8-LEAD SOIC PACKAGE 1.0 8-LEAD MSOP PACKAGE 0.5 0 -50 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 AMBIENT TEMPERATURE (C) Figure 3. Plot of Maximum Power Dissipation vs. Temperature ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Rev. D | Page 8 of 32 01035-003 Parameter Supply Voltage VOCM Internal Power Dissipation Operating Temperature Range Storage Temperature Range Lead Temperature (Soldering 10 sec) AD8132 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS AD8132 Table 8. Pin Function Descriptions 8 +IN VOCM 2 7 NC V+ 3 6 V- +OUT 4 5 -OUT NC = NO CONNECT 01035-004 -IN 1 Pin No. 1 2 Mnemonic -IN VOCM 3 4 V+ +OUT 5 -OUT 6 7 8 V- NC +IN Figure 4. Pin Configuration Rev. D | Page 9 of 32 Description Negative Input. Voltage applied to this pin sets the common-mode output voltage with a ratio of 1:1. For example, 1 V dc on VOCM sets the dc bias level on +OUT and -OUT to 1 V. Positive Supply Voltage. Positive Output. Note that the voltage at -DIN is inverted at +OUT (see Figure 64). Negative Output. Note that the voltage at +DIN is inverted at -OUT (see Figure 64). Negative Supply Voltage. No Connect. Positive Input. AD8132 TYPICAL PERFORMANCE CHARACTERISTICS 3 2 VS = +3V 1 VS = 5V VS = +3V 2 VS = +5V VS = +5V 1 0 VS = 5V -1 GAIN (dB) GAIN (dB) 0 -2 VS = +3V -1 -2 G = +1 VO, dm = 0.2V p-p RL, dm = 499 -4 01035-006 -4 -5 1 10 100 FREQUENCY (MHz) -5 1k 1 0.5 1k 2 G = +1 VO, dm = 0.2V p-p RL, dm = 499 0.3 VS = +3V 1 VS = +5V 0.2 VS = +5V 0 GAIN (dB) 0.1 0 -0.1 VS = +3V VS = 5V -0.2 VS = 5V -1 VS = +3V -2 G = +1 VO, dm = 2V p-p FOR VS = 5V, +5V VO, dm = 1V p-p FOR VS = +3V RL, dm = 499 -3 -0.3 -4 01035-007 -0.4 -0.5 1 10 100 FREQUENCY (MHz) -5 1k Figure 6. 0.1 dB Flatness vs. Frequency CF = 0 pF (See Figure 56) 01035-010 0.4 1 10 100 FREQUENCY (MHz) 3 VS = +3V 0.1 1k Figure 9. Large Signal Frequency Response; CF = 0.5 pF (See Figure 56) 0.2 +85C +25C 2 VS = +5V 1 0 VS = 5V -0.1 GAIN (dB) GAIN (dB) 10 100 FREQUENCY (MHz) Figure 8. Large Signal Frequency Response; CF = 0 pF (See Figure 56) Figure 5. Small Signal Frequency Response (See Figure 56) GAIN (dB) G = +1 VO, dm = 2V p-p FOR VS = 5V, +5V VO, dm = 1V p-p FOR VS = +3V RL, dm = 499 -3 01035-009 -3 -0.2 0 -40C -1 -2 VS = 5V G = +1 VO, dm = 2V p-p RL, dm = 499 -0.3 G = +1 VO, dm = 0.2V p-p RL, dm = 499 10 100 FREQUENCY (MHz) 01035-011 -0.5 1 -4 01035-008 -0.4 -3 -5 1k 1 Figure 7. 0.1 dB Flatness vs. Frequency CF = 0.5 pF (See Figure 56) 10 100 FREQUENCY (MHz) 1k Figure 10. Large Signal Response vs. Temperature (See Figure 56) Rev. D | Page 10 of 32 AD8132 6.1 3 RF = 499 2 6.0 RF = 348 1 GAIN (dB) GAIN (dB) 5.9 0 RF = 249 -1 5.8 -2 5.7 -3 01035-012 -4 -5 1 VS = +3V, +5V, 5V G = +2 VO, dm = 0.2V p-p RL, dm = 200 5.6 10 100 FREQUENCY (MHz) 01035-016 VS = 5V G = +1 VO, dm = 2V p-p RL, dm = 499 5.5 1 1k Figure 11. Large Signal Frequency Response vs. RF (See Figure 56) 10 100 FREQUENCY (MHz) 1k Figure 14. 0.1 dB Flatness vs. Frequency (See Figure 57) 7 100 VS = +5V, 5V 6 GAIN (dB) 1 4 G = +2 VO, dm = 2V p-p FOR VS = 5V, +5V VO, dm = 1V p-p FOR VS = +3V RL, dm = 200 3 VS = +5V 2 01035-013 VS = 5V 0.1 1 10 FREQUENCY (MHz) 01035-017 IMPEDANCE () VS = +3V 5 10 1 1 100 Figure 12. Closed-Loop Single-Ended ZOUT vs. Frequency; G = 1 (See Figure 56) 10 100 FREQUENCY (MHz) 1k Figure 15. Large Signal Frequency Response (See Figure 57) 7 7 RF = 1.5k 6 6 VS = 5V, +5V RF = 1.0k GAIN (dB) 5 4 VS = +3V 3 RF = 499 4 VS = 5V G = +2 VO, dm = 0.2V p-p RL, dm = 200 3 G = +2 VO, dm = 0.2V p-p RL, dm = 200 2 1 1 10 100 FREQUENCY (MHz) 01035-018 2 01035-015 GAIN (dB) 5 1 1k 1 Figure 13. Small Signal Frequency Response (See Figure 57) 10 100 FREQUENCY (MHz) 1k Figure 16. Small Signal Frequency Response vs. RF (See Figure 57) Rev. D | Page 11 of 32 AD8132 -30 25 G = +10, RF = 4.99k G = +5, RF = 2.49k 10 G = +2, RF = 1k 5 G = +1, RF = 499 0 VS = 5V VO, dm = 2V p-p RL, dm = 200 RG = 499 -10 -15 1 HD3 (VS = 5V) -70 HD2 (VS = +5V) -80 -100 10 100 FREQUENCY (MHz) -110 0 1k 10 20 30 40 FREQUENCY (MHz) 50 60 70 Figure 20. Harmonic Distortion vs. Frequency, G = 1 (See Figure 62) Figure 17. Large Signal Response for Various Gains (See Figure 58) -40 -25 VS = 5V VO, dm = 2V p-p VO, cm/VO, dm -30 -35 VS = 3V RL, dm = 800 -50 HD3 (F = 20MHz) -60 -40 DISTORTION (dBc) RTI BALANCE ERROR (dB) HD2 (VS = 5V) -60 -90 01035-020 -5 HD3 (VS = +5V) -50 DISTORTION (dBc) GAIN (dB) 15 RL, dm = 800 VO, dm = 2V p-p -40 01035-025 20 -45 G = +1 -50 -55 -60 HD2 (F = 20MHz) -70 -80 -90 G = +2 -65 1 10 100 FREQUENCY (MHz) HD2 (F = 5MHz) -110 0.25 1k 0.50 0.75 1.00 1.25 1.50 DIFFERENTIAL OUTPUT VOLTAGE (V p-p) 1.75 Figure 21. Harmonic Distortion vs. Differential Output Voltage, G = 1 (See Figure 62) Figure 18. RTI Output Balance Error vs. Frequency (See Figure 59) -40 RL, dm = 800 VO, dm = 1V p-p -50 VS = 5V RL, dm = 800 -50 HD3 (VS = 3V) HD3 (F = 20MHz) -60 DISTORTION (dBc) -60 HD2 (VS = 3V) -70 -80 HD2 (VS = 5V) -70 HD2 (F = 20MHz) -80 HD2 (F = 5MHz) -90 -90 HD3 (VS = 5V) -110 0 10 20 30 40 FREQUENCY (MHz) -100 01035-024 -100 50 60 HD3 (F = 5MHz) 01035-027 -40 DISTORTION (dBc) 01035-026 -75 HD3 (F = 5MHz) -100 01035-022 -70 -110 0 70 1 2 3 DIFFERENTIAL OUTPUT VOLTAGE (V p-p) Figure 22. Harmonic Distortion vs. Differential Output Voltage, G = 1 (See Figure 62) Figure 19. Harmonic Distortion vs. Frequency, G = 1 (See Figure 62) Rev. D | Page 12 of 32 4 AD8132 -50 -40 VS = 5V RL, dm = 800 -50 HD3 (F = 20MHz) -60 DISTORTION (dBc) HD2 (F = 20MHz) -60 -70 -80 HD2 (F = 5MHz) -90 -70 HD2 (F = 20MHz) -80 HD2 (F = 5MHz) -90 -100 01035-028 -100 HD3 (F = 5MHz) -110 HD3 (F = 5MHz) -110 200 6 1 2 3 4 5 DIFFERENTIAL OUTPUT VOLTAGE (V p-p) 0 01035-031 DISTORTION (dBc) VS = 5V VO, dm = 2V p-p HD3 (F = 20MHz) 300 400 500 600 700 RLOAD () 800 900 1000 Figure 26. Harmonic Distortion vs. RLOAD, G = 1 (See Figure 62) Figure 23. Harmonic Distortion vs. Differential Output Voltage, G = 1 (See Figure 62) -50 -40 VS = 3V VO, dm = 1V p-p HD3 (F = 20MHz) -60 RL,dm = 800 VO, dm = 1V p-p -50 HD3 (VS = 3V) -70 DISTORTION (dBc) DISTORTION (dBc) -60 HD2 (F = 20MHz) -80 -90 HD3 (F = 5MHz) -70 HD2 (VS = 5V) -80 -90 HD2 (VS = 3V) -100 300 400 500 700 600 RLOAD () 800 900 HD3 (VS = 5V) -110 1000 0 Figure 24. Harmonic Distortion vs. RLOAD, G = 1 (See Figure 62) DISTORTION (dBc) -80 HD2 (F = 20MHz) HD2 (F = 5MHz) -90 60 70 HD3 (VS = 5V) -60 -70 -80 500 700 600 RLOAD () 800 900 HD3 (VS = +5V) -50 HD2 (VS = 5V) HD3 (F = 5MHz) 01035-030 -90 01035-034 DISTORTION (dBc) 50 HD2 (VS = +5V) -40 -70 400 40 30 FREQUENCY (MHz) RL, dm = 800 VO,dm = 4V p-p -30 HD3 (F = 20MHz) -60 300 20 -20 VS = 5V VO, dm = 2V p-p -110 200 10 Figure 27. Harmonic Distortion vs. Frequency, G = 2 (See Figure 63) -50 -100 01035-033 -110 200 -100 01035-029 HD2 (F = 5MHz) -100 1000 0 Figure 25. Harmonic Distortion vs. RLOAD, G = 1 (See Figure 62) 10 20 30 40 50 FREQUENCY (MHz) 60 70 80 Figure 28. Harmonic Distortion vs. Frequency, G = 2 (See Figure 63) Rev. D | Page 13 of 32 AD8132 -40 -50 VS = 5V RL, dm = 800 -50 VS = 5V VO, dm = 2V p-p HD3 (F = 20MHz) HD3 (F = 20MHz) -60 HD2 (F = 20MHz) DISTORTION (dBc) DISTORTION (dBc) -60 -70 HD2 (F = 20MHz) -80 -90 HD2 (F = 5MHz) -70 -80 HD2 (F = 5MHz) -90 -100 -100 -120 2 1 3 DIFFERENTIAL OUTPUT VOLTAGE (V p-p) -110 200 4 Figure 29. Harmonic Distortion vs. Differential Output Voltage, G = 2 (See Figure 63) 500 600 700 RLOAD () 900 800 1000 10 HD3 (F = 20MHz) fC = 20MHz VS = 5V RL, dm = 800 0 -10 POUT (dBm [Re: 50]) HD2 (F = 20MHz) -60 -70 -80 -90 HD3 (F = 5MHz) -100 01035-036 -110 1 3 2 5 4 DIFFERENTIAL OUTPUT VOLTAGE (V p-p) -30 -40 -50 -60 -70 HD2 (F = 5MHz) 0 -20 -80 -90 19.5 6 20.0 FREQUENCY (MHz) 45 -50 VS = 5V VO, dm = 2V p-p 20.5 Figure 33. Intermodulation Distortion, G = 1 Figure 30. Harmonic Distortion vs. Differential Output Voltage, G = 2 (See Figure 63) VS = 5V, +5V RL, dm = 800 HD3 (F = 20MHz) 40 INTERCEPT (dBm [Re: 50]) -60 -70 HD2 (F = 20MHz) -80 HD2 (F = 5MHz) -90 35 30 25 01035-037 HD3 (F = 5MHz) 300 400 500 700 600 RLOAD () 800 900 01035-040 20 -100 -110 200 01035-039 VS = 5V RL, dm = 800 -50 DISTORTION (dBc) 400 Figure 32. Harmonic Distortion vs. RLOAD, G = 2 (See Figure 63) -40 DISTORTION (dBc) 300 01035-038 HD3 (F = 5MHz) 0 HD3 (F = 5MHz) 01035-035 -110 15 0 1000 10 20 30 40 FREQUENCY (MHz) 50 60 Figure 34. Third-Order Intercept vs. Frequency, G = 1 Figure 31. Harmonic Distortion vs. RLOAD, G = 2 (See Figure 63) Rev. D | Page 14 of 32 70 AD8132 VS = 5V VO,dm = 2V p-p CF = 0pF VS = 5V, +5V, +3V 5ns 400mV Figure 35. Small Signal Transient Response, G = 1 5ns 01035-044 40mV 01035-041 CF = 0.5pF Figure 38. Large Signal Transient Response, G = 1 VS = 3V VO, dm = 1.5V p-p CF = 0pF VO, dm CF = 0.5pF V-OUT V+OUT 5ns 1V Figure 36. Large Signal Transient Response, G = 1 CF = 0pF 5ns 01035-045 300mV 01035-042 V+DIN Figure 39. Large Signal Transient Response, G = 1 VS = 5V, +5V, +3V VS = 5V VO, dm = 2V p-p 5ns 40mV 5ns Figure 40. Small Signal Transient Response, G = 2 Figure 37. Large Signal Transient Response, G = 1 Rev. D | Page 15 of 32 01035-046 400mV 01035-043 CF = 0.5pF AD8132 VS = 5V G = +1 VO, dm = 2V p-p RL, dm = 499 5ns 2mV 0 5 Figure 41. Large Signal Transient Response, G = 2 01035-050 300mV 01035-047 0.1%/DIV VS = 3V 5ns 10 15 20 25 5ns/DIV 30 35 40 Figure 44. 0.1% Settling Time CL = 0pF VS = +5V, 5V CL = 5pF 5ns 5ns 400mV 01035-052 400mV 01035-048 CL = 20pF Figure 45. Large Signal Transient Response for Various Capacitor Loads (See Figure 60) Figure 42. Large Signal Transient Response, G = 2 0 VS = 5V -10 -20 V-OUT -30 PSRR (dB) VO, dm V+OUT VO, dm -PSRR VS +PSRR (VS = 5V, +5V) -PSRR (VS = 5V) +PSRR -40 -50 -60 V+DIN 01035-053 5ns 01035-049 1V -70 -80 -90 0.1 Figure 43. Large Signal Transient Response, G = 2 1 10 FREQUENCY (MHz) Figure 46. PSRR vs. Frequency Rev. D | Page 16 of 32 100 1k AD8132 -20 -10 VS = 5V VIN, cm = 2V p-p -30 VOCM = 600mV p-p VO, dm VOCM -20 -30 CMRR (dB) VOCM CMRR (dB) VO, cm -40 VIN, cm -50 -60 VOCM = 2V p-p -40 -50 -60 VO, dm 10 100 FREQUENCY (MHz) 01035-058 -80 -80 1000 1 Figure 47. CMRR vs. Frequency (See Figure 61) 3 1k VS = 5V VOCM VOCM = 600mV p-p VOCM = 2V p-p -3 -6 -9 01035-056 -12 -15 1 10 100 FREQUENCY (MHz) 100 8nV/ Hz 10 1 1000 10 Figure 48. VOCM Gain Response 100 1k 10k 100k FREQUENCY (Hz) 1M 10M 100M Figure 51. Input Voltage Noise vs. Frequency 1k INPUT CURRENT NOISE (pA/ Hz) VS = 5V VOCM = -1V TO +1V VO, cm 400mV 5ns 100 10 1.8pA/ Hz 01035-057 VOCM GAIN (dB) 0 01035-059 VO,cm 1000 Figure 50. VOCM CMRR vs. Frequency INPUT VOLTAGE NOISE (nV/ Hz) 6 10 100 FREQUENCY (MHz) 01035-060 1 -70 01035-055 VIN, cm -70 1 10 Figure 49. VOCM Transient Response 100 1k 10k 100k FREQUENCY (Hz) 1M 10M Figure 52. Input Current Noise vs. Frequency Rev. D | Page 17 of 32 100M AD8132 0 VIN, sm (1V/DIV) 01035-061 VS = 5V VIN = 2.5V STEP G = +2 RF = 1k RL, dm = 200 5ns VS = 5V 11 VS = +5V 9 7 01035-062 SUPPLY CURRENT (mA) 13 5 -10 10 30 TEMPERATURE (C) 50 VS = 5V -1.5 -2.0 -20 0 20 40 60 TEMPERATURE (C) 80 Figure 55. Differential Offset Voltage vs. Temperature 15 -30 -1.0 -2.5 -40 Figure 53. Overdrive Recovery -50 VS = +5V -0.5 01035-063 DIFFERENTIAL OUTPUT OFFSET (mV) VO, dm (0.5V/DIV) 70 90 Figure 54. Quiescent Current vs. Temperature Rev. D | Page 18 of 32 100 AD8132 TEST CIRCUITS RF CF RG 348 49.9 348 RL 0.1F RL 24.9 0.1F 499 24.9 RG 01035-021 49.9 RF 348 01035-005 348 G = +1: RF = RG = 348, RL = 249 (RL, dm = 498) G = +2: RF = 1000, RG = 499, RL = 100 (RL, dm = 200) CF Figure 59. Test Circuit for Output Balance Figure 56. Basic Test Circuit, G = 1 348 1000 348 499 49.9 0.1F 499 1000 348 24.9 24.9 Figure 60. Test Circuit for Capacitor Load Drive RF 348 348 499 0.1F 249 VO, dm 200 49.9 348 499 01035-019 24.9 453 348 Figure 57. Basic Test Circuit, G = 2 49.9 CL 01035-051 200 RF VO, cm 249 348 NOTE: RESISTORS MATCHED TO 0.01%. Figure 58. Test Circuit for Various Gains Figure 61. CMRR Test Circuit 348 49.9 24.9 HPF ZIN = 50 0.1F 348 300 01035-023 LPF 2:1 TRANSFORMER 300 348 348 Figure 62. Harmonic Distortion Test Circuit, G = 1, RL, dm = 800 1000 2:1 TRANSFORMER 499 49.9 24.9 HPF ZIN = 50 0.1F 499 300 1000 Figure 63. Harmonic Distortion Test Circuit, G = 2, RL, dm = 800 Rev. D | Page 19 of 32 01035-032 LPF 300 01035-054 24.9 0.1F 01035-014 49.9 24.9 AD8132 OPERATIONAL DESCRIPTION DEFINITION OF TERMS Differential Voltage The difference between two node voltages. For example, the output differential voltage (or equivalently output differentialmode voltage) is defined as VOUT, dm = (V+OUT - V-OUT) where V+OUT and V-OUT refer to the voltages at the +OUT and -OUT terminals with respect to a common reference. Common-Mode Voltage The average of two node voltages. The output common-mode voltage is defined as CF RF RL, dm AD8132 VOCM -DIN -OUT +IN RG -IN RF VOUT, dm RF/RG 0 0 VOUT, cm 0 (By Design) 0 (By Design) 1 (By Design) The differential output (VOUT, dm) is equal to the differential input voltage (VIN, dm) times RF/RG. In this case, it does not matter if both differential inputs are driven, or only one output is driven and the other is tied to a reference voltage, such as ground. As is seen from the two zero entries in the first column, neither of the common-mode inputs has any effect on this gain. The gain from VIN, cm to VOUT, dm directly depends on the matching of the feedback networks. The analogous term for this transfer function, which is used in conventional op amps, is common-mode rejection ratio (CMRR). Therefore, if it has a high CMRR, the feedback ratios must be well matched. VO, dm +OUT CF 01035-064 RG Input VIN, dm VIN, cm VOCM The gain from VIN, dm to VOUT, cm is 0, and first-order does not depend on the ratio matching of the feedback networks. The common-mode feedback loop within the AD8132 provides a corrective action to keep this gain term minimized. The term balance error describes the degree to which this gain term differs from 0. VOUT, cm = (V+OUT - V-OUT)/2 +DIN Table 9. Differential- and Common-Mode Gains Figure 64. Circuit Definitions BASIC CIRCUIT OPERATION One of the more useful and easy to understand ways to use the AD8132 is to provide two equal-ratio feedback networks. To match the effect of parasitics, these networks should actually be comprised of two equal-value feedback resistors, RF, and two equal-value gain resistors, RG. This circuit is shown in Figure 64. Like a conventional op amp, the AD8132 has two differential inputs that can be driven with both a differential-mode input voltage, VIN, dm, and a common-mode input voltage, VIN, cm. There is another input, VOCM, that is not present on conventional op amps but provides another input to consider on the AD8132. It is totally separate from the above inputs. There are two complementary outputs whose response can be defined by a differential-mode output, VOUT, dm, and a commonmode output, VOUT, cm. Table 9 indicates the gain from any type of input to either type of output. The gain from VIN, cm to VOUT, cm is also ideally 0 and is first-order independent of the feedback ratio matching. As in the case of VIN, dm to VOUT, cm, the common-mode feedback loop keeps this term minimized. The gain from VOCM to VOUT, dm is ideally 0 when the feedback ratios are matched only. The amount of differential output signal that is created by varying VOCM is related to the degree of mismatch in the feedback networks. VOCM controls the output common-mode voltage VOUT, cm with a unity-gain transfer function. With equal-ratio feedback networks (as assumed above), its effect on each output is the same, which is another way of saying that the gain from VOCM to VOUT, dm is 0. If not driven, the output common-mode is at midsupply. It is recommended that a 0.1 F bypass capacitor be connected to VOCM. When unequal feedback ratios are used, the two gains associated with VOUT, dm become nonzero. This significantly complicates the mathematical analysis along with any intuitive understanding of how the part operates. Rev. D | Page 20 of 32 AD8132 THEORY OF OPERATION The AD8132 differs from conventional op amps by the external presence of an additional input and output. The additional input, VOCM, controls the output common-mode voltage. The additional output is the analog complement of the single output of a conventional op amp. For its operation, the AD8132 uses two feedback loops as compared to the single loop of conventional op amps. While this provides significant freedom to create various novel circuits, basic op amp theory can still be used to analyze the operation. One of the feedback loops controls the output common-mode voltage, VOUT, cm. Its input is VOCM (Pin 2) and the output is the common-mode, or average voltage, of the two differential outputs (+OUT and -OUT). The gain of this circuit is internally set to unity. When the AD8132 is operating in its linear region, this establishes one of the operational constraints: VOUT, cm = VOCM. The second feedback loop controls the differential operation. Similar to an op amp, the gain and gain-shaping of the transfer function can be controlled by adding passive feedback networks. However, only one feedback network is required to close the loop and fully constrain the operation, but depending on the function desired, two feedback networks can be used. This is possible as a result of having two outputs that are each inverted with respect to the differential inputs. GENERAL USAGE OF THE AD8132 Several assumptions are made here for a first-order analysis; they are the typical assumptions used for the analysis of op amps: * The input bias currents are sufficiently small so they can be neglected. * The output impedances are arbitrarily low. * The open-loop gain is arbitrarily large, which drives the amplifier to a state where the input differential voltage is effectively 0. * Offset voltages are assumed to be 0. While it is possible to operate the AD8132 with a purely differential input, many of its applications call for a circuit that has a single-ended input with a differential output. For a single-ended-to-differential circuit, the RG of the undriven input is tied to a reference voltage. This is ground and other conditions are discussed later. Also, the voltage at VOCM, and therefore VOUT, cm, is assumed to be ground for now. Figure 65 shows a generalized schematic of such a circuit using an AD8132 with two feedback paths. For each feedback network, a feedback factor can be defined as the fraction of the output signal that is fed back to the opposite sign input. These terms are: 1 = RG1 (RG1 + RF1 ) 2 = RG2 (RG2 + RF2 ) The feedback factor 1 is for the side that is driven, while the feedback factor 2 is for the side that is tied to a reference voltage (ground for now). Note also that each feedback factor can vary anywhere between 0 and 1. A single-ended-to-differential gain equation can be derived, which is true for all values of 1 and 2. G = 2 x (1 - 1) (1 + 2 ) This expression is not very intuitive, but some further examples can provide better understanding of its implications. One observation that can be made right away is that a tolerance error in 1 does not have the same effect on gain as the same tolerance error in 2. RESISTORLESS DIFFERENTIAL AMPLIFIER (HIGH INPUT IMPEDANCE INVERTING AMPLIFIER) The simplest closed-loop circuit that can be made does not require any resistors and is shown in Figure 68. In this circuit, 1 is equal to 0, and 2 is equal to 1. The gain is equal to 2. A more intuitive means to figure the gain is by simple inspection. +OUT is connected to -IN, whose voltage is equal to the voltage at +IN under equilibrium conditions. Thus, +VOUT is equal to VIN, and there is unity gain in this path. Because -OUT has to swing in the opposite direction from +OUT due to the common-mode constraint, its effect doubles the output signal and produces a gain of 2. One useful function that this circuit provides is a high input impedance inverter. If +OUT is ignored, there is a unity-gain, high input impedance amplifier formed from +IN to -OUT. Most traditional op amp inverters have relatively low input impedances, unless they are buffered with another amplifier. VOCM has been assumed to be at midsupply. Because there is still the constraint from the above discussion that +VOUT must equal VIN, changing the VOCM voltage does not change +VOUT (= VIN). Therefore, the effect of changing VOCM must show up at -OUT. For example, if VOCM is raised by 1 V, then -VOUT must go up by 2 V. This makes VOUT, cm also go up by 1 V, since it is defined as the average of the two differential output voltages. This means that the gain from VOCM to the differential output is 2. Rev. D | Page 21 of 32 AD8132 OTHER 2 = 1 CIRCUITS The preceding simple configuration with 2 = 1 and its gain of 2 is the highest gain circuit that can be made under this condition. Since 1 was equal to 0, only higher 1 values are possible. The circuits with higher values of 1 have gains lower than 2. However, circuits with 1 equal to 1 are not practical because they have no effective input and result in a gain of 0. To increase 1 from 0, it is necessary to add two resistors in a feedback network. A generalized circuit that has 1 with a value higher than 0 is shown in Figure 67. A couple of different convenient gains that can be created are a gain of 1, when 1 is equal to 1/3, and a gain of 0.5, when 1 equals 0.6. With 2 equal to 1 in these circuits, VOCM serves as the reference voltage from which to measure the input voltage and the individual output voltages. In general, when VOCM is varied in these circuits, a differential output signal generates in addition to VOUT, cm changing the same amount as the voltage change of VOCM. VARYING 2 While the circuit above sets 2 to 1, another class of simple circuits can be made that sets 2 equal to 0. This means that there is no feedback from +OUT to -IN. This class of circuits is very similar to a conventional inverting op amp. However, the AD8132 circuits have an additional output and common-mode input that can be analyzed separately (see Figure 69). With -IN connected to ground, +IN becomes a virtual ground in the sense that the term is used for conventional op amps. Both inputs must maintain the same voltage for equilibrium operation; therefore, if one is set to ground, the other is driven to ground. The input impedance can also be seen to be equal to RG, just as in a conventional op amp. In this case, however, the positive input and negative output are used for the feedback network. Because a conventional op amp does not have a negative output, only its inverting input can be used for the feedback network. The AD8132 is symmetrical, therefore, the feedback network on either side can be used to produce the same results. Because +IN is a summing junction, by analog-to-conventional op amps, the gain from VIN to -OUT is -RF/RG. This holds true regardless of the voltage on VOCM, and since +OUT moves the same amount in the opposite direction from -OUT, the overall gain is -2(RF/RG). VOCM still governs VOUT, cm, so +OUT must be the only output that moves when VOCM is varied. Because VOUT, cm is the average of the two outputs, +OUT must move twice as far and in the same direction as VOCM to create the proper VOUT, cm. Therefore, the gain from VOCM to +OUT must be 2. With 2 equal to 0 in these circuits, the gain can theoretically be set to any value from close to 0 to infinity, just as it can with a conventional op amp in the inverting mode. However, practical real-world limitations and parasitics limit the range of acceptable gain to more modest values. 1 = 0 There is yet another class of circuits where there is no feedback from -OUT to +IN. This is the case where 1 = 0. The resistorless differential amplifier described above meets this condition, but it was presented only with the condition that 2 = 1. Recall that this circuit had a gain equal to 2. If 2 decreases in this circuit from unity, a smaller part of +VOUT is fed back to -IN and the gain increases (see Figure 66). This circuit is very similar to a noninverting op amp configuration, except for the presence of the additional complementary output. Therefore, the overall gain is twice that of a noninverting op amp or 2 x (1 + RF2/RG2) or 2 x (1/2). Once again, varying VOCM does not affect both outputs in the same way; therefore, in addition to varying VOUT, cm with unity gain, there is also an effect on VOUT, dm by changing VOCM. ESTIMATING THE OUTPUT NOISE VOLTAGE Similar to the case of a conventional op amp, the differential output errors (noise and offset voltages) can be estimated by multiplying the input referred terms, at +IN and -IN, by the circuit noise gain. The noise gain is defined as R GN = 1 + F RG To compute the total output referred noise for the circuit of Figure 64, consideration must also be given to the contribution of the resistors RF and RG. Refer to Table 10 for estimated output noise voltage densities at various closed-loop gains. Table 10. Recommended Resistor Values and Noise Performance for Specific Gains Gain 1 2 5 10 Rev. D | Page 22 of 32 RG () 499 499 499 499 RF () 499 1.0 k 2.49 k 4.99 k Bandwidth -3 dB (MHz) 360 160 65 20 Output Noise AD8132 Only (nV/Hz) 16 24.1 48.4 88.9 Output Noise AD8132 + RG , RF (nV/Hz) 17 26.1 53.3 98.6 AD8132 When using the AD8132 in gain configurations where 1 2, differential output noise appears due to input-referred voltage noise in the VOCM circuitry according to the formula 1 - 2 VOND = 2 VNOCM 1 + 2 where VOND is the output differential noise, and VNOCM is the input-referred voltage noise on VOCM. The AD8132 is optimized for level-shifting ground referenced input signals. For a single-ended input this would imply, for example, that the voltage at -DIN in Figure 64 would be 0 V when the amplifier's negative power supply voltage (at V-) was also set to 0 V. SETTING THE OUTPUT COMMON-MODE VOLTAGE CALCULATING AN APPLICATION CIRCUIT'S INPUT IMPEDANCE The effective input impedance of a circuit, such as that in Figure 64, at +DIN and -DIN, depends on whether the amplifier is being driven by a single-ended or differential signal source. For balanced differential input signals, the input impedance (RIN, dm) between the inputs (+DIN and -DIN) is simply R IN,dm = 2 x RG In the case of a single-ended input signal (for example, if -DIN is grounded and the input signal is applied to +DIN), the input impedance becomes R IN,dm INPUT COMMON-MODE VOLTAGE RANGE IN SINGLE-SUPPLY APPLICATIONS R G = RF 1 - 2 x (R + R ) F G The circuit's input impedance is effectively higher than it would be for a conventional op amp connected as an inverter because a fraction of the differential output voltage appears at the inputs as a common-mode signal, partially bootstrapping the voltage across the input resistor, RG. The AD8132's VOCM pin is internally biased at a voltage approximately equal to the midsupply point (average value of the voltage on V+ and V-). Relying on this internal bias results in an output common-mode voltage that is within approximately 100 mV of the expected value. In cases where more accurate control of the output commonmode level is required, it is recommended that an external source or resistor divider (with RSOURCE < 10 k) be used. The output common-mode offset values in the Specifications section assume the VOCM input is driven by a low impedance voltage source. DRIVING A CAPACITIVE LOAD A purely capacitive load can react with the pin and bond-wire inductance of the AD8132, resulting in high frequency ringing in the pulse response. One way to minimize this effect is to place a small capacitor across each of the feedback resistors. The added capacitance should be small to avoid destabilizing the amplifier. An alternative technique is to place a small resistor in series with the amplifier's outputs, as shown in Figure 60. Rev. D | Page 23 of 32 AD8132 LAYOUT, GROUNDING, AND BYPASSING CIRCUITS RG1 + RG2 RF2 Figure 65. Typical Four-Resistor Feedback Circuit + VIN RG2 Figure 66. Typical Circuit with 1 = 0 RF1 RG1 01035-067 + Figure 67. Typical Circuit with 2 = 1 VIN + Figure 68. Resistorless G = 2 Circuit with 1 = 0 RF1 VIN RG1 + 01035-069 The signal routing should be short and direct in order to avoid parasitic effects. Wherever there are complementary signals, a symmetrical layout should be provided to the extent possible to maximize the balance performance. When running differential signals over a long distance, the traces on the PCB should be close together or any differential wiring should be twisted together to minimize the area of the loop that is formed. This reduces the radiated energy and makes the circuit less susceptible to interference. RF2 01035-068 The power supply pins should be bypassed as close as possible to the device to the nearby ground plane. Good high frequency ceramic chip capacitors should be used. This bypassing should be done with a capacitance value of 0.01 F to 0.1 F for each supply. Further away, low frequency bypassing should be provided with 10 F tantalum capacitors from each supply to ground. 01035-065 The first requirement is a good solid ground plane that covers as much of the board area around the AD8132 as possible. The only exception to this is that the two input pins (Pins 1 and 8) should be kept a few millimeters from the ground plane, and ground should be removed from inner layers and the opposite side of the board under the input pins. This minimizes the stray capacitance on these nodes and helps preserve the gain flatness vs. the frequency. RF1 01035-066 As a high speed part, the AD8132 is sensitive to the PCB environment in which it operates. Realizing its superior specifications requires attention to various details of good high speed PCB design. Figure 69. Typical Circuit with 2 = 0 Rev. D | Page 24 of 32 AD8132 APPLICATIONS 10 A/D DRIVER FUND fS = 40MHz fIN = 2.5MHz 0 Many of the newer high speed ADCs are single-supply and have differential inputs. Thus, the driver for these devices should be able to convert from a single-ended to a differential signal and provide output common-mode level-shifting in addition to having low distortion and noise. The AD8132 conveniently performs these functions when driving the AD9203, a 10-bit, 40 MSPS ADC. -10 -20 OUTPUT (dBc) -30 -70 2ND 01035-071 -120 0 2.5 The complementary electrical fields are mostly confined to the space between the two twisted conductors and does not significantly radiate out from the cable. The current in the cable creates magnetic fields that radiate to some degree. However, the amount of radiation is mitigated by the twists, because for each twist, the two adjacent twists have an opposite polarity magnetic field. If the twist pitch is tight enough, these small magnetic field loops contain most of the magnetic flux, and the magnetic far-field strength is negligible. 10F 0.1F 25 20pF 4 6 28 2 AVDD DRVDD AINN DIGITAL OUTPUTS AD9203 20pF 60.4 AINP 26 348 AVSS DRVSS 27 1 Figure 71. AD8132 Driving AD9203, a 10-Bit, 40 MSPS ADC Rev. D | Page 25 of 32 01035-070 + 5 1 20.0 When driving a twisted pair cable, it is desirable to drive only a pure differential signal onto the line. If the signal is purely differential (i.e., fully balanced), and the transmission line is twisted and balanced, there is a minimum radiation of any signal. AD8132 348 17.5 BALANCED CABLE DRIVER 3 49.9 0.1F 7.5 10.0 12.5 15.0 INPUT FREQUENCY (MHz) Figure 70. FTT Response for AD8132 Driving AD9203 60.4 2 5.0 0.1F 348 9TH 8TH 7TH -110 3V 0.1F 8 6TH 4TH -90 348 10k 5TH 3RD 3V 10k 24.9 -60 -100 Between the A/D and the driver is a 1-pole, differential filter that helps to filter some of the noise and assists the switchedcapacitor inputs of the A/D. Each of the A/D inputs is driven by a 0.5 V p-p signal that ranges from 1.25 V dc to 1.75 V dc. Figure 70 is an FFT plot of the performance of the circuit when running at a clock rate of 40 MSPS and an input frequency of 2.5 MHz. 1V p-p -50 -80 In Figure 71, a 1 V p-p signal drives the input of an AD8132 configured for unity gain. Both the AD8132 and the AD9203 are powered from a single 3 V supply. A voltage divider biases VOCM at midsupply, which in turn drives VOUT, cm to half of the supply voltage. This is within the common-mode range of the AD9203. 3V -40 AD8132 +5V 0.1F +5V + 10F 1k 499 50 SOURCE 49.9 49.9 100 49.9 523 + AD830 2 TWISTED PAIR 7 3 VOUT 4 1k 10F 10F 1 AD8132 0.1F + 0.1F 0.1F 5 -5V 0.1F + 01035-072 10F -5V Figure 72. Balanced Line Driver and Receiver Using AD8132 and AD830 20 Any imbalance in the differential drive signal appears as a common-mode signal on the cable. This is the equivalent of a single wire that is driven with the common-mode signal. In this case, the wire acts as an antenna and radiates. Thus, in order to minimize radiation when driving differential twisted pair cables, the differential drive signal should be very wellbalanced. 10 0 VOUT/VIN (dB) -10 The common-mode feedback loop in the AD8132 helps to minimize the amount of common-mode voltage at the output, and can therefore be used to create a well-balanced differential line driver. Figure 72 shows an application that uses an AD8132 as a balanced line driver and an AD830 as a differential receiver configured for unity gain. This circuit was operated with 10 m of Category 5 cable. -20 -30 -40 -50 01035-074 -60 -70 -80 10 100 FREQUENCY (MHz) 1 1000 Figure 74. Frequency Response for transmit Boost Circuit TRANSMIT EQUALIZER LOW-PASS DIFFERENTIAL FILTER Any length of transmission line attenuates the signals it carries. This effect is worse at higher frequencies than at low frequencies. One way to compensate for this is to provide an equalizer circuit that boosts the higher frequencies in the transmitter circuit, so that at the receive end of the cable, the attenuation effects are diminished. Similar to an op amp, various types of active filters can be created with the AD8132. These can have single-ended inputs and differential outputs, which can provide an antialias function when driving a differential ADC. 10pF 2.15k 2k VIN 499 49.9 100pF 100pF 33pF 200pF 249 249 100 VOUT 33pF Figure 75. 1 MHz, 3-Pole Differential Output, Low-Pass, Multiple Feedback Filter 01035-073 499 549 2.15k 49.9 24.9 10pF 200pF 49.9 2k 49.9 VOUT 953 24.9 VIN 549 953 Figure 73. Frequency Boost Circuit Rev. D | Page 26 of 32 01035-075 By lowering the impedance of the RG component of the feedback network at a higher frequency, the gain can be increased at a high frequency. Figure 73 shows the gain of a two line driver that has its RG resistors shunted by 10 pF capacitors. The effect of this is shown in the frequency response plot of Figure 74. Figure 75 is a schematic of a low-pass, multiple feedback filter. The active section contains two poles, and an additional pole is added at the output. The filter was designed to have a -3 dB frequency of 1 MHz. The actual -3 dB frequency was measured to be 1.12 MHz, as shown in Figure 76. AD8132 10 Another way to look at this is that the circuit performs what is sometimes called transformer action. One main difference is that the AD8132 passes dc while transformers do not. 0 -10 VOUT/VIN (dB) -20 -30 -40 -50 -60 01035-076 -70 -80 -90 10k 100k 1M FREQUENCY (Hz) 10M 100M A transformer can also be easily configured to have either a high or low common-mode output impedance. If the transformer's center tap is connected to a solid voltage reference, it sets the common-mode voltage on the secondary side of the transformer. In this case, if one of the differential outputs is grounded, the other output will have only half of the differential output signal. This keeps the common-mode voltage at ground, where it is required to be due to the center tap connection. This is analogous to the AD8132 operating with a low output impedance common-mode (see Figure 78). VOCM HIGH COMMON-MODE OUTPUT IMPEDANCE AMPLIFIER However, there are some applications that benefit from a high common-mode output impedance. This can be accomplished with the circuit shown in Figure 77. RF 348 RG 348 10 RG 348 1k 49.9 1k 49.9 10 01035-077 RF 348 Figure 77. High Common-Mode, Output Impedance, Differential Amplifier VOCM is driven by a resistor divider that measures the output common-mode voltage. Thus, the common-mode output voltage takes on the value that is set by the driven circuit. In this case, it comes from the center point of the termination at the receive end of a 10 m length of Category 5 twisted pair cable. If the receive end, common-mode voltage is set to ground, it is well-defined at the receive end. Any common-mode signal that is picked up over the cable length due to noise appears at the transmit end and must be absorbed by the transmitter. Thus, it is important that the transmitter have adequate common-mode output range to absorb the full amplitude of the common-mode signal coupled onto the cable and therefore prevent clipping. Figure 78. Transformer Whose Low Output Impedance Secondary Is Set at VOCM If the center tap of the secondary of a transformer is allowed to float as shown in Figure 79 (or if there is no center tap), the transformer will have a high common-mode output impedance. This means that the common mode of the secondary is determined by what it is connected to and not by anything to do with the transformer itself. If one of the differential ends of the transformer is grounded, the other end swings with the full output voltage. This means that the common-mode of the output voltage is one-half of the differential output voltage. However, this shows that the common-mode is not forced via a low impedance to a given voltage. The common-mode output voltage can be changed easily to any voltage through its other output terminals. The AD8132 can exhibit the same performance when one of the outputs in Figure 77 is grounded. The other output swings at the full differential output voltage. The common-mode signal is measured by the voltage divider across the outputs and input to VOCM. This then drives VOUT, cm to the same level. At higher frequencies, it is important to minimize the capacitance on the VOCM node or else phase shifts can compromise the performance. The voltage divider resistances can also be lowered for better frequency response. NC VDIFF 01035-079 Changing the connection to VOCM (Pin 2) can change the common-mode from low impedance to high impedance. If VOCM is actively set to a particular voltage, the AD8132 tries to force VOUT, cm to the same voltage with a relatively low output impedance. All the previous analysis assumed that this output impedance is arbitrarily low enough to drive the load condition in the circuit. VDIFF 01035-078 Figure 76. Frequency Response of 1 MHz Low-Pass Filter Figure 79. Transformer with High Output Impedance Secondary FULL-WAVE RECTIFIER The balanced outputs of the AD8132, along with a couple of Schottky diodes, can create a very high speed, full-wave rectifier. Such circuits are useful for measuring ac voltages and other computational tasks. Rev. D | Page 27 of 32 AD8132 +5V RF1 348 RT1 49.9 RT2 24.9 RG2 348 +5V 10k HP2835 RF2 348 -5V CR1 VOUT RL 100 01035-080 VIN RG1 348 Figure 80. Full-Wave Rectifier The diodes should be operated such that they are slightly forward-biased when the differential output voltage is 0. For the Schottky diodes, this is approximately 400 mV. The forward biasing can be conveniently adjusted by CR1, which, in this circuit, raises and lowers VOUT, cm without creating a differential output voltage. If there is not enough forward-bias (VOUT, cm too low), the lower sharp cusps of the full-wave rectified output waveform will be rounded off. Also, as the frequency increases, there tends to be some rounding of the lower cusps. The forward bias can be increased to yield sharper cusps at higher frequencies. There is not a reliable, entirely quantifiable means to measure the performance of a full-wave rectifier. Since the ideal waveform has periodic sharp discontinuities, it should have (mostly even) harmonics that have no upper bound on the frequency. However, for a practical circuit, as the frequency increases, the higher harmonics become attenuated and the sharp cusps that are present at low frequencies become significantly rounded. The circuit was run at a frequency up to 300 MHz and, while it was still functional, the major harmonic that remained in the output was the second. This made it look like a sine wave at 600 MHz. Figure 81 is an oscilloscope plot of the output when driven by a 100 MHz, 2.5 V p-p input. Sometimes a second harmonic generator is actually useful for creating a clock to oversample a DAC by a factor of two. If the output of this circuit is run through a low-pass filter, it can be used as a second harmonic generator. One advantage of this circuit is that the feedback loop is never momentarily opened while the diodes reverse their polarity within the loop. This is the scheme that is sometimes used for full-wave rectifiers that use conventional op amps. These conventional circuits do not work well at frequencies above approximately 1 MHz. 1V 100mV 2ns 01035-081 Figure 80 shows the configuration of such a circuit. Each of the AD8132 outputs drives the anode of an HP2835 Schottky diode. These Schottky diodes were chosen for their high speed operation. At lower frequencies (approximately lower than 10 MHz), a silicon signal diode, such as a 1N4148, can be used. The cathodes of the two diodes are connected together, and this output node is connected to ground by a 100 resistor. Figure 81. Full-Wave Rectifier Response with 100 MHz Input Rev. D | Page 28 of 32 AD8132 OUTLINE DIMENSIONS 5.00 (0.1968) 4.80 (0.1890) 8 5 4.00 (0.1574) 3.80 (0.1497) 1 4 1.27 (0.0500) BSC 0.25 (0.0098) 0.10 (0.0040) 3.00 BSC 8 6.20 (0.2440) 5.80 (0.2284) 3.00 BSC 1.75 (0.0688) 1.35 (0.0532) 0.51 (0.0201) COPLANARITY SEATING 0.31 (0.0122) 0.10 PLANE 0.50 (0.0196) x 45 0.25 (0.0099) 8 0.25 (0.0098) 0 1.27 (0.0500) 0.40 (0.0157) 0.17 (0.0067) 1 Figure 82. 8-Lead Standard Small Outline Package [SOIC] Narrow Body (R-8) Dimensions shown in millimeters and (inches) 4.90 BSC 4 PIN 1 0.65 BSC 1.10 MAX 0.15 0.00 COMPLIANT TO JEDEC STANDARDS MS-012AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN 5 0.38 0.22 COPLANARITY 0.10 0.23 0.08 0.80 0.60 0.40 8 0 SEATING PLANE COMPLIANT TO JEDEC STANDARDS MO-187AA Figure 83. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters ORDERING GUIDE Model AD8132AR AD8132AR-REEL AD8132AR-REEL7 AD8132ARZ1 AD8132ARZ-REEL1 AD8132ARZ-REEL71 AD8132ARM AD8132ARM-REEL AD8132ARM-REEL7 AD8132ARMZ1 AD8132ARMZ-REEL1 AD8132ARMZ-REEL71 1 Temperature Range -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C Package Description 8-Lead SOIC 8-Lead SOIC, 13" Tape and Reel of 2,500 8-Lead SOIC, 7" Tape and Reel of 1,000 8-Lead SOIC 8-Lead SOIC, 13" Tape and Reel of 2,500 8-Lead SOIC, 7" Tape and Reel of 1,000 8-Lead MSOP 8-Lead MSOP, 13" Tape and Reel of 3,000 8-Lead MSOP, 7" Tape and Reel of 1,000 8-Lead MSOP 8-Lead MSOP, 13" Tape and Reel of 3,000 8-Lead MSOP, 7" Tape and Reel of 1,000 Z = Pb-free part Rev. D | Page 29 of 32 Package Option R-8 R-8 R-8 R-8 R-8 R-8 RM-8 RM-8 RM-8 RM-8 RM-8 RM-8 Branding HMA HMA HMA HMA HMA HMA AD8132 NOTES Rev. D | Page 30 of 32 AD8132 NOTES Rev. D | Page 31 of 32 AD8132 NOTES (c) 2004 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C01035-0-12/04(D) Rev. D | Page 32 of 32