BQ2004HSNTR - Texas Instruments High-Performance Analog

Features

➤Fast charge and conditioning of

nickel cadmium or nickel-metal

hydride batteries

➤Hysteretic PWM switch-mode

current regulation or gated con-

trol of an external regulator

➤Easily integrated into systems or

used as a stand-alone charger

➤Pre-charge qualification of tem-

perature and voltage

➤Configurable, direct LED outputs

display battery and charge status

➤Fast-charge termination by ∆tem-

perature/∆time, peak volume de-

tection, -∆V, maximum voltage,

maximum temperature, and maxi-

mum time

➤Optional top-off charge and

pulsed current maintenance

charging

➤Logic-level controlled low-power

mode (< 5µA standby current)

General Description

The bq2004E and bq2004H Fast

Charge ICs provide comprehensive

fast charge control functions together

with high-speed switching power con-

trol circuitry on a monolithic CMOS

device.

Integration of closed-loop current

control circuitry allows the bq2004

to be the basis of a cost-effective so-

lution for stand-alone and system-

integrated chargers for batteries of

one or more cells.

Switch-activated discharge-before-

charge allows bq2004E/H-based charg-

ers to support battery conditioning

and capacity determination.

High-efficiency power conversion is

accomplished using the bq2004E/H as

a hysteretic PWM controller for

switch-mode regulation of the charg-

ing current. The bq2004E/H may al-

ternatively be used to gate an exter-

nally regulated charging current.

Fast charge may begin on application

of the charging supply, replacement

of the battery, or switch depression.

For safety, fast charge is inhibited

unless/until the battery tempera-

ture and voltage are within config-

ured limits.

Temperature, voltage, and time are

monitored throughout fast charge.

Fast charge is terminated by any of

the following:

nRate of temperature rise

(∆T/∆t)

nPeak voltage detection (PVD)

nNegative delta voltage (-∆V)

nMaximum voltage

nMaximum temperature

nMaximum time

After fast charge, optional top-off

and pulsed current maintenance

phases with appropriate display

mode selections are available.

The bq2004H differs from the

bq2004E only in that fast charge,

hold-off, and top-off time units have

been scaled up by a factor of two,

and the bq2004H provides different

display selections. Timing differ-

ences between the two ICs are illus-

trated in Table 1. Display differ-

ences are shown in Table 2.

Fast-Charge ICs

bq2004E/H

DCMD Discharge command

DSEL Display select

VSEL Voltage termination

select

TM1Timer mode select 1

TM2Timer mode select 2

TCO Temperature cutoff

TS Temperature sense

BAT Battery voltage

PN2004E01.eps

16-Pin Narrow DIP

or Narrow SOIC

INH

DIS

MOD

VCC

VSS

LED2

LED1

SNS

DCMD

DSEL

VSEL

TM1

TM2

TCO

BAT

SNS Sense resistor input

LED1Charge status output 1

LED2Charge status output 2

VSS System ground

VCC 5.0V ±10% power

MOD Charge current control

DIS Discharge control

output

INH Charge inhibit input

Pin Connections

SLUS081A - APRIL 2005

Pin Names

Pin Descriptions

DCMD Discharge-before-charge control input

The DCMD input controls the conditions

that enable discharge-before-charge. DCMD

is pulled up internally. A negative-going

pulse on DCMD initiates a discharge to end-

of-discharge voltage (EDV) on the BAT pin,

followed by a new charge cycle start. Tying

DCMD to ground enables automatic

discharge-before-charge on every new charge

cycle start.

DSEL Display select input

This three-state input configures the charge

status display mode of the LED1and LED2out-

puts and can be used to disable top-off and

pulsed-trickle. See Table 2.

VSEL Voltage termination select input

This three-state input controls the voltage-

termination technique used by the

bq2004E/H. When high, PVD is active.

When floating, -∆V is used. When pulled low,

both PVD and -∆V are disabled.

TM1–

TM2

Timer mode inputs

TM1and TM2are three-state inputs that

configure the fast charge safety timer, voltage

termination hold-off time, “top-off”, and

trickle charge control. See Table 1.

TCO Temperature cut-off threshold input

Input to set maximum allowable battery

temperature. If the potential between TS

and SNS is less than the voltage at the TCO

input, then fast charge or top-off charge is ter-

minated.

TS Temperature sense input

Input, referenced to SNS, for an external

thermister monitoring battery temperature.

BAT Battery voltage input

BAT is the battery voltage sense input, refer-

enced to SNS. This is created by a high-

impedance resistor-divider network con-

nected between the positive and the negative

terminals of the battery.

SNS Charging current sense input

SNS controls the switching of MOD based on

an external sense resistor in the current

path of the battery. SNS is the reference po-

tential for both the TS and BAT pins. If

SNS is connected to VSS, then MOD switches

high at the beginning of charge and low at

the end of charge.

LED1–

LED2

Charge status outputs

Push-pull outputs indicating charging

status. See Table 2.

Vss Ground

VCC VCC supply input

5.0V,±10% power input.

MOD Charge current control output

MOD is a push-pull output that is used to

control the charging current to the battery.

MOD switches high to enable charging cur-

rent to flow and low to inhibit charging

current flow.

DIS Discharge control output

Push-pull output used to control an external

transistor to discharge the battery before

charging.

INH Charge inhibit input

When low, the bq2004E/H suspends all

charge actions, drives all outputs to high im-

pedance, and assumes a low-power opera-

tional state. When transitioning from low to

high, a new charge cycle is started.

bq2004E/H

Functional Description

Figure 2 shows a block diagram and Figure 3 shows a

state diagram of the bq2004E/H.

Battery Voltage and Temperature

Measurements

Battery voltage and temperature are monitored for

maximum allowable values. The voltage presented on

the battery sense input, BAT, should represent a

two-cell potential for the battery under charge. A

resistor-divider ratio of:

RB1

RB2 =N

2- 1

is recommended to maintain the battery voltage within

the valid range, where N is the number of cells, RB1 is

the resistor connected to the positive battery terminal,

and RB2 is the resistor connected to the negative bat-

tery terminal. See Figure 1.

Note: This resistor-divider network input impedance to

end-to-end should be at least 200kΩand less than 1MΩ.

A ground-referenced negative temperature coefficient ther-

mistor placed in proximity to the battery may be used as a

low-cost temperature-to-voltage transducer. The tempera-

ture sense voltage input at TS is developed using a

resistor-thermistor network between VCC and VSS. See

Figure 1. Both the BAT and TS inputs are referenced to

SNS, so the signals used inside the IC are:

VBAT -V

SNS =V

CELL

and

VTS -V

SNS =V

TEMP

Discharge-Before-Charge

The DCMD input is used to command discharge-before-

charge via the DIS output. Once activated, DIS becomes

active (high) until VCELL falls below VEDV, at which time

DIS goes low and a new fast charge cycle begins.

The DCMD input is internally pulled up to VCC (its inac-

tive state). Leaving the input unconnected, therefore,

results in disabling discharge-before-charge. A negative

going pulse on DCMD initiates discharge-before-charge

at any time regardless of the current state of the

bq2004. If DCMD is tied to VSS, discharge-before-charge

will be the first step in all newly started charge cycles.

Starting A Charge Cycle

A new charge cycle is started by:

1. Application of VCC power.

2. VCELL falling through the maximum cell voltage,

VMCVwhere:

VMCV = 0.8 ∗VCC ±30mV

3. A transition on the INH input from low to high.

If DCMD is tied low, a discharge-before-charge will be

executed as the first step of the new charge cycle. Oth-

erwise, pre-charge qualification testing will be the first

step.

The battery must be within the configured temperature

and voltage limits before fast charging begins.

The valid battery voltage range is VEDV <V

BAT <V

MCV

where:

VEDV = 0.4 ∗VCC ±30mV

bq2004E/H

Fg2004a.eps

bq2004E/H

VCC

PACK +

PACK -

SNS

RT1

RT2

RB2

RB1

bq2004E/H

Negative Temperature

Coefficient Thermister

PACK+

PACK-

BAT

SNS

Figure 1. Voltage and Temperature Monitoring

The valid temperature range is VHTF <V

TEMP <V

LTF,

where:

VLTF = 0.4 ∗VCC ±30mV

VHTF = [(1/3 ∗VLTF) + (2/3 ∗VTCO)] ±30mV

VTCO is the voltage presented at the TCO input pin, and is

configured by the user with a resistor divider between VCC

and ground. The allowed range is 0.2 to 0.4 ∗VCC.

If the temperature of the battery is out of range, or the

voltage is too low, the chip enters the charge pending

state and waits for both conditions to fall within their al-

lowed limits. During the charge-pending mode, the IC

first applies a top-off charge to the battery.

The top-off charge, at the rate of 18 of the fast charge,

continues until the fast-charge conditions are met or the

top-off time-out period is exceeded. The IC then trickle

charges until the fast-charge conditions are met. There

is no time limit on the charge pending state; the charger

remains in this state as long as the voltage or tempera-

ture conditons are outside of the allowed limits. If the

voltage is too high, the chip goes to the battery absent

state and waits until a new charge cycle is started.

Fast charge continues until termination by one or more

of the six possible termination conditions:

nDelta temperature/delta time (∆T/∆t)

nPeak voltage detection (PVD)

nNegative delta voltage (-∆V)

nMaximum voltage

nMaximum temperature

nMaximum time

PVD and -∆V Termination

The bq2004E/H samples the voltage at the BAT pin once

every 34s. When -∆V termination is selected, if VCELL is

lower than any previously measured value by 12mV

±4mV (6mV/cell), fast charge is terminated. When PVD

termination is selected, if VCELL is lower than any previ-

ously measured value by 6mV ±2mV (3mV/cell), fast

charge is terminated. The PVD and -∆V tests are valid

in the range 0.4 ∗VCC <V

CELL < 0.8 ∗VCC.

bq2004E/H

BD200401.eps

Timing

Control

OSC

Display

Control

Charge Control

State Machine

Discharge

Control

MOD

Control

TCO

Check

LTF

Check

A/D

EDV

Check

MCV

Check

DIS MOD INH VCC VSS

BAT

SNS

TCOTM2TM1

LED1

DCMD

DVEN

VTS - VSNS

VBAT - VSNS

LED2

DSEL

PWR

Control

Figure 2. Block Diagram

VSEL Input Voltage Termination

Low Disabled

Float -∆V

High PVD

Voltage Sampling

Each sample is an average of voltage measurements.

The IC takes 32 measurements in PVD mode and 16

measurements in -∆V mode. The resulting sample peri-

ods (9.17ms and 18.18ms, respectively) filter out har-

monics centered around 55Hz and 109Hz. This tech-

nique minimizes the effect of any AC line ripple that

may feed through the power supply from either 50Hz or

60Hz AC sources. Tolerance on all timing is ±16%.

Temperature and Voltage Termination

Hold-off

A hold-off period occurs at the start of fast charging.

During the hold-off period, -∆V and ∆T/∆t termination

are disabled. The MOD pin is enabled at a duty cycle of

260µs active for every 1820µs inactive. This modulation

results in an average rate 1/8th that of the fast charge

rate. This avoids premature termination on the voltage

spikes sometimes produced by older batteries when

fast-charge current is first applied. Maximum voltage

and maximum temperature terminations are not af-

fected by the hold-off period.

∆T/∆t Termination

The bq2004E/H samples at the voltage at the TS pin

every 34s, and compares it to the value measured two

samples earlier. If VTEMP has fallen 16mV ±4mV or

more, fast charge is terminated. The ∆T/∆t termination

test is valid only when VTCO <V

TEMP <V

LTF.

Temperature Sampling

Each sample is an average of 16 voltage measurements.

The resulting sample period (18.18ms) filters out har-

monics around 55Hz. This technique minimizes the ef-

fect of any AC line ripple that may feed through the

power supply from either 50Hz or 60Hz AC sources. Tol-

erance on all timing is ±16%.

Maximum Voltage, Temperature, and Time

Anytime VCELL rises above VMCV, the LEDs go off and cur-

rent flow into the battery ceases immediately. If VCELL

then falls back below VMCV before tMCV = 1.5s ±0.5s, the

chip transitions to the Charge Complete state (maximum

voltage termination). If VCELL remains above VMCV at the

expiration of tMCV, the bq2004E/H transitions to the Bat-

tery Absent state (battery removal). See Figure 3.

Maximum temperature termination occurs anytime

VTEMP falls below the temperature cutoff threshold

VTCO. Charge will also be terminated if VTEMP rises

above the low temperature fault threshold, VLTF, after

fast charge begins.

Corresponding

Fast-Charge

Rate

TM1 TM2

Typical

Fast-Charge

Safety

Time (min)

Typical

PVD, -∆V

Hold-Off

Time (s)

Top-Off

Rate Pulse-

Trickle

Rate

Pulse-

Trickle

Period (Hz)

2004E 2004H 2004E 2004H 2004E 2004H 2004E 2004H 2004E 2004H

C/4 C/8 Low Low 325 650 137 273 Disabled Disabled Disabled

C/2 C/4 Float Low 154 325 546 546 Disabled C/512 15 30

1C C/2 High Low 77 154 273 546 Disabled C/512 7.5 15

2C 1C Low Float 39 77 137 273 Disabled C/512 3.75 7.5

4C 2C Float Float 19 39 68 137 Disabled C/512 1.88 3.75

C/2 C/4 High Float 154 325 546 546 C/16 C/32 C/512 15 30

1C C/2 Low High 77 154 273 546 C/8 C/16 C/512 7.5 15

2C 1C Float High 39 77 137 273 C/4 C/18 C/512 3.75 7.5

4C 2C High High 19 39 68 137 C/2 C/4 C/512 1.88 3.75

Note: Typical conditions = 25°C, VCC = 5.0V.

Table 1. Fast Charge Safety Time/Hold-Off/Top-Off Table

bq2004E/H

Mode 1

bq2004E Charge Action State LED1LED2

DSEL = VSS

Battery absent Low Low

Fast charge pending or a discharge-before-charge in progress High High

Fast charging Low High

Fast charge complete, top-off, and/or trickle High Low

Mode 1

bq2004H Charge Action State LED1LED2

DSEL = VSS

Battery absent Low Low

Discharge-before-charge in progress High High

Fast charge pending Low 18second high

18second low

Fast charging Low High

Fast charge complete, top-off, and/or trickle High Low

Mode 2

bq2004E Charge Action State (See note) LED1LED2

DSEL = Floating

Battery absent Low Low

Fast charge pending or discharge-before-charge in progress High High

Fast charging Low High

Fast charge complete, top-off, and/or trickle High Low

Mode 2

bq2004H Charge Action State (See note) LED1LED2

DSEL = Floating

Battery absent Low Low

Discharge-before-charge in progress High High

Fast charge pending Low 18second high

18second low

Fast charging Low High

Fast charge complete, top-off, and/or trickle High Low

Mode 3

bq2004E/H Charge Action State LED1LED2

DSEL = VCC

Battery absent Low Low

Fast charge pending or discharge-before-charge in progress Low 18second high

18second low

Fast charging Low High

Fast charge complete, top-off, and/or trickle High Low

Note: Pulse trickle is inhibited in Mode 2.

Table 2. bq2004E/H LED Output Summary

Maximum charge time is configured using the TM pin.

Time settings are available for corresponding charge

rates of C/4, C/2, 1C, and 2C. Maximum time-out termi-

nation is enforced on the fast-charge phase, then reset,

and enforced again on the top-off phase, if selected.

There is no time limit on the trickle-charge phase.

Top-off Charge

An optional top-off charge phase may be selected to

follow fast charge termination for the C/2 through 4C

rates. This phase may be necessary on NiMH or other

battery chemistries that have a tendency to terminate

charge prior to reaching full capacity. With top-off en-

abled, charging continues at a reduced rate after

fast-charge termination for a period of time equal to

0.235∗the fast-charge safety time (See Table 1.) Dur-

ing top-off, the MOD pin is enabled at a duty cycle of

260µs active for every 1820µs inactive. This modula-

tion results in an average rate 1/8th that of the fast

charge rate. Maximum voltage, time, and temperature

are the only termination methods enabled during top-

off.

Pulse-Trickle Charge

Pulse-trickle charging may be configured to follow the

fast charge and optional top-off charge phases to com-

pensate for self-discharge of the battery while it is idle

in the charger.

In the pulse-trickle mode, MOD is active for 260µsofa

period specified by the settings of TM1 and TM2. See

Table 1. The resulting trickle-charge rate is C/512.

Both pulse trickle and top-off may be disabled by tying

TM1 and TM2 to VSS or by selecting Mode 2 in the dis-

play.

Charge Status Indication

Charge status is indicated by the LED1and LED2out-

puts. The state of these outputs in the various charge cy-

cle phases is given in Table 2 and illustrated in Figure 3.

In all cases, if VCELL exceeds the voltage at the MCV

pin, both LED1and LED2outputs are held low regard-

less of other conditions. Both can be used to directly

drive an LED.

Charge Current Control

The bq2004E/H controls charge current through the MOD

output pin. The current control circuitry is designed to sup-

port implementation of a constant-current switching regulator

or to gate an externally regulated current source.

When used in switch mode configuration, the nominal

regulated current is:

IREG = 0.225V/RSNS

Charge current is monitored at the SNS input by the

voltage drop across a sense resistor, RSNS, between the

low side of the battery pack and ground. RSNS is sized to

provide the desired fast charge current.

If the voltage at the SNS pin is less than VSNSLO, the

MOD output is switched high to pass charge current to

the battery.

When the SNS voltage is greater than VSNSHI, the MOD

output is switched low—shutting off charging current to

the battery.

VSNSLO = 0.04 ∗VCC ±25mV

VSNSHI = 0.05 ∗VCC ±25mV

When used to gate an externally regulated current

source, the SNS pin is connected to VSS, and no sense re-

sisitor is required.

bq2004E/H

Charge

Pending

DCMD Tied to Ground?

Falling Edge

on DCMD

Discharge-

Before-Charge

Top-Off and

Pulse-Trickle

Charge

Pulse

Trickle

Charge

Pulse

Trickle

Charge

Pulse

Trickle

Charge

Top-Off

Charge

Fast

Charge

Battery Voltage?

Battery Temperature?

Top-Off

Selected?

New Charge Cycle Started by

Any One of:

VCC Rising to Valid Level

Battery Replacement

(VCELL Falling through VMCV)

Inhibit (INH) Released

VEDV < VCELL < VMCV

and

VHTF < VTEMP < VLTF

VEDV < VCELL < VMCV

VTEMP > VLTF or

VTEMP < VHTF

VCELL

< VEDV

VCELL

< VEDV

Yes

t > t

MCV

> VMCV

VCELL > VMCV

VCELL

VCELL VMCV

VCELL

VMCV

VCELL

VMCV

VCELL

VMCV

Charge

Complete

Battery

Absent

or 0.235 Maximum

Time Out

VTEMP < VTCO

SD2004EH.eps

VCELL

VMCV

- V or

T/ t or

VTEMP

VTCO

Maximum Time Out

Figure 3. Charge Algorithm State Diagram

bq2004E/H

Absolute Maximum Ratings

Symbol Parameter Minimum Maximum Unit Notes

VCC VCC relative to VSS -0.3 +7.0 V

VTDC voltage applied on any pin ex-

cluding VCC relative to VSS -0.3 +7.0 V

TOPR Operating ambient temperature -20 +70 °C Commercial

TSTG Storage temperature -55 +125 °C

TSOLDER Soldering temperature - +260 °C 10 sec max.

TBIAS Temperature under bias -40 +85 °C

Note: Permanent device damage may occur if Absolute Maximum Ratings are exceeded. Functional opera-

tion should be limited to the Recommended DC Operating Conditions detailed in this data sheet. Expo-

sure to conditions beyond the operational limits for extended periods of time may affect device reliability.

DC Thresholds (TA=T

OPR;V

CC ±10%)

Symbol Parameter Rating Tolerance Unit Notes

VSNSHI High threshold at SNS result-

ing in MOD = Low 0.05 *VCC ±0.025 V

VSNSLO Low threshold at SNS result-

ing in MOD = High

0.04 * VCC

±0.025

VLTF Low-temperature fault 0.4 *VCC ±0.030 VVTEMP ≥VLTF inhib-

its/terminates charge

VHTF High-temperature fault (1/3 *VLTF) + (2/3 *VTCO)±0.030 VVTEMP ≤VHTF inhibits

charge

VEDV End-of-discharge voltage 0.4 *VCC ±0.030 VVCELL <V

EDV inhibits

fast charge

VMCV Maximum cell voltage 0.8 *VCC ±0.030 VVCELL >V

MCV inhibits/

terminates charge

VTHERM TS input change for∆T/∆t

detection -16 ±4mV VCC = 5V, TA= 25°C

-∆VBAT input change for -∆V

detection -12 ±4mV VCC = 5V, TA= 25°C

PVD BAT input change for PVD

detection -6 ±2mV VCC = 5V, TA= 25°C

bq2004E/H

Recommended DC Operating Conditions (TA= TOPR)

Symbol Condition Minimum Typical Maximum Unit Notes

VCC Supply voltage 4.5 5.0 5.5 V

VBAT Battery input 0 - VCC V

VCELL BAT voltage potential 0 - VCC VV

BAT - VSNS

VTS Thermistor input 0 - VCC V

VTEMP TS voltage potential 0 - VCC VV

TS - VSNS

VTCO Temperature cutoff 0.2 *VCC - 0.4 *VCC V Valid ∆T/∆t range

VIH Logic input high 2.0 - - V DCMD, INH

Logic input high VCC - 0.3 - - V TM1, TM2, DSEL, VSEL

VIL Logic input low - - 0.8 V DCMD, INH

Logic input low - - 0.3 V TM1, TM2, DSEL, VSEL

VOH Logic output high VCC - 0.8 --V

DIS, MOD, LED1, LED2,

IOH ≤-10mA

VOL Logic output low - - 0.8 V DIS, MOD, LED1, LED2,

IOL ≤10mA

ICC Supply current - 1 3 mA Outputs unloaded

ISB Standby current - - 1 µA INH = VIL

IOH DIS, LED1, LED2, MOD source -10 - - mA @VOH = VCC - 0.8V

IOL DIS, LED1, LED2, MOD sink 10 - - mA @VOL = VSS + 0.8V

ILInput leakage - - ±1µA INH, BAT, V = VSS to VCC

Input leakage 50 - 400 µA DCMD, V = VSS to VCC

IIL Logic input low source - - 70 µATM1, TM2, DSEL, VSEL,

V = VSS to VSS + 0.3V

IIH Logic input high source -70 - - µATM1, TM2, DSEL, VSEL,

V = VCC - 0.3V to VCC

IIZ Tri-state -2 - 2 µATM1,TM

2, DSEL, and VSEL

should be left disconnected

(floating) for Z logic input state

Note: All voltages relative to VSS except as noted.

bq2004E/H

Impedance

Symbol Parameter Minimum Typical Maximum Unit

RBAT Battery input impedance 50 - - MΩ

RTS TS input impedance 50 - - MΩ

RTCO TCO input impedance 50 - - MΩ

RSNS SNS input impedance 50 - - MΩ

Timing (TA= 0 to +70°C; VCC ±10%)

Symbol Parameter Minimum Typical Maximum Unit Notes

tPW Pulse width for DCMD

and INH pulse command 1- -

µsPulse start for charge or discharge

before charge

dFCV Time base variation -16 - 16 % VCC = 4.75V to 5.25V

fREG MOD output regulation

frequency - - 300 kHz

tMCV Maximum voltage termi-

nation time limit 1-2s

Time limit to distinguish battery re-

moved from charge complete.

Note: Typical is at TA= 25°C, VCC = 5.0V.

bq2004E/H

16-Pin DIP Narrow (PN)

16-Pin PN (0.300" DIP)

Dimension

Inches Millimeters

Min. Max. Min. Max.

A 0.160 0.180 4.06 4.57

A1 0.015 0.040 0.38 1.02

B 0.015 0.022 0.38 0.56

B1 0.055 0.065 1.40 1.65

C 0.008 0.013 0.20 0.33

D 0.740 0.770 18.80 19.56

E 0.300 0.325 7.62 8.26

E1 0.230 0.280 5.84 7.11

e 0.300 0.370 7.62 9.40

G 0.090 0.110 2.29 2.79

L 0.115 0.150 2.92 3.81

S 0.020 0.040 0.51 1.02

bq2004E/H

16-Pin SOIC Narrow (SN)

.004

16-Pin SN (0.150" SOIC)

Dimension

Inches Millimeters

Min. Max. Min. Max.

A 0.060 0.070 1.52 1.78

A1 0.004 0.010 0.10 0.25

B 0.013 0.020 0.33 0.51

C 0.007 0.010 0.18 0.25

D 0.385 0.400 9.78 10.16

E 0.150 0.160 3.81 4.06

e 0.045 0.055 1.14 1.40

H 0.225 0.245 5.72 6.22

L 0.015 0.035 0.38 0.89

bq2004E/H

Data Sheet Revision History

Change No. Page No. Description Nature of Change

1 All Combined bq2004E and bq2004H, revised and

expanded format of this data sheet Clarification

2 7 Separated bq2004E and bq2004H in Table 2, LED

Output Summary Clarification

3 5 Description of charge-pending state Clarification

Note: Change 1 = Oct. 1997 B changes from Sept. 1996 (bq2004E), Feb. 1997 (bq2004H).

Change 2 = Feb. 1998 C changes from Oct. 1997 B.

Change 3 = Dec. 1998 D changes from Feb. 1998 C.

Change 4 = June 1999 E changes from Dec. 1998 D.

Corrected VSNSLO tolerance Was: ±0.010

Is: ±0.025

Change 5 = Apr. 2005 F changes from June 1999 E.

bq2004E/H

Ordering Information

bq2004

Package Option:

PN = 16-pin narrow plastic DIP

SN = 16-pin narrow SOIC

Device:

E = bq2004E Fast-Charge IC

H= bq2004H Fast-Charge IC

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device Package

Type Package

Drawing Pins SPQ Reel

Diameter

(mm)

Reel

Width

W1 (mm)

(mm) B0

(mm) K0

(mm) P1

(mm) W

(mm) Pin1

Quadrant

BQ2004ESNTR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1

BQ2004HSNTR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1

PACKAGE MATERIALS INFORMATION

www.ti.com 14-Jul-2012

Pack Materials-Page 1

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)

BQ2004ESNTR SOIC D 16 2500 367.0 367.0 38.0

BQ2004HSNTR SOIC D 16 2500 367.0 367.0 38.0

PACKAGE MATERIALS INFORMATION

www.ti.com 14-Jul-2012

Pack Materials-Page 2

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