LM3502-44
-+
VIN Sw
En1
En2
Fb
Cntrl
AGND PGND
VOUT1
VOUT2
L
22 PHD
CIN
4.7 PFCOUT
1 PF
R1
VSUPPLY
MAIN:
2 to 5
LEDs
SUB:
2 to 5
LEDs
Logic
Voltage
Signal
Inputs
LM3502
www.ti.com
SNVS339B –SEPTEMBER 2005–REVISED MAY 2013
LM3502 Step-Up Converter for White LED Applications
Check for Samples: LM3502
1FEATURES APPLICATIONS
2• Drive up to 4, 6, 8 or 10 White LEDs for Dual • Dual Display Backlighting in Portable Devices
Display Backlighting • Cellular Phones and PDAs
• >80% Efficiency DESCRIPTION
• Output Voltage Options: 16V , 25V , 35V, and The LM3502 is a white LED driver for lighting
44V applications. For dual display or large single white
• Input Under-Voltage Protection LED string backlighting applications, the LM3502
• Internal Soft Start Eliminating Inrush Current provides a complete solution. The LM3502 contains
two internal white LED current bypass FET(Field
• 1 MHz Constant Switching Frequency Effect Transistor) switches that are ideal for
• Wide Input Voltage: 2.5V to 5.5V controlling dual display applications. The white LED
• Small External Components current can be adjusted with a PWM signal directly
• Low Profile Packages: <1 mm Height from a microcontroller without the need of an RC filter
network.
– 10 Bump DSBGA
– 16 Pin WQFN
Typical Application
Figure 1. Blacklight Configuration with 10 White LEDs
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Copyright © 2005–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
A1
A2
A3
B1 B3
C1 C3
D1
D2
D3
1234
5
6
7
8
9 10 11 12
13
14
15
16
LM3502
SNVS339B –SEPTEMBER 2005–REVISED MAY 2013
www.ti.com
DESCRIPTION (CONTINUED)
With no external compensation, cycle-by-cycle current limit, over-voltage protection, and under-voltage
protection, the LM3502 offers superior performance over other application specific standard product step-up
white LED drivers.
Connection Diagrams
Figure 2. TOP VIEW Figure 3. TOP VIEW
10-Bump Thin DSBGA 16-Lead Thin WQFN
See Package Number (YPA0010) See Package Number (RGH0016A)
PIN DESCRIPTIONS
Bump # Pin # Name Description
A1 9 Cntrl Shutdown Control Connection
B1 7 Fb Feedback Voltage Connection
C1 6 VOUT2 Drain Connections of The NMOS and PMOS Field Effect Transistor (FET) Switches (Figure 4: N2
and P1)
D1 4 VOUT1 Over-Voltage Protection (OVP) and Source Connection of The PMOS FET Switch (Figure 4: P1)
D2 2 and 3 Sw Drain Connection of The Power NMOS Switch (Figure 4: N1)
D3 15 and 16 PGND Power Ground Connection
C3 14 AGND Analog Ground Connection
B3 13 VIN Supply or Input Voltage Connection
A3 12 En2 NMOS FET Switch Control Connection
A2 10 En1 PMOS FET Switch Control Connection
1 NC No Connection
5 NC No Connection
8 NC No Connection
11 NC No Connection
DAP DAP Die Attach Pad (DAP), must be soldered to the printed circuit board’s ground plane for enhanced
thermal dissipation.
Cntrl (Bump A1): Shutdown control pin
When VCntrl is ≥1.4V, the LM3502 is enabled or ON. When VCntrl is ≤0.3V, the LM3502 will
enter into shutdown mode operation. The LM3502 has an internal pull down resistor on the
Cntrl pin, thus the device is normally in the off state or shutdown mode of operation.
Fb (Bump B1):Output voltage feedback connection
The white LED string network current is set/programmed using a resistor from this pin to
ground.
VOUT2 (Bump C1): Drain connections of the internal PMOS and NMOS FET switches
. (Figure 4: P1 and N2). It is recommended to connect 100nF at VOUT2 for the LM3502-35V
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SNVS339B –SEPTEMBER 2005–REVISED MAY 2013
and LM3502-44 versions if VOUT2 is not used.
VOUT1 (Bump D1):Source connection of the internal PMOS FET switch (Figure 4: P1) and OVP sensing node
The output capacitor must be connected as close to the device as possible, between the
VOUT1 pin and ground plane. Also connect the Schottky diode as close as possible to the
VOUT1 pin to minimize trace resistance and EMI radiation.
Sw (Bump D2): Drain connection of the internal power NMOS FET switch (Figure 4: N1)
Minimize the metal trace length and maximize the metal trace width connected to this pin to
reduce EMI radiation and trace resistance.
PGND (Bump D3):Power ground pin
Connect directly to the ground plane.
AGND (Bump C3): Analog ground pin
Connect the analog ground pin directly to the PGND pin.
VIN (Bump B3):Supply or input voltage connection pin
The CIN capacitor should be as close to the device as possible, between the VIN pin and
ground plane.
En2 (Bump A3): Enable pin for the internal NMOS FET switch (Figure 4: N2) during device operation
When VEn2 is ≤0.3V, the internal NMOS FET switch turns on and the SUB display turns off.
When VEn2 is ≥1.4V, the internal NMOS FET switch turns off and the SUB display turns on.
The En2 pin has an internal pull down resistor, thus the internal NMOS FET switch is
normally in the on state of operation with the SUB display turned off.
If VEn1 and VEn2 are ≤0.3V and VCntrl is ≥1.4V, the LM3502 will enter a low IQshutdown
mode of operation where all the internal FET switches are off. If VOUT2 is not used, En2 must
be grounded or floating and use En1 along with Cntrl, to enable the device.
En1 (Bump A2): Enable pin for the internal PMOS FET switch (Figure 4: P1) during device operation
When VEn1 is ≤0.3V, the internal PMOS FET switch turns on and the MAIN display is turned
off. When VEn1 is ≥1.4V, the internal PMOS FET switch turns off and the MAIN display is
turned on. The En1 pin has an internal pull down resistor, thus the internal PMOS FET
switch is normally in the on state of operation with the MAIN display turned off. If VEn1 and
VEn2 are ≤0.3V and VCntrl is ≥1.4V, the LM3502 will enter a low IQshutdown mode of
operation where all the internal FET switches are off. If VOUT2 is not used, En2 must be
grounded and use En1 a long with Cntrl, to enable the device.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
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LM3502
SNVS339B –SEPTEMBER 2005–REVISED MAY 2013
www.ti.com
Absolute Maximum Ratings (1)(2)(3)
VIN Pin −0.3V to +5.5V
Sw Pin −0.3V to +48V
Fb Pin −0.3V to +5.5V
Cntrl Pin −0.3V to +5.5V
VOUT1 Pin −0.3V to +48V
VOUT2 Pin −0.3V to VOUT1
En1 −0.3V to +5.5V
En2 −0.3V to +5.5V
Continuous Power Dissipation Internally Limited
Maximum Junction Temperature
(TJ-MAX) +150°C
Storage Temperature Range −65°C to +150°C
ESD Rating (4)
Human Body Model: 2 kV
Machine Model: 200V
(1) All voltages are with respect to the potential at the GND pin.
(2) Absolute maximum ratings indicate limits beyond which damage to the device may occur. Electrical characteristic specifications do not
apply when operating the device outside of its rated operating conditions.
(3) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
(4) The human body model is a 100 pF capacitor discharged through a 1.5 kΩresistor into each pin. The machine model is a 200 pF
capacitor discharged directly into each pin.
Operating Conditions (1)(2)
Junction Temperature (TJ) Range −40°C to +125°C
Ambient Temperature (TA) Range −40°C to +85°C
Input Voltage, VIN Pin 2.5V to 5.5V
Cntrl, En1, and En2 Pins 0V to 5.5V
(1) Absolute maximum ratings indicate limits beyond which damage to the device may occur. Electrical characteristic specifications do not
apply when operating the device outside of its rated operating conditions.
(2) All voltages are with respect to the potential at the GND pin.
Thermal Properties (1)
Junction-to-Ambient Thermal Resistance (θJA)
DSBGA Package 65°C/W
WQFN Package 49°C/W
(1) The maximum allowable power dissipation is a function of the maximum junction temperature, TJ(MAX), the junction-to-ambient thermal
resistance, θJA, and the ambient temperature, TA. See Thermal Properties for the thermal resistance. The maximum allowable power
dissipation at any ambient temperature is calculated using: PD(MAX) = (TJ(MAX) – TA)/θJA. Exceeding the maximum allowable power
dissipation will cause excessive die temperature. For more information on this topic, please refer toApplication Note 1187: Leadless
Leadframe Package (LLP) and Application Note 1112 for DSBGA chip scale package.
Preliminary Electrical Characteristics (1) (2)
Limits in standard typeface are for TJ= 25°C. Limits in bold typeface apply over the full operating junction temperature range
(−40°C ≤TJ≤+125°C). Unless otherwise specified, VIN = 2.5V.
Symbol Parameter Conditions Min Typ Max Units
VIN Input Voltage 2.5 5.5 V
IQNon-Switching Fb > 0.25V 0.5 1mA
Switching Fb = 0V, Sw Is Floating 1.9 3mA
Shutdown Cntrl = 0V 0.1 3µA
Low IQShutdown Cntrl = 1.5V, En1 = En2 = 0V 6 15 µA
VFb Feedback Voltage 0.18 0.25 0.3 V
(1) All voltages are with respect to the potential at the GND pin.
(2) Min and Max limits are ensured by design, test, or statistical analysis. Typical numbers are not ensured, but do represent the most likely
norm.
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SNVS339B –SEPTEMBER 2005–REVISED MAY 2013
Preliminary Electrical Characteristics (1) (2) (continued)
Limits in standard typeface are for TJ= 25°C. Limits in bold typeface apply over the full operating junction temperature range
(−40°C ≤TJ≤+125°C). Unless otherwise specified, VIN = 2.5V.
Symbol Parameter Conditions Min Typ Max Units
ICL NMOS Power Switch −16, Fb = 0V 250 400 650
Current Limit −25, Fb = 0V 400 600 800 mA
−35, Fb = 0V 450 750 1050
−44, Fb = 0V 450 750 1050
IFb Feedback Pin Bias Fb = 0.25V 64 500 nA
Current (3)
FSSwitching Frequency 0.8 11.2 MHz
RDS(ON) NMOS Power Switch ON ISw = 500 mA
Resistance 0.55 1.1 Ω
(Figure 4: N1)
RPDS(ON) PMOS ON Resistance of IPMOS = 20 mA, En1 = 0V, En2 = 1.5V
VOUT1/VOUT2 Switch 5 10 Ω
(Figure 4: N1)
RNDS(ON) NMOS ON Resistance of INMOS = 20 mA, En1 = 1.5V, En2 = 0V
VOUT2/Fb Switch 2.5 5Ω
(Figure 4: N2)
DMAX Maximum Duty Cycle Fb = 0V 90 95 %
ICntrl Cntrl Pin Input Bias Cntrl = 2.5V 7 14 µA
Current (4) Cntrl = 0V 0.1
ISw Sw Pin Leakage Current Sw = 42V, Cntrl = 0V 0.01 5µA
(5)
IVOUT1(OFF) VOUT1 Pin Leakage VOUT1 = 14V, Cntrl = 0V (16) 0.1 3
Current (5) VOUT1 = 23V, Cntrl = 0V (25) 0.1 3µA
VOUT1 = 32V, Cntrl = 0V (35) 0.1 3
VOUT1 = 42V, Cntrl = 0V (44) 0.1 3
IVOUT1(ON) VOUT1 Pin Bias Current VOUT1 = 14V, Cntrl = 1.5V (16) 40 80
(5) VOUT1 = 23V, Cntrl = 1.5V (25) 50 100 µA
VOUT1 = 32V, Cntrl = 1.5V (35) 50 100
VOUT1 = 42V, Cntrl = 1.5V (44) 85 140
IVOUT2 VOUT2 Pin Leakage Fb = 0V, Cntrl = 0V, VOUT2 = 42V 0.1 3µA
Current (5)
UVP Under-Voltage On Threshold 2.4 2.5 V
Protection Off Threshold 2.2 2.3
OVP Over-Voltage Protection On Threshold (16) 14.5 15.5 16.5
(6) Off Threshold (16) 14.0 15 16.0
On Threshold (25) 22.5 24 25.5
Off Threshold (25) 21.5 23 24.5 V
On Threshold (35) 32.0 34 35.0
Off Threshold (35) 31.0 33 34.0
On Threshold (44) 40.5 42 43.5
Off Threshold (44) 39.0 41 42.0
VEn1 PMOS FET Switch Off Threshold (Display Lighting) 0.8 0.3
Enabling Threshold On Threshold (Display Lighting) 1.4 0.8 V
(Figure 4: P1)
VEn2 NMOS FET Switch Off Threshold (Display Lighting) 0.8 0.3
Enabling Threshold On Threshold (Display Lighting) 1.4 0.8 V
(Figure 4: N2)
VCntrl Device Enabling Off Threshold 0.8 0.3 V
Threshold OnThreshold 1.4 0.8
TSHDW Shutdown Delay Time 8 12 16 ms
IEn1 En1 Pin Input Bias En1 = 2.5V 7 14 µA
Current En1 = 0V 0.1
(3) Current flows out of the pin.
(4) Current flows into the pin.
(5) Current flows into the pin.
(6) The on threshold indicates that the LM3502 is no longer switching or regulating LED current, while the off threshold indicates normal
operation.
Copyright © 2005–2013, Texas Instruments Incorporated Submit Documentation Feedback 5
Product Folder Links: LM3502
Driver Logic
+
-
Oscillator
Current Sense
+
-
Thermal Shutdown
Duty Limit
Reference
Duty Limit
Comparator
Fb
UVP
Comparator
OVP
Comparator
PWM
Comparator
Light Load
Comparator
Light Load
Reference
VIN Sw
VOUT1
VOUT2
Fb
En2
En1
PGNDCntrlAGND
N1
N2
P1
Error
Amplifier
UVP
Reference OVP
Reference
Current Limit
Soft Start
915,16 121014
4
7
6
2,313
FET Logic
+
-
+
-
Fb
Reference
Shutdown
Comparator
+
-
+
-
LM3502
SNVS339B –SEPTEMBER 2005–REVISED MAY 2013
www.ti.com
Preliminary Electrical Characteristics (1) (2) (continued)
Limits in standard typeface are for TJ= 25°C. Limits in bold typeface apply over the full operating junction temperature range
(−40°C ≤TJ≤+125°C). Unless otherwise specified, VIN = 2.5V.
Symbol Parameter Conditions Min Typ Max Units
IEn2 En2 Pin Input Bias En2 = 2.5V 7 14 µA
Current En2 = 0V 0.1
BLOCK DIAGRAM
Figure 4. Block Diagram
Detailed Description of Operation
The LM3502 utilizes an asynchronous current mode pulse-width-modulation (PWM) control scheme to regulate
the feedback voltage over specified load conditions. The DC/DC converter behaves as a controlled current
source for white LED applications. The operation can best be understood by referring to the block diagram in
Figure 4 for the following operational explanation. At the start of each cycle, the oscillator sets the driver logic
and turns on the internal NMOS power device, N1, conducting current through the inductor and reverse biasing
the external diode. The white LED current is supplied by the output capacitor when the internal NMOS power
device, N1, is turned on. The sum of the error amplifier’s output voltage and an internal voltage ramp are
compared with the sensed power NMOS, N1, switch voltage. Once these voltages are equal, the PWM
6Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated
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SNVS339B –SEPTEMBER 2005–REVISED MAY 2013
comparator will then reset the driver logic, thus turning off the internal NMOS power device, N1, and forward
biasing the external diode. The inductor current then flows through the diode to the white LED load and output
capacitor. The inductor current recharges the output capacitor and supplies the current for the white LED load.
The oscillator then resets the driver logic again repeating the process. The output voltage of the error amplifier
controls the current through the inductor. This voltage will increase for larger loads and decrease for smaller
loads limiting the peak current in the inductor and minimizing EMI radiation. The duty limit comparator is always
operational, it prevents the internal NMOS power switch, N1, from being on for more than one oscillator cycle
and conducting large amounts of current. The light load comparator allows the LM3502 to properly regulate
light/small white LED load currents, where regulation becomes difficult for the LM3502’s primary control loop.
Under light load conditions, the LM3502 will enter into a pulse skipping pulse-frequency-mode (PFM) of operation
where the switching frequency will vary with the load.
The LM3502 has 2 control pins, En1 and En2, used for selecting which segment of a single white LED string
network is active for dual display applications. En1 controls the main display (MAIN) segment of the single string
white LED network between pins VOUT1 and VOUT2. En2 controls the sub display (SUB) segment of the single
string white LED network between the VOUT2 and Fb. For a quick review of the LM3502 control pin operational
characteristics, see Figure 5.
When the Cntrl pin is ≥1.4V, the LM3502 will enter in low IQstate if both En1 and En2 ≤0.3V. At this time, both
the P1 and N2 FETs will turn off. The output voltage will be a diode drop below the supply voltage and the soft-
start will be reset limiting the peak inductor current at the next start-up.
The LM3502 is designed to control the LED current with a PWM signal without the use of an external RC filter.
Utilizing special circuitry, the LM3502 can operate over a large range of PWM frequencies without restarting the
soft-start allowing for fast recovery at high PWM frequencies. Figure 6 represents a PWM signal driving the Cntrl
pin where tLis defined as the low time of the signal. The following is true:
• If tL< 12ms (typical): The device will stop switching during this time and the soft-start will not be reset allowing
LED current PWM control.
• If tL> 12ms (typical): The device will shutdown and the soft-start will reset to prevent high peak currents at the
next startup. Both the N2 and P1 switches will turn off.
The LM3502 has dedicated protection circuitry active during normal operation to protect the integrated circuit (IC)
and external components. The thermal shutdown circuitry turns off the internal NMOS power device, N1, when
the internal semiconductor junction temperature reaches excessive levels. The LM3502 has a under-voltage
protection (UVP) comparator that disables the internal NMOS power device when battery voltages are too low,
thus preventing an on state where the internal NMOS power device conducts large amounts of current. The over-
voltage protection (OVP) comparator prevents the output voltage from increasing beyond the protection limit
when the white LED string network is removed or if there is a white LED failure. OVP allows for the use of low
profile ceramic capacitors at the output. The current though the internal NMOS power device, N1, is monitored to
prevent peak inductor currents from damaging the IC. If during a cycle (cycle=1/switching frequency) the peak
inductor current exceeds the current limit for the LM3502, the internal NMOS power device will be turned off for
the remaining duration of that cycle.
Copyright © 2005–2013, Texas Instruments Incorporated Submit Documentation Feedback 7
Product Folder Links: LM3502
tL
(Typ)
1.4V
0.3V
Cntrl
Cntrl* En1 En2
0.3V1.4V 0.3V
Result* (See Figure 1 and Figure 2)
1.4V1.4V 0.3V
0.3V1.4V 1.4V
1.4V1.4V 1.4V
[P1ÆOFF N2ÆOFF N1ÆOFF] or [MAINÆOFF SUBÆOFF N1ÆOFF]
[P1ÆOFF N2ÆON N1ÆSwitching] or [MAINÆON SUBÆOFF N1ÆSwitching]
[P1ÆON N2ÆOFF N1ÆSwitching] or [MAINÆOFF SUBÆON N1ÆSwitching]
[P1ÆOFF N2ÆOFF N1ÆSwitching] or [MAINÆON SUBÆON N1ÆSwitching]
0.3V0.3V 0.3V [P1ÆOFF N2ÆOFF N1ÆOFF] or [MAINÆOFF SUBÆOFF N1ÆOFF]
1.4V0.3V 0.3V [P1ÆOFF N2ÆOFF N1ÆOFF] or [MAINÆOFF SUBÆOFF N1ÆOFF]
0.3V0.3V 1.4V [P1ÆOFF N2ÆOFF N1ÆOFF] or [MAINÆOFF SUBÆOFF N1ÆOFF]
1.4V0.3V 1.4V [P1ÆOFF N2ÆOFF N1ÆOFF] or [MAINÆOFF SUBÆOFF N1ÆOFF]
*Table is only valid for when the Cntrl pin signal is a non-periodic logic signal, not a PWM signal.
Shutdown Low IQ
X
X
X
X
X
Shutdown
LM3502
SNVS339B –SEPTEMBER 2005–REVISED MAY 2013
www.ti.com
Figure 5. Operational Characteristics Table
Figure 6. Control Signal Waveform
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Product Folder Links: LM3502
5.07.5
10.0
12.5
15.0
17.5
20.0
22.5
25.0
27.5
30.0
32.5
35.0
LED CURRENT (mA)
40
45
50
55
60
65
70
75
80
85
90
EFFICIENCY (%)
2.5
VIN = 5.5V VIN = 3.3V
VIN = 2.7V
VIN = 4.2V
VIN = 3V
2 12 22 32 42 52 62
LED CURRENT (mA)
40
45
50
55
60
65
70
75
80
85
90
EFFICIENCY (%)
VIN = 2.7V VIN = 3V
VIN = 3.3V
VIN = 4.2V
VIN = 5.5V
3.0 3.5 4.0 4.5 5.0 5.5
INPUT VOLTAGE (V)
1.50
2.00
2.50
3.00
3.50
4.00
SWITCHING IQ (mA)
2.5
25oC125oC
-40oC
-30
-20
-10 0102030405060708090
100
110
120
130
TEMPERATURE (oC)
0.93
0.94
0.95
0.96
0.97
0.98
0.99
1.00
1.01
1.02
1.03
FREQUENCY (MHz)
-40
VIN = 2.5V
3.0 3.5 4.0 4.5 5.0 5.5
INPUT VOLTAGE (V)
0.400
0.440
0.480
0.520
0.560
0.600
NON-SWITCHING IQ (mA)
2.5
-40oC
0.420
0.460
0.500
0.540
0.580
125oC
25oC
LM3502
www.ti.com
SNVS339B –SEPTEMBER 2005–REVISED MAY 2013
Typical Performance Characteristics
( Circuit in Figure 1: L = DO1608C-223 and D = MBRM140T3. Efficiency: η= POUT/PIN = [(VOUT – VFb) * IOUT]/[VIN * IIN]. TA=
25°C, unless otherwise stated.)
IQ(Non-Switching) Switching Frequency
vs vs
VIN Temperature
Figure 7. Figure 8.
IQ(Switching) IQ(Switching)
vs vs
VIN Temperature
Figure 9. Figure 10.
10 LED Efficiency 8 LED Efficiency
vs vs
LED Current LED Current
Figure 11. Figure 12.
Copyright © 2005–2013, Texas Instruments Incorporated Submit Documentation Feedback 9
Product Folder Links: LM3502
0.0
EN1 PIN VOLTAGE (V)
0
30
EN1 PIN CURRENT (PA)
5
10
15
20
25
1.0 2.0 3.0 4.0 5.0
-40oC
25oC
125oC
0.0 2.0
0
5
10
15
20
25
EN2 PIN CURRENT (PA)
EN2 PIN VOLTAGE (V)
1.0 3.0 4.0 5.0
-40oC
125oC
25oC
-30
-20
-10 0102030405060708090
100
110
120
130
TEMPERATURE (oC)
94
98
MAX DUTY CYCLE (%)
-40
95
96
97 VIN = 2.5
0.0
CNTRL PIN VOLTAGE (V)
0
30
CNTRL PIN CURRENT (PA)
5
10
15
20
25
1.0 2.0 3.0 4.0 5.0
-40oC
25oC
125oC
2 10 18 26 34 42 50 58 66 74
LED CURRENT (mA)
70
75
80
85
90
95
EFFICIENCY (%)
VIN = 2.7V
VIN = 5.5V
VIN = 3.3V
VIN = 4.2V
212 22 32 42 52 62 72 82
LED CURRENT (mA)
60
65
70
75
80
85
90
95
EFFICIENCY (%)
VIN = 2.7V
VIN = 5.5V
VIN = 3V
VIN = 4.2V
VIN = 3.3V
LM3502
SNVS339B –SEPTEMBER 2005–REVISED MAY 2013
www.ti.com
Typical Performance Characteristics (continued)
( Circuit in Figure 1: L = DO1608C-223 and D = MBRM140T3. Efficiency: η= POUT/PIN = [(VOUT – VFb) * IOUT]/[VIN * IIN]. TA=
25°C, unless otherwise stated.)
6 LED Efficiency 4 LED Efficiency
vs vs
LED Current LED Current
Figure 13. Figure 14.
Cntrl Pin Current Maximum Duty Cycle
vs vs
Cntrl Pin Voltage Temperature
Figure 15. Figure 16.
En1 Pin Current En2 Pin Current
vs vs
En1 Pin Voltage En2 Pin Voltage
Figure 17. Figure 18.
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INPUT VOLTAGE (V)
2.5 3.0 3.5 4.0 4.5 5.0 5.5
320
340
360
380
420
440
460
480
-16 CURRENT LIMIT (mA)
400
T = -40oC
T = 25oC
T = 85oC
2.5 3.0 3.5 4.0 4.5 5.0 5.5
INPUT VOLTAGE (V)
0.00
0.50
1.00
1.50
2.00
2.50
3.00
3.50
NMOS SWITCH RDS(ON) (:)
-40oC
INMOS = 20 mA
125oC
25oC
2.0 12.0 22.0 32.0 42.0
3
4
5
6
7
8
9
10
PMOS SWITCH RDS(ON) (:)
VOUT1 PIN VOLTAGE (V)
125oC
IPMOS = 20 mA
25oC
-40oC
2.5 3.0 3.5 4.0 4.5 5.0 5.5
INPUT VOLTAGE (V)
300
400
500
600
700
800
900
1000
POWER NMOS RDS(ON) (m:)
125oC
INMOS = 400 mA
25oC
-40oC
8 16 24 32 40 48
VOUT1 PIN VOLTAGE (V)
0
20
40
60
80
100
120
140
160
VOUT1 PIN BIAS CURRENT (PA)
0
125oC
25oC
-40oC
LM3502
www.ti.com
SNVS339B –SEPTEMBER 2005–REVISED MAY 2013
Typical Performance Characteristics (continued)
( Circuit in Figure 1: L = DO1608C-223 and D = MBRM140T3. Efficiency: η= POUT/PIN = [(VOUT – VFb) * IOUT]/[VIN * IIN]. TA=
25°C, unless otherwise stated.)
VOUT1 Pin Current Power NMOS RDS(ON) (Figure 4: N1)
vs vs
VOUT1 Pin Voltage VIN
Figure 19. Figure 20.
NMOS RDS(ON) (Figure 4: N2) PMOS RDS(ON) (Figure 4: P1)
vs vs
VIN VIN
Figure 21. Figure 22.
Feedback Voltage Current Limit (LM3502-16)
vs vs
Temperature VIN
Figure 23. Figure 24.
Copyright © 2005–2013, Texas Instruments Incorporated Submit Documentation Feedback 11
Product Folder Links: LM3502
5.0
INPUT VOLTAGE (V)
690
700
710
720
730
740
750
760
770
780
CURRENT LIMIT (mA)
5.54.54.03.53.02.5
85oC
-40oC
25oC
-25 -10 5 20 35 50 65 80
TEMPERATURE (oC)
420
440
460
480
500
520
540
560
580
600
620
-25 CURRENT LIMIT (mA)
-40
VIN = 5.5V
VIN = 2.5V
-40 80
TEMPERATURE (oC)
-35/44 CURRENT LIMIT (mA)
-25 -10 5 20 35 50 65
690
700
710
720
730
740
750
760
780
770
VIN = 2.5V
INPUT VOLTAGE (V)
440
480
520
560
600
-25 CURRENT LIMIT (mA)
2.5 3.0 3.5 4.0 4.5 5.0 5.5
460
500
540
580
620
T = -40oC
T = 25oC
T = 85oC
-40 80
TEMPERATURE (oC)
-16 CURRENT LIMIT (mA)
-25 -10 5 20 35 50 65
320
340
360
380
400
420
440
VIN = 5.5V
VIN = 2.5V
LM3502
SNVS339B –SEPTEMBER 2005–REVISED MAY 2013
www.ti.com
Typical Performance Characteristics (continued)
( Circuit in Figure 1: L = DO1608C-223 and D = MBRM140T3. Efficiency: η= POUT/PIN = [(VOUT – VFb) * IOUT]/[VIN * IIN]. TA=
25°C, unless otherwise stated.)
Current Limit (LM3502-16) Current Limit (LM3502-25)
vs vs
Temperature VIN
Figure 25. Figure 26.
Current Limit (LM3502-25) Current Limit (LM3502-35/44)
vs vs
Temperature Temperature
Figure 27. Figure 28.
Current Limit (LM3502-35/44)
vs
VIN
Figure 29.
12 Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated
Product Folder Links: LM3502
R1
LM3502
VIN Sw
En1
En2
Fb
Cntrl
AGND PGND
VOUT1
VOUT2
VSUPPLY
PWM Signal
GND
Unconnected
Floating
ILED =R1
VFb
LM3502
www.ti.com
SNVS339B –SEPTEMBER 2005–REVISED MAY 2013
APPLICATION INFORMATION
WHITE LED CURRENT SETTING
The LED current is set using the following equation:
where
• ILED: White LED Current.
• VFb: Feedback Pin Voltage. VFb = 0.25V, Typical.
• R1: Current Setting Resistor. (1)
WHITE LED DIMMING
For dimming the white LED string with a pulse-width-modulated (PWM) signal on the Cntrl pin, care must taken
to balance the tradeoffs between audible noise and white LED brightness control. For best PWM duty cycle vs.
white LED current linearity, the PWM frequency should be between 200Hz and 500Hz. Other PWM frequencies
can be used, but the linearity over input voltage and duty cycle variation will not be as good as what the 200Hz to
500Hz PWM frequency spectrum provides. To minimize audible noise interference, it is recommended that a
output capacitor with minimal susceptibility to piezoelectric induced stresses be used for the particular
applications that require minimal or no audible noise interference.
Figure 30.
If VOUT2 is not used , En2 must be grounded
Copyright © 2005–2013, Texas Instruments Incorporated Submit Documentation Feedback 13
Product Folder Links: LM3502
R = [2 * IOUT * L * Fs * (VOUT)2]
[(VIN)2 * Eff * (VOUT - VIN)]
'iL = [VIN * D]
[L * Fs]
IL (avg) = [IOUT]
[(1-D) * Eff]
R = 'iL
2 * IL (avg)
IL(avg)
Time
Inductor Current
' iL
TS
tON = DTS
(Vin - Vout)/L
Vin/L
LM3502
SNVS339B –SEPTEMBER 2005–REVISED MAY 2013
www.ti.com
Figure 31. Inductor Current Waveform
CONTINUOUS AND DISCONTINUOUS MODES OF OPERATION
Since the LM3502 is a constant frequency pulse-width-modulated step-up regulator, care must be taken to make
sure the maximum duty cycle specification is not violated. The duty cycle equation depends on which mode of
operation the LM3502 is in. The two operational modes of the LM3502 are continuous conduction mode (CCM)
and discontinuous conduction mode (DCM). Continuous conduction mode refers to the mode of operation where
during the switching cycle, the inductor current never goes to and stays at zero for any significant amount of time
during the switching cycle. Discontinuous conduction mode refers to the mode of operation where during the
switching cycle, the inductor current goes to and stays at zero for a significant amount of time during the
switching cycle. Figure 31 illustrates the threshold between CCM and DCM operation. In Figure 31, the inductor
current is right on the CCM/DCM operational threshold. Using this as a reference, a factor can be introduced to
calculate when a particular application is in CCM or DCM operation. R is a CCM/DCM factor we can use to
compute which mode of operation a particular application is in. If R is ≥1, then the application is operating in
CCM. Conversely, if R is < 1, the application is operating in DCM. The R factor inequalities are a result of the
components that make up the R factor. From Figure 31, the R factor is equal to the average inductor current,
IL(avg), divided by half the inductor ripple current, ΔiL. Using Figure 31 the following equation can be used to
compute R factor:
where
• VIN: Input Voltage.
• VOUT: Output Voltage.
• Eff: Efficiency of the LM3502.
• Fs: Switching Frequency.
• IOUT: White LED Current/Load Current.
• L: Inductance Magnitude/Inductor Value.
• D: Duty Cycle for CCM Operation.
•ΔiL: Inductor Ripple Current
• IL(avg): Average Inductor Current (2)
For CCM operation, the duty cycle can be computed with:
14 Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated
Product Folder Links: LM3502
[VIN * D]
[L * Fs]
IPeak
|
[IOUT]
[(1 - D) * Eff] +[VIN * D]
[2 * L * Fs]
IPeak
|
IPeak IL (avg) +
|
'iL
2
D = [2 * IOUT * L * (VOUT - VIN) * Fs]
[(VIN)2 * Eff]
tON
TS
D =
D = [VOUT]
[VOUT - VIN]
tON
TS
D =
LM3502
www.ti.com
SNVS339B –SEPTEMBER 2005–REVISED MAY 2013
where
• D: Duty Cycle for CCM Operation.
• VOUT: Output Voltage.
• VIN: Input Voltage. (3)
For DCM operation, the duty cycle can be computed with:
where
• D: Duty Cycle for DCM Operation.
• VOUT: Output Voltage.
• VIN: Input Voltage.
• IOUT: White LED Current/Load Current.
• Fs: Switching Frequency.
• L: Inductor Value/Inductance Magnitude. (4)
INDUCTOR SELECTION
In order to maintain inductance, an inductor used with the LM3502 should have a saturation current rating larger
than the peak inductor current of the particular application. Inductors with low DCR values contribute decreased
power losses and increased efficiency. The peak inductor current can be computed for both modes of operation:
CCM and DCM.
The cycle-by-cycle peak inductor current for CCM operation can be computed with:
where
• VIN: Input Voltage.
• Eff: Efficiency of the LM3502.
• Fs: Switching Frequency.
• IOUT: White LED Current/Load Current.
• L: Inductance Magnitude/Inductor Value.
• D: Duty Cycle for CCM Operation.
• IPEAK: Peak Inductor Current.
•ΔiL: Inductor Ripple Current.
• IL(avg): Average Inductor Current. (5)
The cycle-by-cycle peak inductor current for DCM operation can be computed with:
where
• VIN: Input Voltage.
Copyright © 2005–2013, Texas Instruments Incorporated Submit Documentation Feedback 15
Product Folder Links: LM3502
[VIN * RDS(ON) * ((D/'¶) - 1)]
[1.562 * Fs]
L >
LM3502
SNVS339B –SEPTEMBER 2005–REVISED MAY 2013
www.ti.com
• Fs: Switching Frequency.
• L: Inductance Magnitude/Inductor Value.
• D: Duty Cycle for DCM Operation.
• IPEAK: Peak Inductor Current. (6)
The minimum inductance magnitude/inductor value for the LM3502 can be calculated using the following, which
is only valid when the duty cycle is > 0.5:
where
• D: Duty Cycle.
• D: 1–D.
• RDS(ON): NMOS Power Switch ON
• VIN: Input Voltage.
• L: Inductance Magnitude/Inductor Value. (7)
This equation gives the value required to prevent subharmonic oscillations. The result of this equation and the
inductor average and ripple current should be accounted for when choosing an inductor value.
Some recommended inductor manufacturers included but are not limited to:
DO1608C-223
CoilCraft www.coilcraft.com
DT1608C-223
CAPACITOR SELECTION
Multilayer ceramic capacitors are the best choice for use with the LM3502. Multilayer ceramic capacitors have
the lowest equivalent series resistance (ESR). Applied voltage or DC bias, temperature, dielectric material type
(X7R, X5R, Y5V, etc), and manufacturer component tolerance have an affect on the true or effective capacitance
of a ceramic capacitor. Be aware of how your application will affect a particular ceramic capacitor by analyzing
the aforementioned factors of your application. Before selecting a capacitor always consult the capacitor
manufacturer’s data curves to verify the effective or true capacitance in your application.
INPUT CAPACITOR SELECTION
The input capacitor serves as an energy reservoir for the inductor. In addition to acting as an energy reservoir for
the inductor the input capacitor is necessary for the reduction in input voltage ripple and noise experienced by
the LM3502. The reduction in input voltage ripple and noise helps ensure the LM3502’s proper operation, and
reduces the effect of the LM3502 on other devices sharing the same supply voltage. To ensure low input voltage
ripple, the input capacitor must have an extremely low ESR. As a result of the low input voltage ripple
requirement multilayer ceramic capacitors are the best choice. A minimum capacitance of 2.0 µF is required for
normal operation, so consult the capacitor manufacturer’s data curves to verify whether the minimum
capacitance requirement is going to be achieved for a particular application.
OUTPUT CAPACITOR SELECTION
The output capacitor serves as an energy reservoir for the white LED load when the internal power FET switch
(Figure 4: N1) is on or conducting current. The requirements for the output capacitor must include worst case
operation such as when the load opens up and the LM3502 operates in over-voltage protection (OVP) mode
operation. A minimum capacitance of 0.5µF is required to ensure normal operation. Consult the capacitor
manufacturer’s data curves to verify whether the minimum capacitance requirement is going to be achieved for a
particular application.
Some recommended capacitor manufacturers included but are not limited to:
Taiyo GMK212BJ105MD www.t-yuden.com
Yuden (0805/35V)
muRata GRM40-035X7R105K www.murata.com
(0805/50V)
16 Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated
Product Folder Links: LM3502
LM3502
www.ti.com
SNVS339B –SEPTEMBER 2005–REVISED MAY 2013
TDK C3216X7R1H105KT www.tdktca.com
(1206/50V)
C3216X7R1C475K
(1206/16V)
AVX 08053D105MAT www.avxcorp.com
(0805/25V)
08056D475KAT
(0805/6.3V)
1206ZD475MAT
(1206/10V)
DIODE SELECTION
To maintain high efficiency it is recommended that the average current rating (IFor IO) of the selected diode
should be larger than the peak inductor current (ILpeak). At the minimum, the average current rating of the diode
should be larger than the maximum LED current. To maintain diode integrity the peak repetitive forward current
(IFRM) must be greater than or equal to the peak inductor current (ILpeak). Diodes with low forward voltage ratings
(VF) and low junction capacitance magnitudes (CJor CTor CD) are conducive to high efficiency. The chosen
diode must have a reverse breakdown voltage rating (VRand/or VRRM) that is larger than the output voltage
(Vout). No matter what type of diode is chosen, Schottky or not, certain selection criteria must be followed:
1. VRand VRRM > VOUT
2. IFor IO≥ILOAD or IOUT
3. IFRM ≥ILpeak
Some recommended diode manufacturers included but are not limited to:
Vishay SS12(1A/20V) www.vishay.com
SS14(1A/40V)
SS16(1A/60V)
On MBRM120E www.onsemi.com
Semiconductor (1A/20V)
MBRS1540T3
(1.5A/40V)
MBR240LT
(2A/40V)
Central CMSH1- 40M www.centralsemi.com
Semiconductor (1A/40V)
SHUTDOWN AND START-UP
On startup, the LM3502 contains special circuitry that limits the peak inductor current which prevents large
current spikes from loading the battery or power supply. When Cntrl ≥1.4V and both the En1 and En2 signals
are less than 0.3V, the LM3502 will enter a low IQstate and regulation will end. During this low IQmode the
output voltage is a diode drop below the supply voltage and the soft-start will be reset to limit the peak inductor
current at the next startup. When both En1 and En2 are less than 0.3V, the P1 PMOS and N2 NMOS switches
will turn off.
When Cntrl < 0.3V for more than 12ms, typicaly, the LM3502 will shutdown and the output voltage will be a diode
drop below the supply voltage. If the Cntrl pin is low for more than 12ms, the soft-start will reset to limit the peak
inductor current at the next startup.
When Cntrl is < 0.3 but for less than 12ms, typically, the device will not shutdown and reset the soft-start but shut
off the NMOS N1 Power Device to allow for PWM contrl of the LED current.
THERMAL SHUTDOWN
The LM3502 stops regulating when the internal semiconductor junction temperature reaches approximately
140°C. The internal thermal shutdown has approximately 20°C of hysteresis which results in the LM3502 turning
back on when the internal semiconductor junction temperature reaches 120°C. When the thermal shutdown
temperature is reached, the softstart is reset to prevent inrush current when the die temperature cools.
Copyright © 2005–2013, Texas Instruments Incorporated Submit Documentation Feedback 17
Product Folder Links: LM3502
LM3502
SNVS339B –SEPTEMBER 2005–REVISED MAY 2013
www.ti.com
UNDER VOLTAGE PROTECTION
The LM3502 contains protection circuitry to prevent operation for low input supply voltages. When Vin drops
below 2.3V, typically the LM3502 will no longer regulate. In this mode, the output volage will be one diode drop
below Vin and the softstart will be reset. When Vin increases above 2.4V, typically, the device will begin
regulating again.
OVER VOLTAGE PROTECTION
The LM3502 contains dedicated circuitry for monitoring the output voltage. In the event that the LED network is
disconnected from the LM3502, the output voltage will increase and be limited to 15.5V(typ.) for the 16V version ,
24V(typ.) for the 25V version, 34V(typ.) for the 35V version and 42V(typ.) for the 44V version (see eletrical table
for more details). In the event that the network is reconnected, regulation will resume at the appropriate output
voltage.
LAYOUT CONSIDERATIONS
All components, except for the white LEDs, must be placed as close as possible to the LM3502. The die attach
pad (DAP) must be soldered to the ground plane.
The input bypass capacitor CIN, as shown in Figure 1, must be placed close to the IC and connect between the
VIN and PGND pins. This will reduce copper trace resistance which effects input voltage ripple of the IC. For
additional input voltage filtering, a 100nF bypass capacitor can be placed in parallel with CIN to shunt any high
frequency noise to ground. The output capacitor, COUT, must be placed close to the IC and be connected
between the VOUT1 and PGND pins. Any copper trace connections for the COUT capacitor can increase the series
resistance, which directly effects output voltage ripple and efficiency. The current setting resistor, R1, should be
kept close to the Fb pin to minimize copper trace connections that can inject noise into the system. The ground
connection for the current setting resistor network should connect directly to the PGND pin. The AGND pin
should be tied directly to the PGND pin. Trace connections made to the inductor should be minimized to reduce
power dissipation and increase overall efficiency while reducing EMI radiation. For more details regarding layout
guidelines for switching regulators, refer to Applications Note AN-1149.
18 Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated
Product Folder Links: LM3502
LM3502
www.ti.com
SNVS339B –SEPTEMBER 2005–REVISED MAY 2013
REVISION HISTORY
Changes from Revision A (May 2013) to Revision B Page
• Changed layout of National Data Sheet to TI format .......................................................................................................... 18
Copyright © 2005–2013, Texas Instruments Incorporated Submit Documentation Feedback 19
Product Folder Links: LM3502
PACKAGE OPTION ADDENDUM
www.ti.com 16-Oct-2015
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
LM3502ITL-16/NOPB LIFEBUY DSBGA YPA 10 250 Green (RoHS
& no Sb/Br) SNAGCU Level-1-260C-UNLIM -40 to 125 SANB
LM3502ITL-25/NOPB LIFEBUY DSBGA YPA 10 250 Green (RoHS
& no Sb/Br) SNAGCU Level-1-260C-UNLIM -40 to 125 SAPB
LM3502ITL-44/NOPB LIFEBUY DSBGA YPA 10 250 Green (RoHS
& no Sb/Br) SNAGCU Level-1-260C-UNLIM -40 to 125 SDLB
LM3502SQ-16/NOPB LIFEBUY WQFN RGH 16 1000 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 L00048B
LM3502SQ-25/NOPB LIFEBUY WQFN RGH 16 1000 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 L00049B
LM3502SQ-35/NOPB LIFEBUY WQFN RGH 16 1000 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 L00044B
LM3502SQ-44/NOPB LIFEBUY WQFN RGH 16 1000 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 L00050B
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
PACKAGE OPTION ADDENDUM
www.ti.com 16-Oct-2015
Addendum-Page 2
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
LM3502ITL-16/NOPB DSBGA YPA 10 250 178.0 8.4 2.03 2.21 0.76 4.0 8.0 Q1
LM3502ITL-25/NOPB DSBGA YPA 10 250 178.0 8.4 2.03 2.21 0.76 4.0 8.0 Q1
LM3502ITL-44/NOPB DSBGA YPA 10 250 178.0 8.4 2.03 2.21 0.76 4.0 8.0 Q1
LM3502SQ-16/NOPB WQFN RGH 16 1000 178.0 12.4 4.3 4.3 1.3 8.0 12.0 Q1
LM3502SQ-25/NOPB WQFN RGH 16 1000 178.0 12.4 4.3 4.3 1.3 8.0 12.0 Q1
LM3502SQ-35/NOPB WQFN RGH 16 1000 178.0 12.4 4.3 4.3 1.3 8.0 12.0 Q1
LM3502SQ-44/NOPB WQFN RGH 16 1000 178.0 12.4 4.3 4.3 1.3 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 2-Sep-2015
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
LM3502ITL-16/NOPB DSBGA YPA 10 250 210.0 185.0 35.0
LM3502ITL-25/NOPB DSBGA YPA 10 250 210.0 185.0 35.0
LM3502ITL-44/NOPB DSBGA YPA 10 250 210.0 185.0 35.0
LM3502SQ-16/NOPB WQFN RGH 16 1000 210.0 185.0 35.0
LM3502SQ-25/NOPB WQFN RGH 16 1000 210.0 185.0 35.0
LM3502SQ-35/NOPB WQFN RGH 16 1000 210.0 185.0 35.0
LM3502SQ-44/NOPB WQFN RGH 16 1000 210.0 185.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 2-Sep-2015
Pack Materials-Page 2
www.ti.com
PACKAGE OUTLINE
C
16X 0.3
0.2
2.6 0.1
12X 0.5
16X 0.5
0.3
4X
1.5
0.8 MAX
A
4.1
3.9
B4.1
3.9
0.3
0.2
0.5
0.3
(0.1)
TYP
4214978/A 10/2013
WQFN - 0.8 mm max heightRGH0016A
WQFN
PIN 1 INDEX AREA
SEATING PLANE
1
49
12
58
16 13
(OPTIONAL)
PIN 1 ID
DETAIL
SEE TERMINAL
NOTES:
1. All linear dimensions are in millimeters. Dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance.
0.1 C A B
0.05 C
SCALE 3.500
DETAIL
OPTIONAL TERMINAL
TYPICAL
www.ti.com
EXAMPLE BOARD LAYOUT
( 2.6)
0.07 MIN
ALL AROUND
0.07 MAX
ALL AROUND
16X (0.6)
16X (0.25)
(3.8)
(3.8)
5X ( )
VIA
0.2
12X (0.5)
(0.25) TYP
(1)
(1)
4214978/A 10/2013
WQFN - 0.8 mm max heightRGH0016A
WQFN
SYMM
SEE DETAILS
1
4
58
9
12
13
16
SYMM
LAND PATTERN EXAMPLE
SCALE:15X
NOTES: (continued)
4. This package is designed to be soldered to a thermal pad on the board. For more information, see QFN/SON PCB application report
in literature No. SLUA271 (www.ti.com/lit/slua271).
SOLDER MASK
OPENING
METAL
SOLDER MASK
DEFINED
METAL
SOLDER MASK
OPENING
SOLDER MASK DETAILS
NON SOLDER MASK
DEFINED
(PREFERRED)
www.ti.com
EXAMPLE STENCIL DESIGN
(3.8)
16X (0.6)
16X (0.25)
4X (1.15)
(0.25) TYP
12X (0.5)
(3.8)
(0.675)
(0.675)
4214978/A 10/2013
WQFN - 0.8 mm max heightRGH0016A
WQFN
NOTES: (continued)
5. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
SYMM
TYP
METAL
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
EXPOSED PAD
78% PRINTED SOLDER COVERAGE BY AREA
SCALE:15X
1
4
58
9
12
13
16
SYMM
MECHANICAL DATA
YPA0010
www.ti.com
TLP10XXX (Rev D)
A
. All linear dimensions are in millimeters. Dimensioning and tolerancing per ASME Y14.5M-1994.
B. This drawing is subject to change without notice.
4215069/A 12/12
NOTES:
0.600
±0.075
E
D
D: Max =
E: Max =
2.124 mm, Min =
1.946 mm, Min =
2.063 mm
1.885 mm
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