SN54LV245A, SN74LV245A OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCLS382N i SEPTEMBER 1997 i REVISED AUGUST 2010 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25C Typical VOHV (Output VOH Undershoot) >2.3 V at VCC = 3.3 V, TA = 25C Support Mixed-Mode Voltage Operation on All Ports SN54LV245A . . . J OR W PACKAGE SN74LV245A . . . DB, DGV, DW, NS, OR PW PACKAGE (TOP VIEW) 19 3 18 4 17 5 VCC OE B1 B2 B3 B4 B5 B6 B7 B8 16 6 15 7 14 8 13 9 12 10 11 A1 A2 A3 A4 A5 A6 A7 A8 20 A2 A1 DIR VCC OE 1 2 19 OE 3 18 B1 4 17 B2 16 B3 5 SN54LV245A . . . FK PACKAGE (TOP VIEW) A3 A4 A5 A6 A7 15 B4 14 B5 6 7 8 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 13 B6 12 B7 9 10 11 B1 B2 B3 B4 B5 A8 GND B8 B7 B6 20 2 VCC 1 JESD 17 ESD Protection Exceeds JESD 22 i 2000-V Human-Body Model (A114-A) i 200-V Machine Model (A115-A) i 1000-V Charged-Device Model (C101) SN74LV245A . . . RGY PACKAGE (TOP VIEW) B8 DIR A1 A2 A3 A4 A5 A6 A7 A8 GND D DIR D Operation D Latch-Up Performance Exceeds 250 mA Per GND D D Ioff Supports Partial-Power-Down Mode description/ordering information These octal bus transceivers are designed for 2-V to 5.5-V VCC operation. ORDERING INFORMATION QFN i RGY SN74LV245ARGYR Tube of 25 SN74LV245ADW Reel of 2000 SN74LV245ADWR SOP i NS Reel of 2000 SN74LV245ANSR 74LV245A SSOP i DB Reel of 2000 SN74LV245ADBR LV245A Tube of 70 SN74LV245APW Reel of 2000 SN74LV245APWRG3 TSSOP i PW i55C to 125C TOP-SIDE MARKING Reel of 1000 SOIC i DW i40C 40C to 85C ORDERABLE PART NUMBER PACKAGE TA LV245A LV245A LV245A Reel of 250 SN74LV245APWT TVSOP i DGV Reel of 2000 SN74LV245ADGVR LV245A VFBGA i GQN Reel of 1000 SN74LV245AGQNR LV245A CDIP i J Tube of 20 SNJ54LV245AJ SNJ54LV245AJ CFP i W Tube of 85 SNJ54LV245AW SNJ54LV245AW LCCC i FK Tube of 55 SNJ54LV245AFK SNJ54LV245AFK Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright (c) 2005, Texas Instruments Incorporated UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 1 SN54LV245A, SN74LV245A OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCLS382N i SEPTEMBER 1997 i REVISED AUGUST 2010 description/ordering information (continued) The 'LV245A devices are designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so the buses are effectively isolated. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. GQN PACKAGE (TOP VIEW) 1 2 3 terminal assignments 4 1 2 3 4 A A A1 DIR VCC OE B B A3 B2 A2 B1 C C A5 A4 B4 B3 D D A7 B6 A6 B5 E E GND A8 B8 B7 FUNCTION TABLE INPUTS OE DIR OPERATION L L B data to A bus L H A data to B bus H X Isolation logic diagram (positive logic) DIR 1 19 A1 2 18 To Seven Other Channels Pin numbers shown are for the DB, DGV, DW, FK, J, NS, PW, RGY, and W packages. 2 OE POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 B1 SN54LV245A, SN74LV245A OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCLS382N i SEPTEMBER 1997 i REVISED AUGUST 2010 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i0.5 V to 7 V Input voltage range, VI: Except I/O ports (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i0.5 V to 7 V I/O ports (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i0.5 V to 7 V Voltage range applied to any output in the high-impedance or power-off state, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i0.5 V to 7 V Output voltage range applied in the high or low state, VO (see Notes 1 and 2) . . . . . . . i0.5 V to VCC + 0.5 V Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i20 mA Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i50 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 mA Package thermal impedance, JA (see Note 3): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70C/W (see Note 3): DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92C/W (see Note 3): DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58C/W (see Note 3): GQN package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78C/W (see Note 3): NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60C/W (see Note 3): PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83C/W (see Note 4): RGY package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i65C to 150C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed. 2. This value is limited to 5.5 V maximum. 3. The package thermal impedance is calculated in accordance with JESD 51-7. 4. The package thermal impedance is calculated in accordance with JESD 51-5. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 3 SN54LV245A, SN74LV245A OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCLS382N i SEPTEMBER 1997 i REVISED AUGUST 2010 recommended operating conditions (see Note 5) SN54LV245A VCC Supply voltage VCC = 2 V VIH High level input voltage High-level MAX 2 5.5 1.5 Low level input voltage Low-level VI Input voltage Output voltage High level output current High-level VCC x 0.7 VCC x 0.7 VCC = 4.5 V to 5.5 V VCC x 0.7 VCC x 0.7 t/v Input transition rise or fall rate 0.5 TA 0.5 VCC x 0.3 VCC x 0.3 VCC = 3 V to 3.6 V VCC x 0.3 VCC x 0.3 VCC x 0.3 5.5 0 5.5 High or low state 0 VCC 0 VCC 3-state 0 5.5 0 5.5 i50 i50 VCC = 2.3 V to 2.7 V i2 i2 VCC = 3 V to 3.6 V i8 i8 i16 i16 50 50 VCC = 2.3 V to 2.7 V 2 2 VCC = 3 V to 3.6 V 8 8 VCC = 4.5 V to 5.5 V 16 16 VCC = 2.3 V to 2.7 V 200 200 VCC = 3 V to 3.6 V 100 100 20 20 i55 Operating free-air temperature 125 V VCC x 0.3 0 VCC = 4.5 V to 5.5 V V V VCC = 2.3 V to 2.7 V VCC = 2 V Low level output current Low-level 5.5 VCC x 0.7 VCC = 4.5 V to 5.5 V IOL 2 UNIT 1.5 VCC x 0.7 VCC = 2 V IOH MAX VCC = 3 V to 3.6 V VCC = 4.5 V to 5.5 V VO MIN VCC = 2.3 V to 2.7 V VCC = 2 V VIL SN74LV245A MIN i40 85 V V A mA A mA ns/V C NOTE 5: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. 4 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 SN54LV245A, SN74LV245A OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCLS382N i SEPTEMBER 1997 i REVISED AUGUST 2010 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) SN54LV245A PARAMETER TEST CONDITIONS VOH MIN MAX MIN 2 V to 5.5 V IOH = i2 mA 2.3 V 2 2 IOH = i8 mA 3V 2.48 2.48 4.5 V 3.8 VCCi0.1 TYP MAX V 3.8 2 V to 5.5 V 0.1 0.1 IOL = 2 mA 2.3 V 0.4 0.4 IOL = 8 mA 3V 0.44 0.44 4.5 V IOL = 16 mA Control inputs VI = 5.5 V or GND IOZ A or B port VO = VCC or GND ICC VI = VCC or GND, Ioff VI or VO = 0 to 5.5 V Ci Control inputs VI = VCC or GND Cio A or B port VO = VCC or GND IO = 0 0.55 0.55 1 1 A 5.5 V 5 5 A 5.5 V 20 20 A 5 A 5 3.3 V 3 3 5V 3 3 3.3 V 5.5 5.5 5V 5.5 5.5 switching characteristics over recommended operating VCC = 2.5 V 0.2 V (unless otherwise noted) (see Figure 1) TO (OUTPUT) tpd A or B B or A ten OE A or B tdis OE tpd A or B ten OE A or B tdis OE A or B V 0 to 5.5 V 0 FROM (INPUT) UNIT VCCi0.1 IOL = 50 A II PARAMETER SN74LV245A TYP IOH = i50 A IOH = i16 mA VOL VCC LOAD CAPACITANCE free-air TA = 25C MIN TYP pF pF temperature SN54LV245A range, SN74LV245A MAX MIN MAX MIN MAX 8.3* 13* 1* 15* 1 15 11.8* 19.9* 1* 22* 1 22 A or B 11.8* 18.1* 1* 20* 1 20 B or A 11.2 15.9 1 18 1 18 14.1 22.7 1 26 1 26 17.6 23.1 1 25 1 25 CL = 15 pF CL = 50 pF tsk(o) 2 UNIT ns ns 2 * On products compliant to MIL-PRF-38535, this parameter is not production tested. switching characteristics over recommended operating VCC = 3.3 V 0.3 V (unless otherwise noted) (see Figure 1) FROM (INPUT) TO (OUTPUT) tpd A or B B or A ten OE A or B tdis OE A or B tpd A or B B or A ten OE A or B tdis OE PARAMETER A or B LOAD CAPACITANCE CL = 15 pF CL = 50 pF free-air TA = 25C MIN temperature SN54LV245A SN74LV245A TYP MAX MIN MAX MIN MAX 5.9* 8.4* 1* 10* 1 10 8.2* 13.2* 1* 15.5* 1 15.5 9.6* 16.5* 1* 19.5* 1 19.5 7.9 11.9 1 13.5 1 13.5 9.9 16.7 1 19 1 19 13.9 19.8 1 22 1 22 tsk(o) 1.5 range, UNIT ns ns 1.5 * On products compliant to MIL-PRF-38535, this parameter is not production tested. PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 5 SN54LV245A, SN74LV245A OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCLS382N i SEPTEMBER 1997 i REVISED AUGUST 2010 switching characteristics over recommended operating VCC = 5 V 0.5 V (unless otherwise noted) (see Figure 1) FROM (INPUT) TO (OUTPUT) tpd A or B B or A ten OE A or B tdis OE tpd A or B ten OE A or B tdis OE A or B PARAMETER LOAD CAPACITANCE free-air TA = 25C MIN SN54LV245A TYP MAX MIN 4.3* 5.5* 5.7* 8.5* A or B 7.8* B or A 5.6 CL = 15 pF CL = 50 pF temperature range, SN74LV245A MAX MIN MAX 1* 6.5* 1 6.5 1* 10.6* 1 10 12.8* 1* 14.7* 1 14.2 7.5 1 8.5 1 8.5 7 10.6 1 12 1 12 10.9 14.7 1 16 1 16 tsk(o) 1 UNIT ns ns 1 * On products compliant to MIL-PRF-38535, this parameter is not production tested. noise characteristics, VCC = 3.3 V, CL = 50 pF, TA = 25C (see Note 6) SN74LV245A PARAMETER MIN TYP MAX UNIT VOL(P) Quiet output, maximum dynamic VOL 0.5 0.8 V VOL(V) Quiet output, minimum dynamic VOL i0.4 i0.8 V VOH(V) Quiet output, minimum dynamic VOH 2.9 VIH(D) High-level dynamic input voltage VIL(D) Low-level dynamic input voltage V 2.31 V 0.99 V UNIT NOTE 6: Characteristics are for surface-mount packages only. operating characteristics, TA = 25C PARAMETER Cpd Power dissipation capacitance TEST CONDITIONS Outputs enabled CL = 50 pF, pF PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. 6 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 f = 10 MHz VCC TYP 3.3 V 20 5V 25 pF SN54LV245A, SN74LV245A OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCLS382N i SEPTEMBER 1997 i REVISED AUGUST 2010 PARAMETER MEASUREMENT INFORMATION VCC From Output Under Test Test Point RL = 1 k From Output Under Test CL (see Note A) S1 Open TEST GND S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open Drain CL (see Note A) Open VCC GND VCC LOAD CIRCUIT FOR 3-STATE AND OPEN-DRAIN OUTPUTS LOAD CIRCUIT FOR TOTEM-POLE OUTPUTS VCC 50% VCC Timing Input tw VCC 50% VCC Input 50% VCC 0V th tsu VCC 50% VCC Data Input 50% VCC 0V 0V VOLTAGE WAVEFORMS PULSE DURATION VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VCC 50% VCC Input 50% VCC tPLH tPHL VOH In-Phase Output 50% VCC tPHL Out-of-Phase Output 0V 50% VCC VOL Output Waveform 1 S1 at VCC (see Note B) VOH 50% VCC VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS 50% VCC 50% VCC 0V tPZL tPLZ VCC 50% VCC tPZH tPLH 50% VCC VCC Output Control Output Waveform 2 S1 at GND (see Note B) VOL + 0.3 V VOL tPHZ 50% VCC VOH i 0.3 V VOH 0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR 1 MHz, ZO = 50 , tr 3 ns, tf 3 ns. D. The outputs are measured one at a time, with one input transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPHL and tPLH are the same as tpd. H. All parameters and waveforms are not applicable to all devices. Figure 1. Load Circuit and Voltage Waveforms POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 7 PACKAGE OPTION ADDENDUM www.ti.com 20-Aug-2011 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) TBD Lead/ Ball Finish (3) Samples (Requires Login) SN74LV245ADBLE OBSOLETE SSOP DB 20 SN74LV245ADBR ACTIVE SSOP DB 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV245ADBRE4 ACTIVE SSOP DB 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV245ADBRG4 ACTIVE SSOP DB 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV245ADGVR ACTIVE TVSOP DGV 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV245ADGVRE4 ACTIVE TVSOP DGV 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV245ADGVRG4 ACTIVE TVSOP DGV 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV245ADW ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV245ADWE4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV245ADWG4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV245ADWR ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV245ADWRE4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV245ADWRG4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV245ANSR ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV245ANSRG4 ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV245APW ACTIVE TSSOP PW 20 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV245APWE4 ACTIVE TSSOP PW 20 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Addendum-Page 1 Call TI MSL Peak Temp Call TI PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 20-Aug-2011 Status (1) Package Type Package Drawing Pins Package Qty 70 Eco Plan (2) Green (RoHS & no Sb/Br) Lead/ Ball Finish MSL Peak Temp (3) SN74LV245APWG4 ACTIVE TSSOP PW 20 SN74LV245APWLE OBSOLETE TSSOP PW 20 SN74LV245APWR ACTIVE TSSOP PW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV245APWRE4 ACTIVE TSSOP PW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV245APWRG3 ACTIVE TSSOP PW 20 2000 Green (RoHS & no Sb/Br) SN74LV245APWRG4 ACTIVE TSSOP PW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV245APWT ACTIVE TSSOP PW 20 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV245APWTE4 ACTIVE TSSOP PW 20 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV245APWTG4 ACTIVE TSSOP PW 20 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LV245ARGYR ACTIVE VQFN RGY 20 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR SN74LV245ARGYRG4 ACTIVE VQFN RGY 20 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR SN74LV245AZQNR ACTIVE BGA MICROSTAR JUNIOR ZQN 20 1000 Green (RoHS & no Sb/Br) TBD Samples (Requires Login) CU NIPDAU Level-1-260C-UNLIM Call TI CU SN SNAGCU Call TI Level-1-260C-UNLIM Level-1-260C-UNLIM (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Addendum-Page 2 PACKAGE OPTION ADDENDUM www.ti.com 20-Aug-2011 Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 3 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 8.2 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 7.5 2.5 12.0 16.0 Q1 SN74LV245ADBR SSOP DB 20 2000 330.0 16.4 SN74LV245ADGVR TVSOP DGV 20 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 SN74LV245ADWR SOIC DW 20 2000 330.0 24.4 10.8 13.0 2.7 12.0 24.0 Q1 SN74LV245ANSR SO NS 20 2000 330.0 24.4 8.2 13.0 2.5 12.0 24.0 Q1 SN74LV245APWR TSSOP PW 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1 SN74LV245APWR TSSOP PW 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1 SN74LV245APWRG3 TSSOP PW 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1 SN74LV245APWRG4 TSSOP PW 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1 SN74LV245APWT TSSOP PW 20 250 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1 SN74LV245ARGYR VQFN RGY 20 3000 330.0 12.4 3.8 4.8 1.6 8.0 12.0 Q1 ZQN 20 1000 330.0 12.4 3.3 4.3 1.6 8.0 12.0 Q1 SN74LV245AZQNR BGA MI CROSTA R JUNI OR Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74LV245ADBR SSOP DB 20 2000 367.0 367.0 38.0 SN74LV245ADGVR TVSOP DGV 20 2000 367.0 367.0 35.0 SN74LV245ADWR SOIC DW 20 2000 367.0 367.0 45.0 SN74LV245ANSR SO NS 20 2000 367.0 367.0 45.0 SN74LV245APWR TSSOP PW 20 2000 367.0 367.0 38.0 SN74LV245APWR TSSOP PW 20 2000 364.0 364.0 27.0 SN74LV245APWRG3 TSSOP PW 20 2000 364.0 364.0 27.0 SN74LV245APWRG4 TSSOP PW 20 2000 367.0 367.0 38.0 SN74LV245APWT TSSOP PW 20 250 367.0 367.0 38.0 SN74LV245ARGYR VQFN RGY 20 3000 367.0 367.0 35.0 SN74LV245AZQNR BGA MICROSTAR JUNIOR ZQN 20 1000 340.5 338.1 20.6 Pack Materials-Page 2 MECHANICAL DATA MPDS006C - FEBRUARY 1996 - REVISED AUGUST 2000 DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE 24 PINS SHOWN 0,40 0,23 0,13 24 13 0,07 M 0,16 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 0-8 1 0,75 0,50 12 A Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,08 14 16 20 24 38 48 56 A MAX 3,70 3,70 5,10 5,10 7,90 9,80 11,40 A MIN 3,50 3,50 4,90 4,90 7,70 9,60 11,20 DIM 4073251/E 08/00 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side. Falls within JEDEC: 24/48 Pins - MO-153 14/16/20/56 Pins - MO-194 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 MECHANICAL DATA MSSO002E - JANUARY 1995 - REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0-8 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. 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