Supertex inc.
Supertex inc. ● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com
HV850
Features
►No external components required when using an
external EL clock frequency
►EL frequency can be set by an external resistor
►Low noise
►DC to AC converter
►Drives up to 5.0nF load (approx. 1.5in2 lamp)
►Output voltage regulation
►Enable function
►EL Lamp dimming
Applications
►Cell phone keypads and displays
►Transceivers
►MP3 players
►Watches
►Pagers
►Measuring instruments/gauges
General Description
The Supertex HV850 is a high voltage electroluminescent
(EL) Lamp Driver IC. It is designed to drive EL lamps of up to
1.5in2, with capacitive values up to 5.0nF. The HV850 converts
a low voltage DC input to a high voltage AC output across an
EL lamp. It uses a charge pump scheme to boost the input
voltage, eliminating the need for external inductors, diodes,
and high voltage capacitors, components commonly found in
conventional topologies.
The charge pump circuit discharges its energy into an EL lamp
through a high voltage H-bridge. Once the voltage reaches
its regulated limit, it is turned off to conserve power. The EL
lamp is then discharged to ground and the H-bridge changes
state to allow the charge pump to charge the EL lamp in the
opposite direction.
The EL lamp frequency can be set either by an external
resistor, REL, or by applying an external clock, where the clock
frequency is divided by 128 to set the EL lamp frequency.
Typical Application Circuits (For VDD = 3.4V to 4.2V only)
High Voltage, Low Noise,
Inductorless EL Lamp Driver
EL lamp frequency
set by an external clock
V
DD
EL Lamp
C
DD
V
DD
+
-
8
7
6
5
VDD
VB
REL
GND
VA
1
2
3
4
EN
CLKIN CLKEN
HV850
V
DD
GND
V
DD
= ON
GND = OFF
EL lamp frequency set by R
EL
V
DD
= ON
GND = OFF
EL Lamp
C
DD
V
DD
+
-
R
EL
8
7
6
5
VDD
VB
REL
GND
VA
1
2
3
4
EN
CLKIN CLKEN
HV850
2
HV850
Supertex inc. ● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com
Ordering Information
Device
Package Options
8-Lead MSOP
3.00x3.00mm body
1.10mm height (max)
0.65mm pitch
HV850 HV850MG-G
-G indicates package is RoHS compliant (‘Green’)
Absolute Maximum Ratings
Parameter Value
VDD, supply voltage -0.5V to 4.5V
Operating temperature -25°C to +85°C
Storage temperature -65°C to +150°C
Power dissipation 300mW
Stresses beyond those listed under “Absolute Maximum Ratings” may
cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond
those indicated in the operational sections of the specications is not implied.
Exposure to absolute maximum rating conditions for extended periods may
affect device reliability.
Pin Conguration
VDD
REL
EN
CLKEN
VB
GND
VA
CLKIN
5
6
7
8
4
3
2
1
Recommended Operating Conditions
Sym Parameter Min Typ Max Units Conditions
VDD Input voltage 3.0 - 4.2 V ---
fEL EL lamp frequency 50 - 500 Hz ---
CLOAD EL lamp capacitance 0 - 5.0 nF ---
TAOperating temperature -25 - +85 OC ---
Electrical Characteristics (Unless otherwise specied VDD = 3.5V, TA = 25°C)
Sym Parameter Min Typ Max Units Conditions
IDDQ Quiescent current - - 150 nA EN = 0V
VA or VBPeak output voltage 63 70 77 V No load.
VA - VBPeak to peak output voltage 126 140 154 V
fEL EL lamp frequency 225 250 275 Hz REL = 1.65MΩ or CLK = 32kHz
IDD Operating current - - 16 mA
See Figure 1, VDD = 3.5V,
REL = 1.5MΩ,
Load = 3.3nF + 1.0kΩ
VA or VBPeak output voltage 54 - 74 V
VA - VBPeak to peak output voltage 108 - 148 V
fEL EL lamp frequency 250 294 338 Hz
tROUT Output voltage rise time 1.5 - - ms fEL= 250Hz, 1in2 lamp, 10 to 90% of nal value
Product Marking
L = Lot Number
YY = Year Sealed
WW = Week Sealed
= “Green” Packaging
H850
LLLL
YYWW
Top Marking
Bottom Marking
8-Lead MSOP (MG)
8-Lead MSOP (MG)
(top view)
Package may or may not include the following marks: Si or
3
HV850
Supertex inc. ● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com
Figure 1: Typical Application Circuit (without Enable function)
Load REL
(MΩ)
VDD
(V)
IDD
(mA)
Peak VA
(V)
fEL
(Hz)
3.3nF + 1.0kΩ 1.5
3.0 8.9 53
2943.5 10.2 61
4.0 10.4 66
Note: CDD = 2.2µF, 6.3V low ESR
Logic Inputs (Unless otherwise specied VDD = 3.5V, TA = 25°C)
Sym Parameter Min Typ Max Units Conditions
VIL Input logic low voltage 0 - 0.5 V ---
VIH Input logic high voltage 2.0 - VDD V ---
IIL Input logic low current - - 1.0 µA ---
IIH Input logic high current - - 1.0 µA ---
ENRISE
Enable input rise time
(for delay turn on) 0.01 - 10 ms
Using external R-C circuit, see Figure 2.
ENFALL
Enable input fall time
(for delay turn off) 10µ - 5.0 s
CIN Logic input capacitance - - 10 pF ---
Block Diagram
Feedback
VDD
REL
VDD
VA
VB
EN
GND
CLKIN
CLKEN
VDD
MOSFET
Full Bridge
EL
Oscillator
High
Voltage
Level
Trans-
lators
Capacitor
Charge
Pump Circuit VSENSE
EL
Lamp
CDD
VDD
+
-
REL
8
7
6
5
VDD
VB
REL
GND
VA
1
2
3
4
EN
CLKIN CLKEN
HV850
4
HV850
Supertex inc. ● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com
VDD = 3.5V, FEL = 250.0Hz; Load = 3.3nF+1.0kΩ; IDD = 9.19mA, CH1 20V/div, 1.0mS/div
Typical Output Waveform
Lamp Size
(in2)
REL
(MΩ)
VDD
(V)
IDD
(mA)
Peak VA
(V)
fEL
(Hz)
Brightness
(cd/m2)
1.0 1.65
3.0 8.4 53
250
7.31
3.5 9.4 62 10.35
4.0 9.9 66 12.62
0.5 2.0
3.0 5.5 62
210
11.54
3.5 5.3 68 14.33
4.0 4.9 68 14.90
1.0 3.3
3.0 5.6 62
128
8.55
3.5 5.4 67 10.29
4.0 5.0 68 10.94
0.5 3.3
3.0 4.6 64
128
8.25
3.5 4.1 68 9.62
4.0 3.8 68 9.95
1.0 4.7
3.0 4.8 64
89
6.02
3.5 4.4 68 7.5
4.0 5.0 68 10.94
Typical Performance
5
HV850
Supertex inc. ● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com
Figure 3: Independent Programmable Output Frequency (fEL) (For VDD = 3.4V to 4.2V only)
Figure 2: Push Button Turn on with Delay Turn off (For VDD = 3.4V to 4.2V only)
EL
Lamp
C
DD
R
EL
+
V
DD
-
C
RC time constant will set
Turn OFF Delay time
Push
button
turn on
8
7
6
5
VDD
VB
REL
GND
VA
1
2
3
4
EN
CLKN CLKEN
HV850
R
EL
Lamp
CDD
+
VDD
-
V
DD
= ON
GND = OFF
V
DD
GND
8
7
6
5
VDD
VB
REL
GND
VA
1
2
3
4
EN
CLKIN CLKEN
HV850
EL Lamp Dimming Using PWM
EL lamp dimming can be achieved by applying a PWM signal to the ENABLE pin. The PWM signal duty cycle is proportional
to the lamp brightness. This is done by pulse skipping the output pulses. The PWM frequency should be kept below the EL
frequency but above 50Hz to avoid ickering.
Figure 4: PWM Dimming Circuit (For VDD = 3.4V to 4.2V only)
EL Lamp
C
DD
V
DD
+
-
R
EL
8
7
6
5
VDD
VB
REL
GND
VA
1
2
3
4
EN
CLKIN CLKEN
HV850
VDD
GND
PWM
Signal
6
HV850
Supertex inc. ● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com
Pin # Pad Description
1 VDD Input supply voltage pin.
2 REL An external resistor to VDD will set the EL lamp frequency. The EL lamp frequency is inversely
proportional to the resistor value.
3 EN
Enable input pin. Logic high will turn the device ON. An external R-C circuit can be added for a
delayed turn off. Logic low will turn the device OFF only for VDD = 3.4V to 4.2V. For VDD lower than
3.4V, logic low will not turn the device OFF.
4CLKIN
Logic input pin. An external logic clock applied to this pin can be used to set the EL lamp frequency
(see Figure 3). This is useful for applications requiring the EL lamp to be synchronized to a system
clock. Connect to ground when not in use.
5CLKEN Logic input pin. Logic high will cause the EL lamp frequency to be set by the CLKIN input. Logic low
will cause the EL lamp frequency to be set by the external REL resistor.
6 GND IC ground pin.
7 VB EL lamp driver output pin. The EL lamp is connected across VA and VB terminals.
8VA EL lamp driver output pin. The EL lamp is connected across VA and VB terminals.
Pin Description
Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives
an adequate “product liability indemnification insurance agreement.” Supertex inc. does not assume responsibility for use of devices described, and limits its liability
to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and
specifications are subject to change without notice. For the latest product specifications refer to the Supertex inc. (website: http//www.supertex.com)
©2011 Supertex inc. All rights reserved. Unauthorized use or reproduction is prohibited.
Supertex inc.
1235 Bordeaux Drive, Sunnyvale, CA
94089
Tel: 408-222-8888
www
.supertex.com
7
HV850
(The package drawing(s) in this data sheet may not reect the most current specications. For the latest package outline
information go to http://www.supertex.com/packaging.html.)
Doc.# DSFP-HV850
D062209
1
8
Seating
Plane
Gauge
Plane
θ
L
L1
L2
E
E1
D
eb
AA2
A1
Seating
Plane
A
A
Top View
Side View View A-A
View B
View B
θ1 (x4)
Note 1
(Index Area
D/2 x E1/2)
Symbol A A1 A2 b D E E1 e L L1 L2 θ θ1
Dimension
(mm)
MIN 0.75* 0.00 0.75 0.22 2.80* 4.65* 2.80*
0.65
BSC
0.40
0.95
REF
0.25
BSC
0O5O
NOM - - 0.85 - 3.00 4.90 3.00 0.60 - -
MAX 1.10 0.15 0.95 0.38 3.20* 5.15* 3.20* 0.80 8O15O
JEDEC Registration MO-187, Variation AA, Issue E, Dec. 2004.
* This dimension is not specied in the JEDEC drawing.
Drawings are not to scale.
Supertex Doc. #: DSPD-8MSOPMG, Version H041309.
Note:
1. A Pin 1 identier must be located in the index area indicated. The Pin 1 identier can be: a molded mark/identier; an embedded metal marker; or
a printed indicator.
8-Lead MSOP Package Outline (MG)
3.00x3.00mm body, 1.10mm height (max), 0.65mm pitch