Supertex inc. HV850 High Voltage, Low Noise, Inductorless EL Lamp Driver Features General Description No external components required when using an external EL clock frequency EL frequency can be set by an external resistor Low noise DC to AC converter Drives up to 5.0nF load (approx. 1.5in2 lamp) Output voltage regulation Enable function EL Lamp dimming The Supertex HV850 is a high voltage electroluminescent (EL) Lamp Driver IC. It is designed to drive EL lamps of up to 1.5in2, with capacitive values up to 5.0nF. The HV850 converts a low voltage DC input to a high voltage AC output across an EL lamp. It uses a charge pump scheme to boost the input voltage, eliminating the need for external inductors, diodes, and high voltage capacitors, components commonly found in conventional topologies. The charge pump circuit discharges its energy into an EL lamp through a high voltage H-bridge. Once the voltage reaches its regulated limit, it is turned off to conserve power. The EL lamp is then discharged to ground and the H-bridge changes state to allow the charge pump to charge the EL lamp in the opposite direction. Applications Cell phone keypads and displays Transceivers MP3 players Watches Pagers Measuring instruments/gauges The EL lamp frequency can be set either by an external resistor, REL, or by applying an external clock, where the clock frequency is divided by 128 to set the EL lamp frequency. Typical Application Circuits (For VDD = 3.4V to 4.2V only) VDD = ON GND = OFF + VDD CDD - 2 REL VB 7 EL Lamp GND 6 4 CLKIN GND - VA 8 HV850 3 EN VDD + VDD 1 VDD CLKEN 5 VDD EL lamp frequency set by an external clock CDD VDD = ON GND = OFF REL 1 VDD VA 8 2 REL VB 7 HV850 3 EN 4 CLKIN EL Lamp GND 6 CLKEN 5 EL lamp frequency set by REL Supertex inc. 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com HV850 Pin Configuration Ordering Information Package Options 8-Lead MSOP Device 3.00x3.00mm body 1.10mm height (max) 0.65mm pitch HV850 VDD 1 8 VA REL 2 7 VB EN 3 HV850MG-G -G indicates package is RoHS compliant (`Green') 6 GND 5 CLKEN CLKIN 4 8-Lead MSOP (MG) (top view) Product Marking Top Marking Absolute Maximum Ratings Parameter H850 LLLL Value VDD, supply voltage -0.5V to 4.5V Operating temperature Bottom Marking -25C to +85C Storage temperature -65C to +150C Power dissipation YYWW 300mW Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. L = Lot Number YY = Year Sealed WW = Week Sealed = "Green" Packaging Package may or may not include the following marks: Si or 8-Lead MSOP (MG) Recommended Operating Conditions Sym Parameter Min Typ Max Units VDD Input voltage 3.0 - 4.2 V --- fEL EL lamp frequency 50 - 500 Hz --- EL lamp capacitance 0 - 5.0 nF --- -25 - +85 O C --- CLOAD TA Operating temperature Electrical Characteristics (Unless otherwise specified V Sym Parameter IDDQ Quiescent current DD = 3.5V, TA = 25C) Min Typ Max Units - - 150 nA VA or VB Peak output voltage 63 70 77 V VA - VB Peak to peak output voltage 126 140 154 V fEL EL lamp frequency 225 250 275 Hz IDD Operating current - - 16 mA VA or VB Peak output voltage 54 - 74 V VA - VB Peak to peak output voltage 108 - 148 V EL lamp frequency 250 294 338 Hz Output voltage rise time 1.5 - - ms fEL tROUT Supertex inc. Conditions Conditions EN = 0V No load. REL = 1.65M or CLK = 32kHz See Figure 1, VDD = 3.5V, REL = 1.5M, Load = 3.3nF + 1.0k fEL= 250Hz, 1in2 lamp, 10 to 90% of final value 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com 2 HV850 Logic Inputs (Unless otherwise specified V Sym Parameter DD = 3.5V, TA = 25C) Min Typ Max Units Conditions VIL Input logic low voltage 0 - 0.5 V --- VIH Input logic high voltage 2.0 - VDD V --- IIL Input logic low current - - 1.0 A --- IIH Input logic high current - - 1.0 A --- ENRISE Enable input rise time (for delay turn on) 0.01 - 10 ms ENFALL Enable input fall time (for delay turn off) 10 - 5.0 s - - 10 pF CIN Using external R-C circuit, see Figure 2. Logic input capacitance --- Block Diagram VDD VDD Capacitor Charge Pump Circuit EN VA VSENSE Feedback VDD CLKIN High Voltage Level Translators VB EL Oscillator CLKEN MOSFET Full Bridge REL GND Figure 1: Typical Application Circuit (without Enable function) + VDD CDD - REL 1 VDD VA 8 2 REL VB 7 HV850 3 EN 4 CLKIN Load 3.3nF + 1.0k EL Lamp GND 6 CLKEN 5 REL VDD IDD Peak VA fEL (M) (V) (mA) (V) (Hz) 3.0 8.9 53 3.5 10.2 61 4.0 10.4 66 1.5 Note: CDD = 2.2F, 6.3V low ESR Supertex inc. 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com 3 294 HV850 Typical Performance Lamp Size REL VDD IDD Peak VA fEL Brightness (in2) (M) (V) (mA) (V) (Hz) (cd/m2) 3.0 8.4 53 3.5 9.4 62 4.0 9.9 66 12.62 3.0 5.5 62 11.54 3.5 5.3 68 4.0 4.9 68 14.90 3.0 5.6 62 8.55 3.5 5.4 67 4.0 5.0 68 10.94 3.0 4.6 64 8.25 3.5 4.1 68 4.0 3.8 68 9.95 3.0 4.8 64 6.02 3.5 4.4 68 4.0 5.0 68 1.0 0.5 1.0 0.5 1.0 1.65 2.0 3.3 3.3 4.7 7.31 250 210 128 128 89 10.35 14.33 10.29 9.62 7.5 10.94 Typical Output Waveform VDD = 3.5V, FEL = 250.0Hz; Load = 3.3nF+1.0k; IDD = 9.19mA, CH1 20V/div, 1.0mS/div Supertex inc. 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com 4 HV850 Figure 2: Push Button Turn on with Delay Turn off (For VDD = 3.4V to 4.2V only) + VDD - CDD REL Push button turn on 1 VDD VA 8 2 REL VB 7 HV850 3 EN C GND 6 4 CLKN R EL Lamp CLKEN 5 RC time constant will set Turn OFF Delay time Figure 3: Independent Programmable Output Frequency (fEL) (For VDD = 3.4V to 4.2V only) + VDD - CDD VDD = ON GND = OFF 1 VDD VA 8 2 REL VB 7 HV850 3 EN GND 6 4 CLKIN VDD EL Lamp CLKEN 5 GND EL Lamp Dimming Using PWM EL lamp dimming can be achieved by applying a PWM signal to the ENABLE pin. The PWM signal duty cycle is proportional to the lamp brightness. This is done by pulse skipping the output pulses. The PWM frequency should be kept below the EL frequency but above 50Hz to avoid flickering. Figure 4: PWM Dimming Circuit (For VDD = 3.4V to 4.2V only) + VDD CDD VDD PWM Signal GND Supertex inc. REL 1 VDD 2 REL HV850 3 EN 4 CLKIN VA 8 VB 7 EL Lamp GND 6 CLKEN 5 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com 5 HV850 Pin Description Pin # Pad Description 1 VDD Input supply voltage pin. 2 REL An external resistor to VDD will set the EL lamp frequency. The EL lamp frequency is inversely proportional to the resistor value. 3 EN Enable input pin. Logic high will turn the device ON. An external R-C circuit can be added for a delayed turn off. Logic low will turn the device OFF only for VDD = 3.4V to 4.2V. For VDD lower than 3.4V, logic low will not turn the device OFF. 4 CLKIN Logic input pin. An external logic clock applied to this pin can be used to set the EL lamp frequency (see Figure 3). This is useful for applications requiring the EL lamp to be synchronized to a system clock. Connect to ground when not in use. 5 CLKEN Logic input pin. Logic high will cause the EL lamp frequency to be set by the CLKIN input. Logic low will cause the EL lamp frequency to be set by the external REL resistor. 6 GND 7 VB EL lamp driver output pin. The EL lamp is connected across VA and VB terminals. 8 VA EL lamp driver output pin. The EL lamp is connected across VA and VB terminals. IC ground pin. Supertex inc. 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com 6 HV850 8-Lead MSOP Package Outline (MG) 3.00x3.00mm body, 1.10mm height (max), 0.65mm pitch D 1 (x4) 8 E E1 Gauge Plane L2 Note 1 (Index Area D/2 x E1/2) L 1 L1 Top View A Seating Plane View B View B A A2 b e A1 Seating Plane View A-A Side View A Note: 1. A Pin 1 identifier must be located in the index area indicated. The Pin 1 identifier can be: a molded mark/identifier; an embedded metal marker; or a printed indicator. Symbol Dimension (mm) A A1 A2 b D E E1 MIN 0.75* 0.00 0.75 0.22 2.80* 4.65* 2.80* NOM - - 0.85 - 3.00 4.90 3.00 MAX 1.10 0.15 0.95 0.38 3.20* 5.15* 3.20* e 0.65 BSC L 0.40 0.60 0.80 L1 0.95 REF L2 0.25 BSC 1 0O 5O - - 8O 15O JEDEC Registration MO-187, Variation AA, Issue E, Dec. 2004. * This dimension is not specified in the JEDEC drawing. Drawings are not to scale. Supertex Doc. #: DSPD-8MSOPMG, Version H041309. (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to http://www.supertex.com/packaging.html.) Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives an adequate "product liability indemnification insurance agreement." Supertex inc. does not assume responsibility for use of devices described, and limits its liability to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications refer to the Supertex inc. (website: http//www.supertex.com) Supertex inc. (c)2011 Supertex inc. All rights reserved. Unauthorized use or reproduction is prohibited. Doc.# DSFP-HV850 D062209 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com 7