Internally Trimmed
Precision IC Multiplier
AD534
Rev. C
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FEATURES
Pretrimmed to ±0.25% maximum 4-quadrant error (AD534L)
All inputs (X, Y, and Z) differential, high impedance for
[(X1 − X2)(Y1 − Y2)/10 V] + Z2 transfer function
Scale factor adjustable to provide up to ×100 gain
Low noise design: 90 μV rms, 10 Hz to10 kHz
Low cost, monolithic construction
Excellent long-term stability
APPLICATIONS
High quality analog signal processing
Differential ratio and percentage computations
Algebraic and trigonometric function synthesis
Wideband, high crest rms-to-dc conversion
Accurate voltage controlled oscillators and filters
Available in chip form
FUNCTIONAL BLOCK DIAGRAM
09675-006
STABLE
REFERENCE
AND BIAS
0.75 ATTEN
TRANSLINEAR
MULTIPLIER
ELEMENT
SF +V
S
–V
S
OUT
X
1
X
2
Y
1
Y
2
Z
1
Z
2
A
V-TO-1
V-TO-1
V-TO-1
HIGH GAIN
OUTPUT
AMPLIFIER
TRANSFER F UNCTION
V
OUT
= A (X
1
– X
2
) (Y
1
– Y
2
)
SF – (Z
1
– Z
2
)
Figure 1.
GENERAL DESCRIPTION
The AD534 is a monolithic laser trimmed four-quadrant multi-
plier divider having accuracy specifications previously found
only in expensive hybrid or modular products. A maximum
multiplication error of ±0.25% is guaranteed for the AD534L
without any external trimming. Excellent supply rejection, low
temperature coefficients and long-term stability of the on-chip
thin film resistors and buried Zener reference preserve accuracy
even under adverse conditions of use. It is the first multiplier to
offer fully differential, high impedance operation on all inputs,
including the Z input, a feature that greatly increases its
flexibility and ease of use. The scale factor is pretrimmed to the
standard value of 10.00 V; by means of an external resistor, this
can be reduced to values as low as 3 V.
The wide spectrum of applications and the availability of several
grades commend this multiplier as the first choice for all new
designs. The AD534J (±1% maximum error), AD534K (±0.5%
maximum), and AD534L (±0.25% maximum) are specified for
operation over the 0°C to +70°C temperature range. The AD534S
(±1% maximum) and AD534T (±0.5% maximum) are specified
over the extended temperature range, −55°C to +125°C. All
grades are available in hermetically sealed TO-100 metal cans
and SBDIP packages. AD534K, AD534S, and AD534T chips are
also available.
AD534
Rev. C | Page 2 of 20
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 7
Thermal Resistance ...................................................................... 7
ESD Caution.................................................................................. 7
Pin Configurations and Function Descriptions ........................... 8
Typical Performance Characteristics ........................................... 10
Functional Description.................................................................. 12
Provides Gain with Low Noise ..................................................... 12
Operation as a Multiplier .......................................................... 12
Operation as a Squarer .............................................................. 13
Operation as a Divider............................................................... 13
Operation as a Square Rooter................................................... 14
Unprecedented Flexibility ......................................................... 14
Applications Information .............................................................. 15
Outline Dimensions....................................................................... 17
Ordering Guide .......................................................................... 18
REVISION HISTORY
4/11—Rev. B to Rev. C
Changes to Features Section, Figure 1, and
General Description Section........................................................... 1
Added Pin Configurations and Function Descriptions
Section................................................................................................ 8
Moved Provides Gain with Low Noise Section .......................... 12
Moved Unprecedented Flexibility Section .................................. 14
Updated Outline Dimensions....................................................... 17
Changes to Ordering Guide .......................................................... 18
AD534
Rev. C | Page 3 of 20
SPECIFICATIONS
TA = 25°C, ±VS = ±15 V, R ≥ 2 kΩ, all minimum and maximum specifications are guaranteed, unless otherwise noted.
Table 1.
AD534J AD534K AD534L
Parameter Min Typ Max Min Typ Max Min Typ Max Unit
MULTIPLIER PERFORMANCE
Transfer Function
2
2121 Z
YYXX
+
−
−
V10
))(( 2
2121 Z
YYXX
+
−
−
V10
))(( 2
2121 Z
YYXX
+
−−
V10
))((
Total Error 1 (−10 V ≤ X, Y ≤ +10 V) ±1.02 ±0.52 ±0.252 %
TA = TMIN to TMAX ±1.5 ±1.0 ±0.5 %
Total Error vs. Temperature ±0.022 ±0.015 ±0.008 %/°C
Scale Factor Error
(SF = 10.000 V Nominal)3 ±0.25 ±0.1 ±0.1 %
Temperature Coefficient of
Scaling Voltage ±0.02 ±0.01 ±0.005 %/°C
Supply Rejection (±15 V ± 1 V) ±0.01 ±0.01 ±0.01 %
Nonlinearity, X (X = 20 V p-p,
Y = 10 V)
±0.4 ±0.2 ±0.32 ±0.10 ±0.122 %
Nonlinearity, Y (Y = 20 V p-p, X = 10 V ±0.2 ±0.1 ±0.12 ±0.005 ±0.12 %
Feedthrough4, X (Y Nulled,
X = 20 V p-p 50 Hz)
±0.3 ±0.15 ±0.32 ±0.05 ±0.122 %
Feedthrough4, Y (X Nulled,
Y = 20 V p-p, 50 Hz)
±0.01 ±0.01 ±0.12 ±0.003 ±0.12 %
Output Offset Voltage ±5 ±302 ±2 ±152 ±2 ±102 mV
Output Offset Voltage Drift 200 100 100 μV/°C
DYNAMICS
Small Signal BW (VOUT = 0.1 rms) 1 1 1 MHz
1% Amplitude Error (CLOAD = 1000 pF) 50 50 50 kHz
Slew Rate (VOUT 20 p-p) 20 20 20 V/μs
Settling Time (to 1%, D VOUT = 20 V) 2 2 2 μs
NOISE
Noise Spectral Density
SF = 10 V 0.8 0.8 0.8 μV/√Hz
SF = 3 V5 0.4 0.4 0.4 μV/√Hz
Wideband Noise
f = 10 Hz to 5 MHz 1 1 1 mV rms
f = 10 Hz to 10 kHz 90 90 90 μV rms
OUTPUT
Output Voltage Swing ±112 ±112 ±112 V
Output Impedance (f ≤ 1 kHz) 0.1 0.1 0.1 Ω
Output Short-Circuit Current
(RL = 0 Ω, TA = TMIN to TMAX) 30 30 30 mA
Amplifier Open-Loop Gain (f = 50 Hz) 70 70 70 dB
INPUT AMPLIFIERS (X, Y, and Z)6
Signal Voltage Range
Differential or Common Mode ±10 ±10 ±10 V
Operating Differential ±12 ±12 ±12 V
Offset Voltage (X, Y) ±5 ±202 ±2 ±102 ±2 ±102 mV
Offset Voltage Drift (X, Y) 100 50 50 μV/°C
Offset Voltage (Z) ±5 ±302 ±2 ±152 ±2 ±102 mV
Offset Voltage Drift (Z) 200 100 100 μV/°C
CMRR 602 80 702 90 702 90 dB
AD534
Rev. C | Page 4 of 20
AD534J AD534K AD534L
Parameter Min Typ Max Min Typ Max Min Typ Max Unit
Bias Current 0.8 2.02 0.8 2.02 0.8 2.02 μA
Offset Current 0.1 0.1 0.05 0.22 μA
Differential Resistance 10 10 10 MΩ
DIVIDER PERFORMANCE
Transfer Function (X1 > X2)
1
21
12 Y
XX
ZZ
+
−
−
)(
)(
V10 1
21
12 Y
XX
ZZ
+
−
−
)(
)(
V10 1
21
12 Y
XX
ZZ
+
−
−
)(
)(
V10
Total Error1
X = 10 V, −10 V ≤ Z ≤ +10 V ±0.75 ±0.35 ±0.2 %
X = 1 V, −1 V ≤ Z ≤ +1 V ±2.0 ±1.0 ±0.8 %
0.1 V ≤ X ≤ 10 V, −10 V ≤ Z ≤ +10 V ±2.5 ±1.0 ±0.8 %
SQUARER PERFORMANCE
Transfer Function
2
21 Z
XX
+
−
V10
)( 2
2
21 Z
XX
+
−
V10
)( 2
2
21 Z
XX
+
−
V10
)( 2
Total Error (−10 V ≤ X ≤ +10 V) ±0.6 ±0.3 ±0.2 %
SQUARE-ROOTER PERFORMANCE
Transfer Function (Z1 ≤ Z2) √(10 V(Z2 – Z1)) + X2 √(10 V(Z2 – Z1)) + X2
√(10 V(Z2 – Z1)) + X2
Total Error1 (1 V ≤ Z ≤ 10 V) ±1.0 ±0.5 ±0.25 %
POWER SUPPLY SPECIFICATIONS
Supply Voltage
Rated Performance ±15 ±15 ±15 V
Operating ±8 ±182 ±8 ±182 ±8 ±182 V
Supply Current
Quiescent 4 62 4 62 4 62 mA
1 Specifications given are percent of full scale, ±10 V (that is, 0.01% = 1 mV).
2 Tested on all production units at final electrical test. Results from those tests are used to calculate outgoing quality levels.
3 Can be reduced down to 3 V using external resistor between –VS and SF.
4 Irreducible component due to nonlinearity; excludes effect of offsets.
5 Using external resistor adjusted to give SF = 3 V.
6 See for definition of sections. Figure 1
AD534
Rev. C | Page 5 of 20
TA = 25°C, ±VS = ±15 V, R ≥ 2 kΩ, all minimum and maximum specifications are guaranteed, unless otherwise noted.
Table 2.
AD534S AD534T
Parameter Min Typ Max Min Typ Max Unit
MULTIPLIER PERFORMANCE
Transfer Function
2
2121 Z
YYXX
+
−
−
V10
))(( 2
2121 Z
YYXX
+
−−
V10
))((
Total Error 1 (−10 V ≤ X, Y ≤ +10 V) ±1.02 ±0.52 %
TA = TMIN to TMAX ±2.02 ±1.0 %
Total Error vs. Temperature ±0.022 ±0.012 %/°C
Scale Factor Error
(SF = 10.000 V Nominal)3 ±0.25 ±0.1 %
Temperature Coefficient of Scaling Voltage ±0.02 ±0.01 %/°C
Supply Rejection (±15 V ± 1 V) ±0.01 ±0.01 %
Nonlinearity, X (X = 20 V p-p, Y = 10 V) ±0.4 ±0.2 ±0.32 %
Nonlinearity, Y (Y = 20 V p-p, X = 10 V ±0.2 ±0.1 ±0.12 %
Feedthrough4, X (Y Nulled,
X = 20 V p-p, 50 Hz) ±0.3 ±0.15 ±0.32 %
Feedthrough4, Y (X Nulled,
Y = 20 V p-p, 50 Hz) ±0.01 ±0.01 ±0.12 %
Output Offset Voltage ±5 ±302 ±2 ±152 mV
Output Offset Voltage Drift 5002 3002 μV/°C
DYNAMICS
Small Signal BW (VOUT = 0.1 rms) 1 1 MHz
1% Amplitude Error (CLOAD = 1000 pF) 50 50 kHz
Slew Rate (VOUT 20 p-p) 20 20 V/μs
Settling Time (to 1%, ΔVOUT = 20 V) 2 2 μs
NOISE
Noise Spectral Density
SF = 10 V 0.8 0.8 μV/√Hz
SF = 3 V5 0.4 0.4 μV/√Hz
Wideband Noise
f = 10 Hz to 5 MHz 1 1 mV/rms
f = 10 Hz to 10 kHz 90 90 μV/rms
OUTPUT
Output Voltage Swing ±112 ±112 V
Output Impedance (f ≤ 1 kHz) 0.1 0.1 Ω
Output Short-Circuit Current (RL = 0 Ω, TA = TMIN to TMAX) 30 30 mA
Amplifier Open-Loop Gain (f = 50 Hz) 70 70 dB
INPUT AMPLIFIERS (X, Y, and Z)6
Signal Voltage Range
Differential or Common Mode ±10 ±10 V
Operating Differential ±12 ±12 V
Offset Voltage (X, Y) ±5 ±202 ±2 ±102 mV
Offset Voltage Drift (X, Y) 100 150 μV/°C
Offset Voltage (Z) ±5 ±302 ±2 ±152 mV
Offset Voltage Drift (Z) 5002 3002 μV/°C
CMRR 602 80 702 90 dB
Bias Current 0.8 2.02 0.8 2.02 μA
Offset Current 0.1 0.1 μA
Differential Resistance 10 10 MΩ
AD534
Rev. C | Page 6 of 20
AD534S AD534T
Parameter Min Typ Max Min Typ Max Unit
DIVIDER PERFORMANCE
Transfer Function (X1 > X2)
1
21
12 Y
XX
ZZ
+
−
−
)(
)(
V10 1
21
12 Y
XX
ZZ
+
−
−
)(
)(
V10
Total Error1
X = 10 V, −10 V ≤ Z ≤ +10 V ±0.75 ±0.35 %
X = 1 V, −1 V ≤ Z ≤ +1 V ±2.0 ±1.0 %
0.1 V ≤ X ≤ 10 V, −10 V ≤ Z ≤ +10 V ±2.5 ±1.0 %
SQUARER PERFORMANCE
Transfer Function
2
21 Z
XX
+
−
V10
)( 2
2
21 Z
XX
+
−
V10
)( 2
Total Error (−10 V ≤ X ≤ +10 V) ±0.6 ±0.3 %
SQUARE-ROOTER PERFORMANCE
Transfer Function (Z1 ≤ Z2) √(10 V(Z2 – Z1)) + X2 √(10 V(Z2 – Z1)) + X2
Total Error1 (1 V ≤ Z ≤ 10 V) ±1.0 ±0.5 %
POWER SUPPLY SPECIFICATIONS
Supply Voltage
Rated Performance ±15 ±15 V
Operating ±8 ±222 ±8 ±222 V
Supply Current
Quiescent 4 62 4 62 mA
1 Specifications given are percent of full scale, ±10 V (that is, 0.01% = 1 mV).
2 Tested on all production units at final electrical test. Results from those tests are used to calculate outgoing quality levels.
3 Can be reduced down to 3 V using external resistor between –VS and SF.
4 Irreducible component due to nonlinearity: excludes effect of offsets.
5 Using external resistor adjusted to give SF = 3 V.
6 See for definition of sections. Figure 1
AD534
Rev. C | Page 7 of 20
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter
AD534J,
AD534K,
AD534L
AD534S,
AD534T
Supply Voltage ±18 V ±22 V
Internal Power Dissipation 500 mW 500 mW
Output Short Circuit to
Ground Indefinite Indefinite
Input Voltages (X1, X2, Y1, Y2,
Z1, Z2) ±VS ±VS
Rated Operating
Temperature Range 0°C to +70°C −55°C to +125°C
Storage Temperature
Range −65°C to +150°C −65°C to +150°C
Lead Temperature Range,
60 sec Soldering 300°C 300°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 4. Thermal Resistance
Package Type θJA θ
JC Unit
10-Pin TO-100 (H-10) 150 25 °C/W
14-Lead SBDIP (D-14) 95 25 °C/W
20-Terminal LCC (E-20-1) 95 25 °C/W
09675-004
Z
1
Z
2
–V
S
+
V
S
Y
2
Y
1
SF
X
2
X
1
OUT
0.076
(1.93)
0.100 (2.54)
5
3
4
8
A
Figure 2. Chip Dimensions and Bonding Diagram
Dimensions shown in inches and (mm)
Contact factory for latest dimensions.
09675-005
+V
S
–V
S
5
0kΩ
1kΩ
TO APPROPRIATE
INPUT TERMINAL
470kΩ
Figure 3. Optional Trimming Configuration
ESD CAUTION
AD534
Rev. C | Page 8 of 20
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
+
V
S
OUT
X1
–V
S
Y1 Y2
SF
X2
Z1
Z2
6
7
8
9
10
34
2
1
5
09675-001
AD534
TOP VIEW
(Not to
Scale)
Figure 4. TO-100 (H-10) Pin Configuration
Table 5. H-10 Package Pin Function Descriptions
Pin No. Mnemonic Description
1 X2 Inverting Differential Input of the X Multiplicand Input.
2 SF Scale Factor Input.
3 Y1 Noninverting Differential Input of the Y Multiplicand Input.
4 Y2 Inverting Differential Input of the Y Multiplicand Input.
5 −VS Negative Supply Rail.
6 Z2 Inverting Differential Input of the Z Reference Input.
7 Z1 Noninverting Differential Input of the Z Reference Input.
8 OUT Product Output.
9 +VS Positive Supply Rail.
10 X1 Noninverting Differential Input of the X Multiplicand Input.
X1
1
X2
2
NC
3
SF
4
+V
S
14
NC
13
OUT
12
Z1
11
NC
5
Z2
10
Y1
6
NC
9
Y2
7
–V
S
8
NC = NO CONNECT. DO NOT
CONNECT TO THIS PIN.
09675-002
AD534
TOP VIEW
(Not to Scale)
Figure 5. TO-100 (D-14) Pin Configuration
Table 6. D-14 Package Pin Function Descriptions
Pin No. Mnemonic Description
1 X1 Noninverting Differential Input of the X Multiplicand Input.
2 X2 Inverting Differential Input of the X Multiplicand Input.
3, 5, 9, 13 NC No Connect. Do not connect to this pin.
4 SF Scale Factor Input.
6 Y1 Noninverting Differential Input of the Y Multiplicand Input.
7 Y2 Inverting Differential Input of the Y Multiplicand Input.
8 −VS Negative Supply Rail.
10 Z2 Inverting Differential Input of the Z Reference Input.
11 Z1 Noninverting Differential Input of the Z Reference Input.
12 OUT Product Output.
14 +VS Positive Supply rail.
AD534
Rev. C | Page 9 of 20
NC = NO CONNECT. DO NOT
CONNECT TO THIS PIN.
09675-003
AD534
TOP VIEW
(Not to Scale)
4
NC
5
NC
6
SF
7
NC
8
NC
18 OUT
17 NC
16 Z1
15 NC
14 Z2
19
NC
20
+VS
1
NC
2
X1
3
X2
13
NC
12
–VS
11
NC
10
Y2
9
Y1
Figure 6. LCC (E-20-1) Pin Configuration
Table 7. E-20-1 Package Pin Function Descriptions
Pin No. Mnemonic Description
1, 4, 5, 7, 8, 11, 13, 15, 17, 19 NC No Connect. Do not connect to this pin.
2 X1 Noninverting Differential Input of the X Multiplicand Input.
3 X2 Inverting Differential Input of the X Multiplicand Input.
6 SF Scale Factor Input.
9 Y1 Noninverting Differential Input of the Y Multiplicand Input.
10 Y2 Inverting Differential Input of the Y Multiplicand Input.
12 −VS Negative Supply Rail.
14 Z2 Inverting Differential Input of the Z Reference Input.
16 Z1 Noninverting Differential Input of the Z Reference Input.
19 OUT Product Output.
20 +VS Positive Supply Rail.
AD534
Rev. C | Page 10 of 20
TYPICAL PERFORMANCE CHARACTERISTICS
Typical at 25°C, with ±VS = ±15 V dc, unless otherwise noted.
14
12
10
8
6
4
8 10121416182
POSITIVE OR NEGATIVE SUPPLY (V)
PEAK POSITIVE OR NEGATIVE SIGNAL (V)
09675-020
0
OUTPUT, R
L
≥ 2kΩ
ALL INPUTS, SF = 10V
Figure 7. Input/Output Signal Range vs. Supply Voltages
800
700
600
500
400
300
200
100
0
–60 –40 –20 0 20 40 60 80 100 120 140
TEMPERATURE (°C)
BIAS CURRENT (nA)
09675-021
SCALING VOLTAGE = 10V
SCALING VOLTAGE = 3V
Figure 8. Bias Current vs. Temperature (X, Y, or Z Input)
09675-022
90
80
70
60
50
30
20
10
FREQUENCY (Hz)
40
0
CMRR (dB)
100 1k 10k 100k 1M
TYPICAL FOR
ALL INPUTS
Figure 9. Common-Mode Rejection Ratio vs. Frequency
09675-023
100
10
1
FREQUENCY (Hz)
0.1
FEEDTHROUGH (mV p-p)
Y-FEEDTHROUGH
X-FEEDTHROUGH
1000
10 100 1k 10k 100k 1M 10M
Figure 10. AC Feedthrough vs. Frequency
09675-024
1.5
1
0.5
FREQUENCY (Hz)
0
NOISE SPECTRAL DENSITY (µV/ Hz)
SCALING VOLTAGE = 10V
SCALING VOLTAGE = 3V
10 100 1k 10k 100k
Figure 11. Noise Spectral Density vs. Frequency
100
90
80
70
60
50
2.5 5.0 7.5 10.0
SCALING VOLTAGE, SF (V)
OUTPUT NOISE VOLTAGE (µV rms)
09675-025
CONDITIONS:
10Hz TO 10kHz BANDWIDTH
Figure 12. Wideband Noise vs. Scaling Voltage
AD534
Rev. C | Page 11 of 20
09675-026
0
–10
FREQUENCY (Hz)
–20
OUTPUT RESPONSE (dB)
0dB = 0.1V RMS, R
L
= 2kΩ
–30
C
L
= 0pF
10
10k 100k 1M 10M
C
L
≤ 1000pF
C
F
≤ 200pF
C
L
≤ 1000pF
C
F
= 0pF
NORMAL
CONNECTION
WITH ×10
FEEDBACK
ATTENUATOR
Figure 13. Frequency Response as a Multiplier
OUTPUT – dB
( )
V
O
V
Z
60
40
20
0
–20
1k 10k 100k
FREQUENCY (Hz)
1M 10M
09675-027
V
X
= 100mV dc
V
Z
= 10mV rms
V
X
= 1V dc
V
Z
= 100mV rms
V
X
= 10V dc
V
Z
= 1V rms
Figure 14. Frequency Response vs. Divider Denominator Input Voltage
AD534
Rev. C | Page 12 of 20
FUNCTIONAL DESCRIPTION
Figure 1 shows a functional block diagram of the AD534. Inputs
are converted to differential currents by three identical voltage-
to-current converters, each trimmed for zero offset. The product
of the X and Y currents is generated by a multiplier cell using
Gilbert’s translinear technique. An on-chip buried Zener
provides a highly stable reference, which is laser trimmed to
provide an overall scale factor of 10 V. The difference between
XY/SF and Z is then applied to the high gain output amplifier.
This permits various closed-loop configurations and dramati-
cally reduces nonlinearities due to the input amplifiers, a
dominant source of distortion in earlier designs.
The effectiveness of the new scheme can be judged from the
fact that, under typical conditions as a multiplier, the nonlinear-
ity on the Y input, with X at full scale (±10 V), is ±0.005% of FS.
Even at its worst point, which occurs when X = ±6.4 V, nonlinear-
ity is typically only ±0.05% of FS. Nonlinearity for signals applied
to the X input, on the other hand, is determined almost entirely
by the multiplier element and is parabolic in form. This error is a
major factor in determining the overall accuracy of the unit and
therefore is closely related to the device grade.
The generalized transfer function for the AD534 is given by
()()
()
21
2121 ZZ
SF
YYXX
AVOUT −−
−−
=
where:
A is the open-loop gain of the output amplifier, typically
70 dB at dc.
X1, Y1, Z1, X2, Y2, and Z2 are the input voltages (full scale = ±SF,
peak = ±1.25 SF).
SF is the scale factor, pretrimmed to 10.00 V but adjustable by
the user down to 3 V.
In most cases, the open-loop gain can be regarded as infinite,
and SF is 10 V. The operation performed by the AD534, can
then be described in terms of the following equation:
(X1 − X2)(Y1 −Y2 ) = 10 V (Z1 − Z2)
The user can adjust SF for values between 10.00 V and 3 V by
connecting an external resistor in series with a potentiometer
between SF and −VS. The approximate value of the total
resistance for a given value of SF is given by the relationship:
SF
SF
RF
S−
=01
k4.5
Due to device tolerances, allowance should be made to vary RSF
by ±25% using the potentiometer. Considerable reduction in
bias currents, noise, and drift can be achieved by decreasing SF.
This has the overall effect of increasing signal gain without the
customary increase in noise. Note that the peak input signal is
always limited to 1.25 SF (that is, ±5 V for SF = 4 V) so the
overall transfer function shows a maximum gain of 1.25. The
performance with small input signals, however, is improved by
using a lower scale factor because the dynamic range of the
inputs is now fully utilized. Bandwidth is unaffected by the use
of this option.
Supply voltages of ±15 V are generally assumed. However,
satisfactory operation is possible down to ±8 V (see Figure 7).
Because all inputs maintain a constant peak input capability of
±1.25 SF, some feedback attenuation is necessary to achieve
output voltage swings in excess of ±12 V when using higher
supply voltages.
PROVIDES GAIN WITH LOW NOISE
The AD534 is the first general-purpose multiplier capable of
providing gains up to ×100, frequently eliminating the need for
separate instrumentation amplifiers to precondition the inputs.
The AD534 can be very effectively employed as a variable gain
differential input amplifier with high common-mode rejection.
The gain option is available in all modes and simplifies the
implementation of many function-fitting algorithms such as
those used to generate sine and tangent. The utility of this
feature is enhanced by the inherent low noise of the AD534:
90 µV rms (depending on the gain), a factor of 10 lower than
previous monolithic multipliers. Drift and feedthrough are also
substantially reduced over earlier designs.
OPERATION AS A MULTIPLIER
Figure 15 shows the basic connection for multiplication. Note
that the circuit meets all specifications without trimming.
09675-007
AD534
+V
S
X
1
X
2
SF
Y
1
Y
2
OUT
Z
1
Z
2
–V
S
+15V
–15V
X INPUT
±10V FS
±
12V P
K
Y
INPUT
±10V FS
±
12V P
K
OPTIONAL SUMMING
INPUT, Z, ±10V PK
OUTPUT, ±12V PK =
(X1 – X
2
) (Y1 – Y
2
)
10V + Z
2
Figure 15. Basic Multiplier Connection
To reduce ac feedthrough to a minimum (as in a suppressed
carrier modulator), apply an external trim voltage (±30 mV
range required) to the X or Y input (see Figure 3). Figure 10
shows the typical ac feedthrough with this adjustment mode.
Note that the Y input is a factor of 10 lower than the X input
and should be used in applications where null suppression is
critical.
The high impedance Z2 terminal of the AD534 can be used to
sum an additional signal into the output. In this mode, the
output amplifier behaves as a voltage follower with a 1 MHz
small signal bandwidth and a 20 V/µs slew rate. This terminal
should always be referenced to the ground point of the driven
system, particularly if this is remote. Likewise, the differential
inputs should be referenced to their respective ground poten-
tials to realize the full accuracy of the AD534.
A much lower scaling voltage can be achieved without any
reduction of input signal range using a feedback attenuator as
shown in Figure 16. In this example, the scale is such that VOUT =
AD534
Rev. C | Page 13 of 20
(X1 – X2)(Y1 – Y2), so that the circuit can exhibit a maximum
gain of 10. This connection results in a reduction of bandwidth
to about 80 kHz without the peaking capacitor CF = 200 pF. In
addition, the output offset voltage is increased by a factor of 10
making external adjustments necessary in some applications.
Adjustment is made by connecting a 4.7 MΩ resistor between
Z1 and the slider of a potentiometer connected across the
supplies to provide ±300 mV of trim range at the output.
09675-008
AD534
+V
S
X
1
X
2
SF
Y
1
Y
2
OUT
Z
1
Z
2
–V
S
+15V
90kΩ
10kΩ
–15V
X INPUT
±10V FS
±12V P
Y INPUT
±10V FS
±12V P
OPTIONAL PEAKING
CAPACITOR C
F
= 200pF
OUTPUT, ±12V PK =
(X
1
– X
2
) (Y
1
– Y
2
)
(SCALE = 1V)
Figure 16. Connections for Scale Factor of Unity
Feedback attenuation also retains the capability for adding a
signal to the output. Signals can be applied to the high impedance
Z2 terminal where they are amplified by +10 or to the common
ground connection where they are amplified by +1. Input signals
can also be applied to the lower end of the 10 kΩ resistor, giving
a gain of −9. Other values of feedback ratio, up to ×100, can be
used to combine multiplication with gain.
Occasionally, it may be desirable to convert the output to a
current into a load of unspecified impedance or dc level. For
example, the function of multiplication is sometimes followed
by integration; if the output is in the form of a current, a simple
capacitor provides the integration function. Figure 17 shows
how this can be achieved. This method can also be applied in
squaring, dividing, and square rooting modes by appropriate
choice of terminals. This technique is used in the voltage
controlled low-pass filter and the differential input voltage-to-
frequency converter shown in the Applications Information
section.
0
9675-009
AD534
+V
S
X
1
X
2
SF
Y
1
Y
2
OUT
Z
1
Z
2
–V
S
X INPUT
±10V FS
±12V PK
Y INPUT
±10V FS
±12V PK
I
OUT
=×
(X
1
– X
2
) (Y
1
– Y
2
)
10V
1
RS
INTEGRATOR
CAPACITOR
(SEE TEXT)
CURRENT-SENSING
RESISTOR, RS, 2kΩ MIN
Figure 17. Conversion of Output to Current
OPERATION AS A SQUARER
Operation as a squarer is achieved in the same fashion as the
multiplier except that the X and Y inputs are used in parallel.
The differential inputs can be used to determine the output
polarity (positive for X1 = Yl and X2 = Y2, negative if either one
of the inputs is reversed). Accuracy in the squaring mode is
typically a factor of 2 better than in the multiplying mode and
the largest errors occurring with small values of output for
input below 1 V.
If the application depends on accurate operation for inputs that
are always less than ±3 V, the use of a reduced value of SF is recom-
mended as described in the Functional Description section.
Alternatively, a feedback attenuator can be used to raise the
output level. This is put to use in the difference-of-squares
application to compensate for the factor of 2 loss involved in
generating the sum term (see Figure 20).
The difference of squares function is also used as the basis for a
novel rms-to-dc converter shown in Figure 27. The averaging
filter is a true integrator, and the loop seeks to zero its input. For
this to occur, (VIN)2 − (VOUT)2 = 0 V (for signals whose period is
well below the averaging time constant). Therefore, VOUT is
forced to equal the rms value of VIN. The absolute accuracy of
this technique is very high; at medium frequencies and for
signals near full scale, it is determined almost entirely by the
ratio of the resistors in the inverting amplifier. The multiplier
scaling voltage affects only open-loop gain. The data shown is
typical of performance that can be achieved with an AD534K,
but even using an AD534J, this technique can readily provide
better than 1% accuracy over a wide frequency range, even for
crest factors in excess of 10.
OPERATION AS A DIVIDER
Figure 18 shows the connection required for division. Unlike
earlier products, the AD534 provides differential operation on
both numerator and denominator, allowing the ratio of two
floating variables to be generated. Further flexibility results
from access to a high impedance summing input to Y1. As with
all dividers based on the use of a multiplier in a feedback loop,
the bandwidth is proportional to the denominator magnitude,
as shown in Figure 14.
AD534
+V
S
X
1
X
2
SF
Y
1
Y
2
OUT
Z
1
Z
2
–V
S
+15V
–15V
X INPUT
(DENOMINATOR)
±10V FS
±12V PK
Z INPUT
(NUMERATOR)
±10V FS
±12V PK
OPTIONAL
SUMMING
INPUT
±10V PK
+
–
OUTPUT, ±12V PK =
10V (Z
2
– Z
1
)
(X
1
– X
2
)+ Y
1
09675-010
Figure 18. Basic Divider Connection
Without additional trimming, the accuracy of the AD534K and
AD534L is sufficient to maintain a 1% error over a 10 V to 1 V
denominator range. This range can be extended to 100:1 by
simply reducing the X offset with an externally generated trim
voltage (range required is ±3.5 mV maximum) applied to the
unused X input (see Figure 3). To trim, apply a ramp of +100 mV
to +V at 100 Hz to both X1 and Z1 (if X2 is used for offset adjust-
ment; otherwise, reverse the signal polarity) and adjust the trim
voltage to minimize the variation in the output
Because the output is near 10 V, it should be ac-coupled for
this adjustment. The increase in noise level and reduction in
bandwidth preclude operation much beyond a ratio of 100 to 1.
AD534
Rev. C | Page 14 of 20
As with the multiplier connection, overall gain can be introduced
by inserting a simple attenuator between the output and Y2
terminal. This option and the differential ratio capability of the
AD534 are used in the percentage computer application shown
in Figure 24. This configuration generates an output propor-
tional to the percentage deviation of one variable (A) with
respect to a reference variable (B), with a scale of 1% per volt.
In contrast to earlier devices, which were intolerant of capacitive
loads in the square root modes, the AD534 is stable with all
loads up to at least 1000 pF. For critical applications, a small
adjustment to the Z input offset (see Figure 3) improves
accuracy for inputs below 1 V.
UNPRECEDENTED FLEXIBILITY
The precise calibration and differential Z input provide a degree
of flexibility found in no other currently available multiplier.
Standard multiplication, division, squaring, square-rooting
(MDSSR) functions are easily implemented while the restriction
to particular input/output polarities imposed by earlier designs
has been eliminated. Signals can be summed into the output,
with or without gain and with either a positive or negative
sense. Many new modes based on implicit function synthesis
have been made possible, usually requiring only external
passive components. The output can be in the form of a current,
if desired, facilitating such operations as integration.
OPERATION AS A SQUARE ROOTER
The operation of the AD534 in the square root mode is shown
in Figure 19. The diode prevents a latching condition, which
may occur if the input momentarily changes polarity. As shown,
the output is always positive; it can be changed to a negative
output by reversing the diode direction and interchanging the X
inputs. Because the signal input is differential, all combinations
of input and output polarities can be realized, but operation is
restricted to the one quadrant associated with each combination
of inputs.
AD534
+V
S
X
1
X
2
SF
Y
1
Y
2
OUT
Z
1
Z
2
–V
S
+15V
–15V
Z INPUT
±10V FS
±12V PK
REVERSE THIS
AND X INPUTS
FOR NEGATIVE
OUTPUTS
R
L
(MUST BE
PROVIDED)
OPTIONAL
SUMMING
INPUT
X
, ±10V PK +
–
09675-011
OUTPUT, ±12V PK =
10V (Z
2
– Z
1
) + X
2
Figure 19. Square-Rooter Connection
AD534
Rev. C | Page 15 of 20
APPLICATIONS INFORMATION
The versatility of the AD534 allows the creative designer to implement a variety of circuits such as wattmeters, frequency doublers, and
automatic gain controls.
09675-012
AD534
+V
S
X
1
X
2
SF
Y
1
Y
2
OUT
Z
1
Z
2
–V
S
+15V
30kΩ
10kΩ
–15V
OUTPUT = A
2
– B
2
10V
A + B
2
A – B
2
A
B
Figure 20. Difference of Squares
09675-013
AD534
+V
S
X
1
X
2
SF
Y
1
Y
2
OUT
Z
1
Z
2
–V
S
+15V
2kΩ39kΩ
1kΩ
SET GAIN
1kΩ
–15V
–
V
S
NOTES
1. GAIN IS × 10 PER VOLT OF
E
C
, ZERO TO × 50.
2
. WIDEBAND (10Hz TO 30kHz) OUTPUT NOISE IS 3mV rms,
TYP CORRESPONDING TO A.F.S. SNR OF 70dB.
3
. NOISE REFERRED TO SIGNAL INPUT, WITH E
C
= ±5V, IS
60µV rms, TYP.
4
. BANDWIDTH IS DC TO 20kHz, –3dB, INDEPENDENT OF GAIN.
CONTROL INPUT,
E
C
, 0V TO ±5V
SIGNAL INPUT,
E
S
, ±5V PK
0.005µF
OUTPUT, ±12V PK = E
C
E
S
0.1V
Figure 21. Voltage-Controlled Amplifier
09675-014
USING CLOSE TOLERANCE RESISTORS AND AD543L,
ACCURACY OF FIT IS WITHIN ±0.5% AT ALL POINTS.
θ IS IN RADIANS.
AD534
+V
S
X
1
X
2
SF
Y
1
Y
2
OUT
Z
1
Z
2
–V
S
+15V
18kΩ
3kΩ
10kΩ
4.7kΩ
4.3kΩ
INPUT, E
θ
0V TO +10V
–15V
WHERE θ = ×
π
2
E
θ
10V
OUTPUT = (10V) sin
θ
Figure 22. Sine Function Generator
09675-015
THE SF PIN OR A Z ATTENUATOR CAN BE USED TO PROVIDE OVERALL
SIGNAL AMPLIFICATION. OPERATION FROM A SINGLE SUPPLY POSSIBLE;
BIAS Y
2
TO V
S
/2.
AD534
+V
S
X
1
X
2
SF
Y
1
Y
2
OUT
Z
1
Z
2
–V
S
+15V
MODULATION
INPUT, ±E
M
C
ARRIER INPUT
E
C
sin ωt
–15V
E
M
10V
OUTPUT = 1 ± E
C
sin ωt
Figure 23. Linear AM Modulator
09675-016
OTHER SCALES, FROM 10% PER VOLT TO 0.1% PER VOLT
CAN BE OBTAINED BY ALTERING THE FEEDBACK RATIO.
AD534
+VS
X1
X2
SF
Y1
Y2
OUT
Z1
Z2
–VS
+15V
9kΩ
1kΩ
B INPUT,
(+
V
E ONLY)
–15V
A – B
B
OUTPUT = (100V)
(1% PER VOLT)
A INPUT (±)
Figure 24. Percentage Computer
09675-017
AD534
+V
S
X
1
X
2
SF
Y
1
Y
2
OUT
Z
1
Z
2
–V
S
+15V
INPUT, Y ±10V FS
–15V
y
1 + y Y
(10V)
OUTPUT, ±5V/PK =
(10V)
WHERE y =
Figure 25. Bridge Linearization Function
AD534
Rev. C | Page 16 of 20
09675-018
AD534
+V
S
X
1
X
2
SF
Y
1
Y
2
OUT
Z
1
Z
2
–V
S
+15V
500Ω
39kΩ
2kΩ
82kΩ
2.2kΩ
–15V
C
ONTROL INPUT,
E
C
100mV TO 10V
+
–
(= R)
ADJ
1kHz
0.01
(= C)
ADJ 8kHz
3pF to 30pF
2
3
7
AD211
+15V
OUTPUT
±15V APPROX.
PINS 5, 6, 8 TO +15V
PINS 1, 4 TO –15V
f = ×
E
C
40
1
CR = 1kHz PER VOLT
WITH VALUES SHOWN
CALIBRATION PROCEDURE:
WITH E
C
= 1.0V, ADJUST POTENTIOMETER TO SET f = 1.000kHz WITH
E
C
= 8.0V, ADJUST TRIMMER CAPACITOR TO SET f = 8.000kHz. LINEARITY
WILL TYPICALLY BE WITHIN ±0.1% OF FS FOR ANY OTHER INPUT.
DUE TO DELAYS IN THE COMPARATOR, THIS TECHNIQUE IS NOT SUITABLE
FOR MAXIMUM FREQUENCIES ABOVE 10kHz. FOR FREQUENCIES ABOVE
10kHz THE AD537 VOLTAGE-TO-FREQUENCY CONVERTER IS RECOMMENDED.
A TRIANGLE-WAVE OF ±5V PK APPEARS ACROSS THE 0.01µF CAPACITOR: IF
USED AS AN OUTPUT, A VOLTAGE-FOLLOWER SHOULD BE INTERPOSED.
Figure 26. Differential Input Voltage-to-Frequency Converter
09675-019
AD534
AD741J
+V
S
X
1
X
2
SF
Y
1
Y
2
OUT
Z
1
Z
2
–V
S
+15V
+15V
10kΩ
10kΩ
10kΩ
20kΩ10kΩ10kΩ
ZERO
ADJ
10MΩ
–15V
10µF
NONPOLAR
10µF SOLID Ta
20kΩ
AD741K
5kΩ
+
RMS + DC
MODE
AC RMS
INPUT
5V RMS FS
±
10V PEA
K
OUTPUT
0V TO 5V
M
A
TCHED TO 0.025
%
CALIBRATION PROCEDURE:
WITH MODE SWITCH IN ‘RMS + DC’ POSITION, APPLY AN INPUT OF +1.00V DC.
ADJUST ZERO UNTIL OUTPUT READS SAME AS INPUT. CHECK FOR INPUTS
OF ±10V; OUTPUT SHOULD BE WITHIN ±0.05% (5mV).
ACCURACY IS MAINTAINED FROM 60Hz TO 100kHz, AND IS TYPICALLY HIGH
BY 0.5% AT 1MHz FOR V
IN
= 4V RMS (SINE, SQUARE, OR TRIANGLULAR-WAVE).
PROVIDED THAT THE PEAK INPUT IS NOT EXCEEDED, CREST FACTORS UP
TO AT LEAST 10 HAVE NO APPRECIABLE EFFECT ON ACCURACY.
INPUT IMPEDANCE IS ABOUT 10kΩ; FOR HIGH (10MΩ) IMPEDANCE, REMOVE
MODE SWITCH AND INPUT COUPLING COMPONENTS.
FOR GUARANTEED SPECIFICATIONS THE AD536A AND AD636 ARE OFFERED
AS A SINGLE PACKAGE RMS-TO-DC CONVERTER.
Figure 27. Wideband, High-Crest Factor, RMS-to-DC Converter
AD534
Rev. C | Page 17 of 20
OUTLINE DIMENSIONS
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
DIMENSIONS PER JEDEC STANDARDS MO-006-AF
0.500 (12.70)
MIN
0.185 (4.70)
0.165 (4.19)
REFERENCE PLANE
0.050 (1.27) MAX
0.040 (1.02) MAX
0.335 (8.51)
0.305 (7.75)
0.370 (9.40)
0.335 (8.51)
0.021 (0.53)
0.016 (0.40)
1
0.034 (0.86)
0.025 (0.64)
0.045 (1.14)
0.025 (0.65)
0.160 (4.06)
0.110 (2.79)
6
2
8
7
5
4
3
0.115
(2.92)
BSC 9
10
0.230 (5.84)
BSC
BASE & SEATING PLANE
36° BSC
022306-A
Figure 28. 10-Pin Metal Header Package [TO-100]
(H-10)
Dimensions shown in inches and (millimeters)
C
ONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
14
17
8
0.310 (7.87)
0.220 (5.59)
PIN 1
0.080 (2.03) MAX
0.005 (0.13) MIN
SEATING
PLANE
0.023 (0.58)
0.014 (0.36)
0.060 (1.52)
0.015 (0.38)
0.200 (5.08)
MAX
0.200 (5.08)
0.125 (3.18) 0.070 (1.78)
0.030 (0.76)
0.100 (2.54)
BSC
0.150
(3.81)
MIN
0.765 (19.43) MAX
0.320 (8.13)
0.290 (7.37)
0.015 (0.38)
0.008 (0.20)
Figure 29. 14-Lead Side-Brazed Ceramic Dual In-Line Package [SBDIP]
(D-14)
Dimensions shown in inches and (millimeters)
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
1
20 4
9
8
13
19
14
3
18
BOTTOM
VIEW
0.028 (0.71)
0.022 (0.56)
45° TYP
0.015 (0.38)
MIN
0.055 (1.40)
0.045 (1.14)
0.050 (1.27)
BSC
0.075 (1.91)
REF
0.011 (0.28)
0.007 (0.18)
R TYP
0.095 (2.41)
0.075 (1.90)
0.100 (2.54) REF
0.200 (5.08)
REF
0.150 (3.81)
BSC
0.075 (1.91)
REF
0.358 (9.09)
0.342 (8.69)
SQ
0.358
(9.09)
MAX
SQ
0.100 (2.54)
0.064 (1.63)
0.088 (2.24)
0.054 (1.37)
022106-A
Figure 30. 20-Terminal Ceramic Leadless Chip Carrier [LCC]
(E-20-1)
Dimensions shown in inches and (millimeters)
AD534
Rev. C | Page 18 of 20
ORDERING GUIDE
Model1 Temperature Range Package Description Package Option
AD534JD 0°C to +70°C 14-Lead Side Brazed Ceramic Dual In-Line Package [SBDIP] D-14
AD534JDZ 0°C to +70°C 14-Lead Side Brazed Ceramic Dual In-Line Package [SBDIP] D-14
AD534KD 0°C to +70°C 14-Lead Side Brazed Ceramic Dual In-Line Package [SBDIP] D-14
AD534KDZ 0°C to +70°C 14-Lead Side Brazed Ceramic Dual In-Line Package [SBDIP] D-14
AD534LD 0°C to +70°C 14-Lead Side Brazed Ceramic Dual In-Line Package [SBDIP] D-14
AD534LDZ 0°C to +70°C 14-Lead Side Brazed Ceramic Dual In-Line Package [SBDIP] D-14
AD534JH 0°C to +70°C 10-Pin Metal Header Package [TO-100] H-10
AD534JHZ 0° C to +70°C 10-Pin Metal Header Package [TO-100] H-10
AD534KH 0°C to +70°C 10-Pin Metal Header Package [TO-100] H-10
AD534KHZ 0°C to +70°C 10-Pin Metal Header Package [TO-100] H-10
AD534LH 0°C to +70°C 10-Pin Metal Header Package [TO-100] H-10
AD534LHZ 0°C to +70°C 10-Pin Metal Header Package [TO-100] H-10
AD534K Chips 0°C to +70°C Chip
AD534SD −55°C to +125°C 14-Lead Side Brazed Ceramic Dual In-Line Package [SBDIP] D-14
AD534SD/883B −55°C to +125°C 14-Lead Side Brazed Ceramic Dual In-Line Package [SBDIP] D-14
AD534TD −55°C to +125°C 14-Lead Side Brazed Ceramic Dual In-Line Package [SBDIP] D-14
AD534TD/883B −55°C to +125°C 14-Lead Side Brazed Ceramic Dual In-Line Package [SBDIP] D-14
AD534SE/883B −55°C to +125°C 20-Terminal Ceramic Leadless Chip Carrier [LCC] E-20-1
AD534TE/883B −55°C to +125°C 20-Terminal Ceramic Leadless Chip Carrier [LCC] E-20-1
AD534SH −55°C to +125°C 10-Pin Metal Header Package [TO-100] H-10
AD534SH/883B −55°C to +125°C 10-Pin Metal Header Package [TO-100] H-10
AD534TH −55°C to +125°C 10-Pin Metal Header Package [TO-100] H-10
AD534TH/883B −55°C to +125°C 10-Pin Metal Header Package [TO-100] H-10
AD534S Chips −55°C to +125°C Chip
AD534T Chips −55°C to +125°C Chip
1 Z = RoHS Compliant Part.
AD534
Rev. C | Page 19 of 20
NOTES
AD534
Rev. C | Page 20 of 20
NOTES
©1977–2011 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D09675-0-4/11(C)