1. General description
The 74LVC595A is an 8-bit serial-in/serial or parallel-out shift register with a storage
register and 3-state outputs. Both the shift and storage register have sep arate clocks.
The input can be driven from either 3.3 Vor 5 V devices. This feature allows the use of
this device in a mixed 3.3 Vand 5 V environment.
This device is fully specified for partial Power-down applications using IOFF.
The IOFF circuitry disables the outpu t, pr eve nting the damaging backflow current through
the device when it is powered down.
Data is shifted on the positive-going transitions of the SHCP input. The data in the shift
register is transferred to the storage register on a positive-going transition of the STCP
input. If both clocks are connected together, the shift register will always be one clock
pulse ahead of the storage register.
The shift register has a serial input (DS) and a serial output (Q7S) for cascading
purposes. It is also provided with asynchronous re set input MR (active LOW) for all 8 shif t
register stages. The storage register has 8 parallel 3-state bus driver outputs. Data in the
storage register appears at the output whenever the output enable input (OE) is LOW.
2. Features and benefits
5 V tolerant inputs/outputs for interfacing with 5 V logic
Wide supply voltage range from 1.2 V to 3.6 V
CMOS low-power consumption
Direct interface with TTL levels
Balanced propagation delays
All inputs have Schmitt-trigger action
Complies with JEDEC standard JESD8-B/JESD36
ESD protection:
HBM JESD22-A114-D exceeds 2000 V
CDM JESD22-C101-C exceeds 1000 V
Specified from 40 C to +85 C and 40 C to +125 C.
3. Applications
Serial-to-parallel data conversion
Remote control holding register
74LVC595A
8-bit serial-in/serial-out or parallel-out shift register; 3-state
Rev. 2 — 20 June 2014 Product data sheet
© Nexperia B.V. 2017. All rights reserved
74LVC595A All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 2 — 20 June 2014 2 of 20
Nexperia 74LVC595A
8-bit serial-in/serial-out or parallel-out shift register; 3-state
4. Ordering information
5. Functional diagram
Table 1. Ordering information
Type number Package
Temperatu re range Name Description Version
74LVC595AD 40 Cto+125C SO16 plastic small outline package; 16 leads;
body width 3.9 mm SOT109-1
74LVC595APW 40 Cto+125C TSSOP16 plastic thin shrink small outline package; 16 leads;
body width 4.4 mm SOT403-1
74LVC595ABQ 40 Cto+125C DHVQFN16 plastic dual in-line compatible thermal enhanced
very thin quad flat package; no leads; 16
terminals; body 2.5 3.5 0.85 mm
SOT763-1
Fig 1. Logic symbol Fig 2. Functional diagram
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© Nexperia B.V. 2017. All rights reserved
74LVC595A All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 2 — 20 June 2014 3 of 20
Nexperia 74LVC595A
8-bit serial-in/serial-out or parallel-out shift register; 3-state
Fig 3. Logic diagra m
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© Nexperia B.V. 2017. All rights reserved
74LVC595A All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 2 — 20 June 2014 4 of 20
Nexperia 74LVC595A
8-bit serial-in/serial-out or parallel-out shift register; 3-state
6. Pinning information
6.1 Pinning
6.2 Pin description
(1) This is not a supply pin. The substrate is attached to this
pad using conductive die attach material. There is no
electrical or mechanical requirement to solder this pad.
However, if it is soldered, the solder land should remain
floating or be connected to GND.
Fig 5. Pin configuration SO16 and TSSOP16 Fig 6. Pin configuration DHVQFN16
74LVC595A
Q1 V
CC
Q2 Q0
Q3 DS
Q4 OE
Q5 STCP
Q6 SHCP
Q7 MR
GND Q7S
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2
3
4
5
6
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8
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Table 2. Pin description
Symbol Pin Description
Q[0:7] 15, 1, 2, 3, 4, 5, 6, 7 parallel data output
GND 8 ground (0 V)
Q7S 9 serial data output
MR 10 master reset (active LOW)
SHCP 11 shift register clock input
STCP 12 storage register clock input
OE 13 output enable input (active LOW)
DS 14 serial data input
VCC 16 supply voltage
© Nexperia B.V. 2017. All rights reserved
74LVC595A All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 2 — 20 June 2014 5 of 20
Nexperia 74LVC595A
8-bit serial-in/serial-out or parallel-out shift register; 3-state
7. Functional description
[1] H = HIGH voltage state;
L = LOW voltage state;
= LOW-to-HIGH transition;
X = don’t care;
NC = no change;
Z = high-impedance OFF-state.
8. Limiting values
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For SO16 packages: above 70 C the value of Ptot derates linearly with 8 mW/K.
For TSSOP16 packages: above 60 C the value of Ptot derates linearly with 5.5 mW/K.
For DHVQFN16 packages: above 60 C the value of Ptot derates linearly with 4.5 mW/K.
Table 3. Function table[1]
Input Output Function
SHCP STCP OE MR DS Q7S Qn
X X L L X L NC a LOW-state on MR only affects the shift register
XL L X L L empty shift register loaded into storage register
X X H L X L Z shift register clear; parallel outputs in high impedance OFF-state
X L H H Q6S NC logic HIGH-state shifted into shift register stage 0. Contents of all
shift register stages shifted through, e.g. previous state of stage 6
(internal Q6S) appears on the serial output (Q7S).
XL H X NC QnS contents of shift register stages (internal QnS) are transferred to
the storage register and parallel output stages
L H X Q6S QnS content s of shift re gi ster shifted through; pre vi o us contents of the
shift register is transferred to the storage register and the parallel
output stages
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
VCC supply voltage 0.5 +6.5 V
IIK input clampi n g cu rre nt VI<0 V 50 - mA
VIinput voltage [1] 0.5 +6.5 V
IOK output clamping current VO>V
CC or VO<0 V - 50 mA
VOoutput voltage 3-state [1] 0.5 6.5 V
output HIGH or LOW state [1] 0.5 VCC +0.5 V
IOoutput current VO=0 VtoV
CC -50 mA
ICC supply cur ren t - 100 mA
IGND ground current 100 - mA
Tstg storage temperature 65 +150 C
Ptot total power dissipation Tamb =40 C to +125 C[2] -500 mW
© Nexperia B.V. 2017. All rights reserved
74LVC595A All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 2 — 20 June 2014 6 of 20
Nexperia 74LVC595A
8-bit serial-in/serial-out or parallel-out shift register; 3-state
9. Recommended operating conditions
10. Static characteristics
Table 5. Recommended operating con ditions
Symbol Parameter Conditions Min Typ Max Unit
VCC supply voltage 1.65 - 3.6 V
functional 1.2 - - V
VIinput voltage 0 - 5.5 V
VOoutput voltage 3-state 0 - 5.5 V
output HIGH or LOW state 0 - VCC V
Tamb ambient temperature 40 - +125 C
t/V input transition rise and fall rate VCC = 1.65 V to 2.7 V 0 - 20 ns/V
VCC = 2.7 V to 3.6 V 0 - 10 ns/V
Table 6. Static characteristics
At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 40 C to +85 C40 C to +125 CUnit
Min Typ[1] Max Min Max
VIH HIGH-level
input voltage VCC = 1.2 V 1.08 - - 1.08 - V
VCC = 1.65 V to 1.95 V 0.65 VCC - - 0.65 VCC -V
VCC = 2.3 V to 2.7 V 1.7 - - 1.7 - V
VCC = 2.7 V to 3.6 V 2.0 - - 2.0 - V
VIL LOW-level
input voltage VCC = 1.2 V - - 0.12 - 0.12 V
VCC = 1.65 V to 1.95 V - - 0.35 VCC -0.35 VCC V
VCC = 2.3 V to 2.7 V - - 0.7 - 0.7 V
VCC = 2.7 V to 3.6 V - - 0.8 - 0.8 V
VOH HIGH-level
output
voltage
VI=V
IH or VIL
IO=100 A;
VCC = 1.65 V to 3.6 V VCC 0.2 - - VCC 0.3 - V
IO=4mA; V
CC = 1.65 V 1.2 - - 1.05 - V
IO=8mA; V
CC = 2.3 V 1.8 - - 1.65 - V
IO=12 mA; VCC = 2.7 V 2.2 - - 2.05 - V
IO=18 mA; VCC = 3.0 V 2.4 - - 2.25 - V
IO=24 mA; VCC = 3.0 V 2.2 - - 2.0 - V
VOL LOW-level
output
voltage
VI=V
IH or VIL
IO= 100 A;
VCC = 1.65 V to 3.6 V - - 0.2 - 0.3 V
IO=4mA; V
CC = 1.65 V - - 0.45 - 0.65 V
IO=8mA; V
CC = 2.3 V - - 0.6 - 0.8 V
IO=12mA; V
CC = 2.7 V - - 0.4 - 0.6 V
IO=24mA; V
CC = 3.0 V - - 0.55 - 0.8 V
IIinput leakage
current VCC = 3.6 V;
VI=5.5VorGND -0.1 5-20 A
© Nexperia B.V. 2017. All rights reserved
74LVC595A All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 2 — 20 June 2014 7 of 20
Nexperia 74LVC595A
8-bit serial-in/serial-out or parallel-out shift register; 3-state
[1] All typical values are measured at VCC = 3.3 V (unless stated otherwise) and Tamb =25C.
[2] For transceivers, the parameter IOZ includes the input leaking current.
11. Dynamic characteristics
IOZ OFF-state
output
current
VI=V
IH or VIL;
VO=5.5VorGND;
VCC =3.6V
[2] -0.110 - 20 A
IOFF power-off
leakage
current
VCC = 0 V; VIor VO= 5.5 V - 0.1 10 - 20 A
ICC supply
current VCC = 3.6 V;
VI=V
CC or GND; IO=0A -0.110 - 40A
ICC additional
supply
current
per input pin;
VCC = 1.65 V to 3.6 V;
VI=V
CC 0.6 V; IO=0A
-5500 -5000A
CIinput
capacitance VCC = 0 V to 3.6 V;
VI=GNDtoV
CC
-5.0- - -pF
Table 6. Static characteristics …continued
At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 40 C to +85 C40 C to +125 CUnit
Min Typ[1] Max Min Max
Table 7. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 13.
Symbol Parameter Conditions 40 C to +85 C40 C to +125 CUnit
Min Typ[1] Max Min Max
tpd propagation delay SHCP to Q7S; see Figure 7 [2]
VCC = 1.2 V - 17.5 - - - ns
VCC = 1.65 V to 1.95 V 2.0 6.6 15.8 2.0 18.2 ns
VCC = 2.3 V to 2.7 V 1.5 4.2 8.1 1.5 9.3 ns
VCC = 2.7 V 1.5 4.7 7.6 1.5 8.7 ns
VCC = 3.0 V to 3.6 V 1.5 4.0 6.7 1.5 7.7 ns
STCP to Qn; see Figure 8 [2]
VCC = 1.2 V - 16.8 - - - ns
VCC = 1.65 V to 1.95 V 2.0 5.8 15.8 2.0 18.2 ns
VCC = 2.3 V to 2.7 V 1.5 3.7 8.1 1.5 9.3 ns
VCC = 2.7 V 1.5 4.0 7.6 1.5 8.7 ns
VCC = 3.0 V to 3.6 V 1.2 3.3 6.7 1.2 7.7 ns
tPHL HIGH to LOW
propagation delay MR to Q7S; see Figure 11
VCC = 1.2 V - 17.3 - - - ns
VCC = 1.65 V to 1.95 V 2.0 6.9 15.8 2.0 18.2 ns
VCC = 2.3 V to 2.7 V 1.5 4.3 8.1 1.5 9.3 ns
VCC = 2.7 V 1.5 4.5 7.6 1.5 8.7 ns
VCC = 3.0 V to 3.6 V 1.2 3.8 6.7 1.2 7.7 ns
© Nexperia B.V. 2017. All rights reserved
74LVC595A All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 2 — 20 June 2014 8 of 20
Nexperia 74LVC595A
8-bit serial-in/serial-out or parallel-out shift register; 3-state
ten enable time OE t o Qn ; see Figure 12 [3]
VCC = 1.2 V - 17.9 - - - ns
VCC = 1.65 V to 1.95 V 2.0 6.4 14.1 2.0 16.2 ns
VCC = 2.3 V to 2.7 V 1.5 4.2 8.0 1.5 9.2 ns
VCC = 2.7 V 1.5 4.5 7.6 1.5 8.7 ns
VCC = 3.0 V to 3.6 V 1.2 3.8 6.7 1.2 7.7 ns
tdis disable time OE to Qn; see Figure 12 [4]
VCC =1.2V - 9.6 - - - ns
VCC = 1.65 V to 1.95 V 2.0 4.9 9.8 2.0 11.2 ns
VCC = 2.3 V to 2.7 V 1.2 2.8 5.8 1.2 6.6 ns
VCC = 2.7 V 1.5 3.7 6.2 1.5 7.1 ns
VCC = 3.0 V to 3.6 V 1.2 3.5 5.7 1.2 6.5 ns
tWpulse width SHCP, STCP HIGH or LOW;
see Figure 7 and Figure 8
VCC = 1.65 V to 1.95 V 6.0 2.5 - 7.0 - ns
VCC = 2.3 V to 2.7 V 5.0 2.0 - 5.5 - ns
VCC = 2.7 V 4.5 1.5 - 5.0 - ns
VCC = 3.0 V to 3.6 V 4.0 1.5 - 4.5 - ns
MR LOW; see Figure 11
VCC = 1.65 V to 1.95 V 5.0 2.0 - 5.5 - ns
VCC = 2.3 V to 2.7 V 4.0 1.5 - 4.5 - ns
VCC = 2.7 V 2.5 1.0 - 3.0 - ns
VCC = 3.0 V to 3.6 V 2.5 1.0 - 3.0 - ns
tsu set-up time DS to SHCP; see Figure 9
VCC = 1.65 V to 1.95 V 5.0 0.4 - 5.5 - ns
VCC = 2.3 V to 2.7 V 4.0 0.1 - 4.5 - ns
VCC = 2.7 V 2.0 0 - 2.5 - ns
VCC = 3.0 V to 3.6 V 2.0 0.1 - 2.5 - ns
MR to STCP; see Figure 10
VCC = 1.65 V to 1.95 V 8.0 3.5 - 8.5 - ns
VCC = 2.3 V to 2.7 V 5.0 2.1 - 5.5 - ns
VCC = 2.7 V 4.0 1.8 - 4.5 - ns
VCC = 3.0 V to 3.6 V 4.0 1.7 - 4.5 - ns
SHCP to STCP; see Figure 8
VCC = 1.65 V to 1.95 V 8.0 3.5 - 8.5 - ns
VCC = 2.3 V to 2.7 V 5.0 2.1 - 5.5 - ns
VCC = 2.7 V 4.0 1.8 - 4.5 - ns
VCC = 3.0 V to 3.6 V 4.0 1.7 - 4.5 - ns
Table 7. Dynamic characteristics …continu ed
Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 13.
Symbol Parameter Conditions 40 C to +85 C40 C to +125 CUnit
Min Typ[1] Max Min Max
© Nexperia B.V. 2017. All rights reserved
74LVC595A All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 2 — 20 June 2014 9 of 20
Nexperia 74LVC595A
8-bit serial-in/serial-out or parallel-out shift register; 3-state
[1] Typical values are measured at Tamb =25C and VCC = 1.8 V, 2.5 V, 2.7 V, and 3.3 V respectively.
[2] tpd is the same as tPLH and tPHL.
[3] ten is the same as tPZH and tPZL.
[4] tdis is the same as tPHZ and tPLZ.
[5] Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
[6] CPD is used to determine the dynamic power dissipation (PDin W).
PD=C
PD VCC2fiN+(CLVCC2fo) where:
fi= input frequency in MHz;
fo= output frequency in MHz;
CL= output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
(CLVCC2fo) = sum of outputs.
thhold time DS to SHCP; see Figure 9
VCC = 1.65 V to 1.95 V 1.5 0.2 - 2.0 - ns
VCC = 2.3 V to 2.7 V 1.5 0.1 - 2.0 - ns
VCC = 2.7 V 1.5 0.1 - 2.0 - ns
VCC = 3.0 V to 3.6 V 1.0 0.2 - 1.5 - ns
trec recovery time MR to SHCP; see Figure 11
VCC = 1.65 V to 1.95 V 5.0 2.7 - 5.5 - ns
VCC = 2.3 V to 2.7 V 4.0 1.5 - 4.5 - ns
VCC = 2.7 V 2.0 1.0 - 2.5 - ns
VCC = 3.0 V to 3.6 V 2.0 1.0 - 2.5 - ns
fmax maximum
frequency SHCP or STCP; see Figure 7
and Figure 8
VCC = 1.65 V to 1.95 V 80 130 - 70 - MHz
VCC = 2.3 V to 2.7 V 100 140 - 90 - MHz
VCC = 2.7 V 110 150 - 100 - MHz
VCC = 3.0 V to 3.6 V 130 180 - 115 - MHz
tsk(o) output skew time VCC = 3.0 V to 3.6 V [5] --1.0- 1.5ns
CPD power dissipation
capacitance VI = GND to VCC [6]
VCC = 1.65 V to 1.95 V - 50 - - - pF
VCC = 2.3 V to 2.7 V - 45 - - - pF
VCC = 3.0 V to 3.6 V - 44 - - - pF
Table 7. Dynamic characteristics …continu ed
Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 13.
Symbol Parameter Conditions 40 C to +85 C40 C to +125 CUnit
Min Typ[1] Max Min Max
© Nexperia B.V. 2017. All rights reserved
74LVC595A All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 2 — 20 June 2014 10 of 20
Nexperia 74LVC595A
8-bit serial-in/serial-out or parallel-out shift register; 3-state
12. Waveforms
Measurement points are given in Table 8.
VOL and VOH are typical output voltage drops that occur with the output load.
Fig 7. The shift clock (SHCP) to serial data output (Q7S) propagation delays, the shift clock pulse width and
maximum shift clock frequency
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Measurement points are given in Table 8.
VOL and VOH are typical output voltage drops that occur with the output load.
Fig 8. The sto rag e clock (STCP) to parallel data output (Qn) propagation delays, the storage clock pulse width
and the shift clock to storage clock set-up time
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9,
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© Nexperia B.V. 2017. All rights reserved
74LVC595A All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 2 — 20 June 2014 11 of 20
Nexperia 74LVC595A
8-bit serial-in/serial-out or parallel-out shift register; 3-state
Measurement points are given in Table 8.
The shaded areas indicate when the input is permitted to change for predictable output performance.
VOL and VOH are typical output voltage drops that occur with the output load.
Fig 9. The data set-up and hold times for the serial data input (DS)
Measurement points are given in Table 8.
VOL and VOH are typical output voltage drops that occur with the output load.
Fig 10. The master reset (MR) to storage clock (STCP) set-up times
001aaf571
MR input
STCP input
Qn outputs
tsu
VM
VI
VI
GND
GND
VOH
VOL
VM
VM
© Nexperia B.V. 2017. All rights reserved
74LVC595A All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 2 — 20 June 2014 12 of 20
Nexperia 74LVC595A
8-bit serial-in/serial-out or parallel-out shift register; 3-state
Measurement points are given in Table 8.
VOL and VOH are typical output voltage drops that occur with the output load.
Fig 11. The master reset (MR) pulse width, the master reset to serial data output (Q7S) propagation delays and
the master reset to shift clock (SHCP) recovery time
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9
2+
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,
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9
0
Measurement points are given in Table 8.
VOL and VOH are typical output voltage drops that occur with the output load.
Fig 12. 3-state enable and disable times
001aae821
tPLZ
tPHZ
outputs
disabled outputs
enabled
VY
VX
outputs
enabled
output
LOW-to-OFF
OFF-to-LOW
output
HIGH-to-OFF
OFF-to-HIGH
OE input
VI
VCC
VM
VOL
VOH
GND
GND
tPZL
tPZH
VM
VM
Table 8. Measurement points
Supply voltage Input Output
VCC VMVMVXVY
VCC <2.7V 0.5 VCC 0.5 VCC VOL 0.15 V VOH 0.15 V
VCC 2.7 V 1.5 V 1.5 V VOL 0.3 V VOH 0.3 V
© Nexperia B.V. 2017. All rights reserved
74LVC595A All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 2 — 20 June 2014 13 of 20
Nexperia 74LVC595A
8-bit serial-in/serial-out or parallel-out shift register; 3-state
Test data is given in Table 9. Definitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
VEXT = External voltage for measuring switching times.
Fig 13. Test circuit for measuring switching times
9090
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W:
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9,
9,
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SRVLWLYH
SXOVH
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9090
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WU
WU
WI
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9&&
9,92
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&/
57
5/
5/
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Table 9. Test data
Supply voltage Input Load VEXT
VItr, tfCLRLtPLH, tPHL tPLZ, tPZL tPHZ, tPZH
1.2 V VCC 2 ns 30 pF 1 kopen 2 VCC GND
1.65 V to 1.95 V VCC 2 ns 30 pF 1 kopen 2 VCC GND
2.3 V to 2.7 V VCC 2 ns 30 pF 500 open 2 VCC GND
2.7V 2.7V 2.5 ns 50 pF 500 open 2 VCC GND
3.0Vto3.6V 2.7V 2.5 ns 50 pF 500 open 2 VCC GND
© Nexperia B.V. 2017. All rights reserved
74LVC595A All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 2 — 20 June 2014 14 of 20
Nexperia 74LVC595A
8-bit serial-in/serial-out or parallel-out shift register; 3-state
13. Package outline
Fig 14. Package outline SOT109-1 (SO16)
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© Nexperia B.V. 2017. All rights reserved
74LVC595A All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 2 — 20 June 2014 15 of 20
Nexperia 74LVC595A
8-bit serial-in/serial-out or parallel-out shift register; 3-state
Fig 15. Package outline SOT403-1 (TSSOP16)
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© Nexperia B.V. 2017. All rights reserved
74LVC595A All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 2 — 20 June 2014 16 of 20
Nexperia 74LVC595A
8-bit serial-in/serial-out or parallel-out shift register; 3-state
Fig 16. Package outline SOT763-1 (DHVQFN16)
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© Nexperia B.V. 2017. All rights reserved
74LVC595A All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 2 — 20 June 2014 17 of 20
Nexperia 74LVC595A
8-bit serial-in/serial-out or parallel-out shift register; 3-state
14. Abbreviations
15. Revision history
Table 10. Abbreviations
Acronym Description
CDM Charged Device Mo del
CMOS Complementary Metal Oxide Semiconductor
DUT Device Under Test
ESD ElectroStatic Discharge
HBM Human Body Model
TTL Transistor-Transistor Logic
Table 11. Revision history
Document ID Release date Data sheet status Change notice Supersedes
74LVC595A v.2 20140620 Product data sheet - 74LVC5 95A v.1
Modifications: The format of this data sheet has been redesigned to comply with the new identity
guidelines of NXP Semiconductors.
Figure note for Figure 6 added.
74LVC595A v.1 20070529 Product data sheet - -
© Nexperia B.V. 2017. All rights reserved
74LVC595A All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 2 — 20 June 2014 18 of 20
Nexperia 74LVC595A
8-bit serial-in/serial-out or parallel-out shift register; 3-state
16. Legal information
16.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of device (s) descr ibed in th is docume nt may have cha nged since this docume nt was publis hed and ma y dif fer in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nexperia.com.
16.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Nexperia does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liab ility for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and tit le. A short data sh eet is intended
for quick reference only and shou ld not be rel ied u pon to cont ain det ailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local Nexperia sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall pre vail.
Product specification The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
Nexperia and its customer, unless Nexperia and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the Nexperia product is
deemed to off er functions and qualities beyond those described in the
Product data sheet.
16.3 Disclaimers
Limited warr a nty and liability — Information in this document is believed to
be accurate and reliable. However, Nexperia does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. Nexperia takes no
responsibility for the content in this document if provided by an inf ormation
source outside of Nexperia.
In no event shall Nexperia be liable for any indirect, incidental,
punitive, special or consequ ential damages (including - wit hout limitatio n - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, Nexperia’s aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of Nexperia.
Right to make changes — Nexperia reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all informa tion supplied prior
to the publication hereof .
Suitability for use — Nexperia products are not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of a Nexperia product can reasonably be expected
to result in perso nal injury, death or severe property or environmental
damage. Nexperia and its suppliers accept no liability for
inclusion and/or use of Nexperia products in such equipment or
applications and ther efore such inclu sion and/or use is at the cu stomer’s own
risk.
Applications — Applications that are described herein for an y of these
products are for illustrative purposes only. Nexperia makes no
representation or warranty tha t such application s will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and ope ration of their applications
and products using Nexperia products, and Nexperia
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the Nexperia
product is suitable and fit for the customer’s applications and
products planned, as well as fo r the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
Nexperia does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessa ry
testing for the customer’s applications and products using Nexperia
products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). Nexperia does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanent ly and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — Nexperia
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nexperia.com/profile/terms, unless otherwise
agreed in a valid written individua l agreement. In case an individual
agreement is concluded only the ter ms and conditions of the respect i ve
agreement shall apply. Nexperia hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of Nexperia products by customer.
No offer to sell or license — Nothing i n this document may be interpreted or
construed as an of fer t o sell product s that is open for accept ance or t he grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contains data from the obj ective specification for product development.
Preliminary [short] dat a sheet Qualification This document cont ains data from the preliminary specification.
Product [short] dat a sheet Production This document contains the product specification.
© Nexperia B.V. 2017. All rights reserved
74LVC595A All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 2 — 20 June 2014 19 of 20
Nexperia 74LVC595A
8-bit serial-in/serial-out or parallel-out shift register; 3-state
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific Nexperia product is automotive qualified,
the product is not suitable for automotive use. It i s neither qua lified nor test ed
in accordance with automotive testing or application requirements. Nexperia
accepts no liability for inclusion and/or use of
non-automotive qualified products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automot ive specifications and standard s, customer
(a) shall use the product without Nexperia’s warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
Nexperia’s specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies Nexperia for any
liability, damages or failed product claims resulting from custome r design and
use of the product for automotive applications beyond Nexperia’s
standard warranty and Nexperia’s product specifications.
Translations — A non-English (translated) versio n of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
16.4 Trademarks
Notice: All referenced b rands, produc t names, service names and trademarks
are the property of their respect i ve ow ners.
17. Contact information
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Nexperia 74LVC595A
8-bit serial-in/serial-out or parallel-out shift register; 3-state
18. Contents
1 General description. . . . . . . . . . . . . . . . . . . . . . 1
2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1
3 Applications. . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
4 Ordering information. . . . . . . . . . . . . . . . . . . . . 2
5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
6 Pinning information. . . . . . . . . . . . . . . . . . . . . . 4
6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4
7 Functional description . . . . . . . . . . . . . . . . . . . 5
8 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5
9 Recommended operating conditions. . . . . . . . 6
10 Static characteristics. . . . . . . . . . . . . . . . . . . . . 6
11 Dynamic characteristics . . . . . . . . . . . . . . . . . . 7
12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
13 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 14
14 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 17
15 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 17
16 Legal information. . . . . . . . . . . . . . . . . . . . . . . 18
16.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 18
16.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
16.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 18
16.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 19
17 Contact information. . . . . . . . . . . . . . . . . . . . . 19
18 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
© Nexperia B.V. 2017. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release:
20 June 2014