CD54AC74, CD74AC74 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET SCHS231D - SEPTEMBER 1998 - REVISED DECEMBER 2002 D D D D D D CD54AC74 . . . F PACKAGE CD74AC74 . . . E OR M PACKAGE (TOP VIEW) AC Types Feature 1.5-V to 5.5-V Operation and Balanced Noise Immunity at 30% of the Supply Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption Balanced Propagation Delays 24-mA Output Drive Current - Fanout to 15 F Devices SCR-Latchup-Resistant CMOS Process and Circuit Design Exceeds 2-kV ESD Protection Per MIL-STD-883, Method 3015 1CLR 1D 1CLK 1PRE 1Q 1Q GND 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 2CLR 2D 2CLK 2PRE 2Q 2Q description/ordering information The 'AC74 dual positive-edge-triggered devices are D-type flip-flops. A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs, regardless of the levels of the other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not related directly to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs. ORDERING INFORMATION PDIP - E 55C to 125C -55C ORDERABLE PART NUMBER PACKAGE TA SOIC - M Tube CD74AC74E Tube CD74AC74M Tape and reel CD74AC74M96 TOP-SIDE MARKING CD74AC74E AC74M CDIP - F Tube CD54AC74F3A CD54AC74F3A Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. FUNCTION TABLE (each flip-flop) INPUTS OUTPUTS PRE CLR CLK D Q Q L H X X H L H L X X L H L L X X H H H H H H L H H L L H H H L X Q0 Q0 This configuration is nonstable; that is, it does not persist when PRE or CLR returns to its inactive (high) level. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 2002, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 1 CD54AC74, CD74AC74 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET SCHS231D - SEPTEMBER 1998 - REVISED DECEMBER 2002 logic diagram, each flip-flop (positive logic) PRE CLK C C C Q TG C C C C D TG TG TG C C C Q CLR absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 0.5 V to 6 V Input clamp current, IIK (VI < 0 or VI > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA Output clamp current, IOK (VO < 0 or VO > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA Package thermal impedance, JA (see Note 2): E package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80C/W M package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 65C to 150C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51-7. 2 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 CD54AC74, CD74AC74 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET SCHS231D - SEPTEMBER 1998 - REVISED DECEMBER 2002 recommended operating conditions (see Note 3) -55C to 125C TA = 25C VCC Supply voltage VIH High-level input voltage UNIT MIN MAX MIN MAX MIN MAX 1.5 5.5 1.5 5.5 1.5 5.5 VCC = 1.5 V VCC = 3 V 1.2 1.2 1.2 2.1 2.1 2.1 VCC = 5.5 V VCC = 1.5 V 3.85 VIL Low-level input voltage VI VO Input voltage 0 Output voltage 0 IOH IOL High-level output current t/v Input transition rise or fall rate 3.85 VCC = 3 V VCC = 5.5 V Low-level output current -40C to 85C V 3.85 0.3 0.3 0.3 0.9 0.9 0.9 1.65 VCC VCC 1.65 0 0 V VCC VCC V 1.65 0 0 VCC VCC V V VCC = 4.5 V to 5.5 V VCC = 4.5 V to 5.5 V -24 -24 -24 mA 24 24 24 mA VCC = 1.5 V to 3 V VCC = 3.6 V to 5.5 V 50 50 50 20 20 20 ns/V NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VCC MIN IOH = -50 A VOH VI = VIH or VIL IOH = -4 mA IOH = -24 mA IOH = -50 mA IOH = -75 mA IOL = 50 A VOL II ICC VI = VIH or VIL VI = VCC or GND VI = VCC or GND, -55C to 125C TA = 25C MAX MIN -40C to 85C MAX MIN 1.5 V 1.4 1.4 1.4 3V 2.9 2.9 2.9 4.5 V 4.4 4.4 4.4 3V 2.58 2.4 2.48 4.5 V 3.94 3.7 3.8 5.5 V UNIT MAX V 3.85 5.5 V 3.85 1.5 V 0.1 0.1 0.1 3V 0.1 0.1 0.1 4.5 V 0.1 0.1 0.1 IOL = 12 mA IOL = 24 mA IOL = 50 mA 3V 0.36 0.5 0.44 4.5 V 0.36 0.5 0.44 IOL = 75 mA 5.5 V 5.5 V 5.5 V IO = 0 5.5 V Ci V 1.65 1.65 0.1 1 1 A 4 80 40 A 10 10 10 pF Test one output at a time, not exceeding 1-second duration. Measurement is made by forcing indicated current and measuring voltage to minimize power dissipation. Test verifies a minimum 50- transmission-line drive capability at 85C and 75- transmission-line drive capability at 125C. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 3 CD54AC74, CD74AC74 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET SCHS231D - SEPTEMBER 1998 - REVISED DECEMBER 2002 timing requirements over recommended operating free-air temperature range, VCC = 1.5 V (unless otherwise noted) -55C to 125C MIN fclock Clock frequency tw Pulse duration tsu Setup time th trec Hold time Recovery time, before CLK -40C to 85C MAX MIN UNIT MAX 9 10 MHz PRE or CLR low 50 44 CLK 56 49 Data 44 39 Data after CLK 0 0 ns CLR or PRE 34 30 ns ns ns PRE or CLR inactive ns timing requirements over recommended operating free-air temperature range, VCC = 3.3 V 0.3 V (unless otherwise noted) (see Figure 1) -55C to 125C MIN fclock -40C to 85C MAX Clock frequency MIN 79 90 PRE or CLR low 5.6 4.9 CLK 6.3 5.5 Data 4.9 4.3 tw Pulse duration tsu Setup time th trec Hold time Data after CLK Recovery time, before CLK CLR or PRE UNIT MAX MHz ns ns PRE or CLR inactive ns 0 0 ns 4.7 4.1 ns timing requirements over recommended operating free-air temperature range, VCC = 5 V 0.5 V (unless otherwise noted) (see Figure 1) -55C to 125C MIN 4 fclock Clock frequency tw Pulse duration tsu Setup time th trec Hold time Data after CLK Recovery time, before CLK CLR or PRE MAX -40C to 85C MIN 110 PRE or CLR low 125 MHz 4 3.5 CLK 4.5 3.9 Data 3.5 3.1 0 0 ns 2.7 2.4 ns PRE or CLR inactive POST OFFICE BOX 655303 UNIT MAX * DALLAS, TEXAS 75265 ns ns ns CD54AC74, CD74AC74 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET SCHS231D - SEPTEMBER 1998 - REVISED DECEMBER 2002 switching characteristics over recommended operating free-air temperature range, VCC = 1.5 V, CL = 50 pF (unless otherwise noted) (see Figure 1) PARAMETER fmax tPLH tPHL tPLH tPHL FROM (INPUT) TO (OUTPUT) -55C to 125C MIN -40C to 85C MAX 9 CLK Q or Q PRE or CLR Q or Q MIN UNIT MAX 10 MHz 125 114 125 114 132 120 144 131 ns ns switching characteristics over recommended operating free-air temperature range, VCC = 3.3 V 0.3 V (unless otherwise noted) (see Figure 1) PARAMETER fmax tPLH tPHL tPLH tPHL FROM (INPUT) TO (OUTPUT) -55C to 125C MIN -40C to 85C MIN 3.5 14 3.6 12.7 3.5 14 3.6 12.7 3.7 14.7 3.8 13.4 4 16.1 4.1 14.6 79 CLK Q or Q PRE or CLR Q or Q UNIT MAX MAX 90 MHz ns ns switching characteristics over recommended operating free-air temperature range, VCC = 5 V 0.5 V (unless otherwise noted) (see Figure 1) PARAMETER fmax tPLH tPHL tPLH tPHL FROM (INPUT) TO (OUTPUT) -55C to 125C MIN -40C to 85C MAX 110 CLK Q or Q PRE or CLR Q or Q MIN UNIT MAX 125 MHz 2.5 10 2.6 9.1 2.5 10 2.6 9.1 2.6 10.5 2.7 9.5 2.9 11.5 3 10.4 ns ns operating characteristics, TA = 25C PARAMETER Cpd TYP Power dissipation capacitance 55 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 UNIT pF 5 CD54AC74, CD74AC74 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET SCHS231D - SEPTEMBER 1998 - REVISED DECEMBER 2002 PARAMETER MEASUREMENT INFORMATION S1 R1 = 500 From Output Under Test 2 x VCC Open GND CL = 50 pF (see Note A) R2 = 500 TEST S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open 2 x VCC GND tw VCC When VCC = 1.5 V, R1 = R2 = 1 k Input 50% VCC 50% VCC 0V LOAD CIRCUIT VOLTAGE WAVEFORMS PULSE DURATION CLR Input VCC Reference Input VCC 50% VCC 50% VCC 0V 0V tsu trec Data 50% Input 10% VCC 50% VCC CLK 90% VOLTAGE WAVEFORMS RECOVERY TIME tf VCC 50% VCC 50% VCC tPLH tPHL 50% 10% 90% 90% tr tPHL Out-of-Phase Output VCC 50% VCC 10% 0 V VOLTAGE WAVEFORMS SETUP AND HOLD AND INPUT RISE AND FALL TIMES 0V In-Phase Output 90% tr 0V Input th 90% VOH 50% VCC 10% VOL tf Output Waveform 1 S1 at 2 x VCC (see Note B) tPLH 50% VCC 10% tf 50% 10% 90% tr VOH VOL VOLTAGE WAVEFORMS PROPAGATION DELAY AND OUTPUT TRANSITION TIMES VCC Output Control 50% VCC 50% VCC 0V tPLZ tPZL 50% VCC tPHZ tPZH Output Waveform 2 S1 at GND (see Note B) VCC 20% VCC VOL 50% VCC VOH 80% VCC 0 V VOLTAGE WAVEFORMS OUTPUT ENABLE AND DISABLE TIMES NOTES: A. CL includes probe and test-fixture capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR 1 MHz, ZO = 50 , tr = 3 ns, tf = 3 ns. Phase relationships between waveforms are arbitrary. D. For clock inputs, fmax is measured with the input duty cycle at 50%. E. The outputs are measured one at a time with one input transition per measurement. F. tPLH and tPHL are the same as tpd. G. tPZL and tPZH are the same as ten. H. tPLZ and tPHZ are the same as tdis. Figure 1. Load Circuit and Voltage Waveforms 6 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI's terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. 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Following are URLs where you can obtain information on other Texas Instruments products and application solutions: Products Applications Amplifiers amplifier.ti.com Audio www.ti.com/audio Data Converters dataconverter.ti.com Automotive www.ti.com/automotive DSP dsp.ti.com Broadband www.ti.com/broadband Interface interface.ti.com Digital Control www.ti.com/digitalcontrol Logic logic.ti.com Military www.ti.com/military Power Mgmt power.ti.com Optical Networking www.ti.com/opticalnetwork Microcontrollers microcontroller.ti.com Security www.ti.com/security Low Power Wireless www.ti.com/lpw Telephony www.ti.com/telephony Video & Imaging www.ti.com/video Wireless www.ti.com/wireless Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright (c) 2007, Texas Instruments Incorporated PACKAGE OPTION ADDENDUM www.ti.com 15-Oct-2009 PACKAGING INFORMATION Orderable Device Status (1) Package Type CD54AC74F3A ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type CD74AC74E ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type CD74AC74EE4 ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type CD74AC74M ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM CD74AC74M96 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM CD74AC74M96E4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM CD74AC74M96G4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM CD74AC74ME4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM CD74AC74MG4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Package Drawing Pins Package Eco Plan (2) Qty Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. 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Addendum-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 11-Mar-2008 TAPE AND REEL INFORMATION *All dimensions are nominal Device CD74AC74M96 Package Package Pins Type Drawing SOIC D 14 SPQ Reel Reel Diameter Width (mm) W1 (mm) 2500 330.0 16.4 Pack Materials-Page 1 A0 (mm) B0 (mm) K0 (mm) P1 (mm) 6.5 9.0 2.1 8.0 W Pin1 (mm) Quadrant 16.0 Q1 PACKAGE MATERIALS INFORMATION www.ti.com 11-Mar-2008 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) CD74AC74M96 SOIC D 14 2500 346.0 346.0 33.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI's terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and applications using TI components. To minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards. TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI. Reproduction of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive business practice. 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Buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications, and acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products and any use of TI products in such safety-critical applications, notwithstanding any applications-related information or support that may be provided by TI. Further, Buyers must fully indemnify TI and its representatives against any damages arising out of the use of TI products in such safety-critical applications. TI products are neither designed nor intended for use in military/aerospace applications or environments unless the TI products are specifically designated by TI as military-grade or "enhanced plastic." Only products designated by TI as military-grade meet military specifications. Buyers acknowledge and agree that any such use of TI products which TI has not designated as military-grade is solely at the Buyer's risk, and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use. TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products are designated by TI as compliant with ISO/TS 16949 requirements. Buyers acknowledge and agree that, if they use any non-designated products in automotive applications, TI will not be responsible for any failure to meet such requirements. Following are URLs where you can obtain information on other Texas Instruments products and application solutions: Products Amplifiers Data Converters DLP(R) Products DSP Clocks and Timers Interface Logic Power Mgmt Microcontrollers RFID RF/IF and ZigBee(R) Solutions amplifier.ti.com dataconverter.ti.com www.dlp.com dsp.ti.com www.ti.com/clocks interface.ti.com logic.ti.com power.ti.com microcontroller.ti.com www.ti-rfid.com www.ti.com/lprf Applications Audio Automotive Broadband Digital Control Medical Military Optical Networking Security Telephony Video & Imaging Wireless www.ti.com/audio www.ti.com/automotive www.ti.com/broadband www.ti.com/digitalcontrol www.ti.com/medical www.ti.com/military www.ti.com/opticalnetwork www.ti.com/security www.ti.com/telephony www.ti.com/video www.ti.com/wireless Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright (c) 2009, Texas Instruments Incorporated