2017-2018 Microchip Technology Inc. DS70005349D-page 613
dsPIC33CK256MP508 FAMILY
PORTx (Input Data for PORTx) ................................ 119
POSxCNTH (Position x Counter High) ..................... 340
POSxCNTL (Position x Counter Low)....................... 340
POSxHLD (Position x Counter Hold) ........................ 341
PTGADJ (PTG Adjust).............................................. 464
PTGBTE (PTG Broadcast Trigger Enable Low) ....... 460
PTGBTEH (PTG Broadcast Trigger
Enable High) ..................................................... 460
PTGC0LIM (PTG Counter 0 Limit)............................ 463
PTGC1LIM (PTG Counter 1 Limit)............................ 463
PTGCON (PTG Control/Status High)........................ 459
PTGCST (PTG Control/Status Low) ......................... 457
PTGHOLD (PTG Hold) ............................................. 461
PTGL0 (PTG Literal 0).............................................. 464
PTGQPTR (PTG Step Queue Pointer) ..................... 465
PTGQUEn (PTG Step Queue n Pointer) .................. 465
PTGSDLIM (PTG Step Delay Limit).......................... 462
PTGT0LIM (PTG Timer0 Limit)................................. 461
PTGT1LIM (PTG Timer1 Limit)................................. 462
PWMEVTy (PWM Event Output Control y)............... 267
QEIxCON (QEIx Control).......................................... 334
QEIxGECH (QEIx Greater Than or Equal
Compare High) ................................................. 350
QEIxGECL (QEIx Greater Than or Equal
Compare Low) .................................................. 350
QEIxICH (QEIx Initialization/Capture High) .............. 348
QEIxICL (QEIx Initialization/Capture Low)................ 348
QEIxIOC (QEIx I/O Control)...................................... 336
QEIxIOCH (QEIx I/O Control High)........................... 337
QEIxLECH (QEIx Less Than or Equal
Compare High) ................................................. 349
QEIxLECL (QEIx Less Than or Equal
Compare Low) .................................................. 349
QEIxSTAT (QEIx Status) .......................................... 338
RCON (Reset Control) ................................................ 93
REFOCONH (Reference Clock Control High) .......... 201
REFOCONL (Reference Clock Control Low)............ 200
RPCON (Peripheral Remapping Configuration) ....... 141
RPINR0 (Peripheral Pin Select Input 0).................... 141
RPINR1 (Peripheral Pin Select Input 1).................... 142
RPINR10 (Peripheral Pin Select Input 10)................ 146
RPINR11 (Peripheral Pin Select Input 11)................ 147
RPINR12 (Peripheral Pin Select Input 12)................ 147
RPINR13 (Peripheral Pin Select Input 13)................ 148
RPINR14 (Peripheral Pin Select Input 14)................ 148
RPINR15 (Peripheral Pin Select Input 15)................ 149
RPINR16 (Peripheral Pin Select Input 16)................ 149
RPINR17 (Peripheral Pin Select Input 17)................ 150
RPINR18 (Peripheral Pin Select Input 18)................ 150
RPINR19 (Peripheral Pin Select Input 19)................ 151
RPINR2 (Peripheral Pin Select Input 2).................... 142
RPINR20 (Peripheral Pin Select Input 20)................ 151
RPINR21 (Peripheral Pin Select Input 21)................ 152
RPINR22 (Peripheral Pin Select Input 22)................ 152
RPINR23 (Peripheral Pin Select Input 23)................ 153
RPINR26 (Peripheral Pin Select Input 26)................ 153
RPINR27 (Peripheral Pin Select Input 27)................ 154
RPINR29 (Peripheral Pin Select Input 29)................ 154
RPINR3 (Peripheral Pin Select Input 3).................... 143
RPINR30 (Peripheral Pin Select Input 30)................ 155
RPINR32 (Peripheral Pin Select Input 32)................ 155
RPINR33 (Peripheral Pin Select Input 33)................ 156
RPINR37 (Peripheral Pin Select Input 37)................ 156
RPINR38 (Peripheral Pin Select Input 38)................ 157
RPINR4 (Peripheral Pin Select Input 4).................... 143
RPINR42 (Peripheral Pin Select Input 42)................ 157
RPINR43 (Peripheral Pin Select Input 43) ............... 158
RPINR44 (Peripheral Pin Select Input 44) ............... 158
RPINR45 (Peripheral Pin Select Input 45) ............... 159
RPINR46 (Peripheral Pin Select Input 46) ............... 159
RPINR47 (Peripheral Pin Select Input 47) ............... 160
RPINR48 (Peripheral Pin Select Input 48) ............... 160
RPINR49 (Peripheral Pin Select Input 49) ............... 161
RPINR5 (Peripheral Pin Select Input 5) ................... 144
RPINR6 (Peripheral Pin Select Input 6) ................... 144
RPINR7 (Peripheral Pin Select Input 7) ................... 145
RPINR8 (Peripheral Pin Select Input 8) ................... 145
RPINR9 (Peripheral Pin Select Input 9) ................... 146
RPOR0 (Peripheral Pin Select Output 0) ................. 162
RPOR1 (Peripheral Pin Select Output 1) ................. 162
RPOR10 (Peripheral Pin Select Output 10) ............. 167
RPOR11 (Peripheral Pin Select Output 11) ............. 167
RPOR12 (Peripheral Pin Select Output 12) ............. 168
RPOR13 (Peripheral Pin Select Output 13) ............. 168
RPOR14 (Peripheral Pin Select Output 14) ............. 169
RPOR15 (Peripheral Pin Select Output 15) ............. 169
RPOR16 (Peripheral Pin Select Output 16) ............. 170
RPOR17 (Peripheral Pin Select Output 17) ............. 170
RPOR18 (Peripheral Pin Select Output 18) ............. 171
RPOR19 (Peripheral Pin Select Output 19) ............. 171
RPOR2 (Peripheral Pin Select Output 2) ................. 163
RPOR20 (Peripheral Pin Select Output 20) ............. 172
RPOR21 (Peripheral Pin Select Output 21) ............. 172
RPOR22 (Peripheral Pin Select Output 22) ............. 173
RPOR23 (Peripheral Pin Select Output 23) ............. 173
RPOR24 (Peripheral Pin Select Output 24) ............. 174
RPOR25 (Peripheral Pin Select Output 25) ............. 174
RPOR26 (Peripheral Pin Select Output 26) ............. 175
RPOR3 (Peripheral Pin Select Output 3) ................. 163
RPOR4 (Peripheral Pin Select Output 4) ................. 164
RPOR5 (Peripheral Pin Select Output 5) ................. 164
RPOR6 (Peripheral Pin Select Output 6) ................. 165
RPOR7 (Peripheral Pin Select Output 7) ................. 165
RPOR8 (Peripheral Pin Select Output 8) ................. 166
RPOR9 (Peripheral Pin Select Output 9) ................. 166
SENTxCON1 (SENTx Control 1).............................. 419
SENTxDATH (SENTx Receive Data High)............... 423
SENTxDATL (SENTx Receive Data Low) ................ 423
SENTxSTAT (SENTx Status) ................................... 421
SLPxCONH (DACx Slope Control High) .................. 327
SLPxCONL (DACx Slope Control Low).................... 328
SLPxDAT (DACx Slope Data) .................................. 330
SPIxCON1H (SPIx Control 1 High) .......................... 380
SPIxCON1L (SPIx Control 1 Low)............................ 378
SPIxCON2L (SPIx Control 2 Low)............................ 382
SPIxIMSKH (SPIx Interrupt Mask High) ................... 387
SPIxIMSKL (SPIx Interrupt Mask Low)..................... 386
SPIxSTATH (SPIx Status High)................................ 385
SPIxSTATL (SPIx Status Low) ................................. 383
SR (CPU STATUS) ............................................ 34, 106
T1CON (Timer1 Control) .......................................... 426
TRISx (Output Enable for PORTx) ........................... 119
UxBRG (UARTx Baud Rate) .................................... 362
UxBRGH (UARTx Baud Rate High) ......................... 362
UxINT (UARTx Interrupt) .......................................... 371
UxMODE (UARTx Configuration) ............................. 354
UxMODEH (UARTx Configuration High) .................. 356
UxP1 (UARTx Timing Parameter 1) ......................... 364
UxP2 (UARTx Timing Parameter 2) ......................... 365
UxP3 (UARTx Timing Parameter 3) ......................... 366
UxP3H (UARTx Timing Parameter 3 High) .............. 366
UxRXCHK (UARTx Receive Checksum).................. 368