2001-2012 Microchip Technology Inc. DS21425C-page 1
TC4467/TC4468/TC4469
Features
High Peak Output Current: 1.2 A
Wide Operating Range:
- 4.5 V to 18 V
Symmetrical Rise/Fall Times: 25 nsec
Short, Equal Delay Times: 75 nsec
Latch-proof. Will Withstand 500 mA Inductive
Kickback
3 Input Logic Choices:
- AND / NAND / AND + Inv
ESD Protection on All Pins: 2 kV
Applications
General Purpose CMOS Logic Buffer
Driving All Four MOSFETs in an H-Bridge
Dir ect Smal l Motor Dr iver
Relay or Peripheral Drivers
CCD Driver
Pin-Switching Network Driver
Package Types
General Description
The TC4467/TC4468/TC4469 devices are a family of
four-output CMOS buffers/MOSFET drivers with 1.2 A
peak drive capability. Unlike other MOSFET drivers,
these devices have two inputs for each output. The
inputs are co nfi gure d as lo gic ga tes: NAND ( TC44 67),
AND (TC4468) and AND/INV (TC4469).
The TC44 67/TC4468/TC 4469 drivers c an continuou sly
source up to 250 mA into ground referenced loads.
These devices are ideal for direct driving low current
motors or driving MOSFETs in a H-br idge confi guration
for higher current motor drive (see Section 5.0 for
det ai ls ). Having the lo gic ga tes o nbo ard the dri ver ca n
help to reduce component count in many designs.
The TC4467/TC4468/TC4469 devices are very robust
and highly latch-up resistant. They can tolerate up to
5 V of noise spiking on the ground line and can handle
up to 0.5 A of reverse current on the driver outputs.
The TC4467/4468/4469 devices are available in
commercial, indu strial and milit ary temperature ranges.
1
2
3
4
5
6
7
8
16
13
12
11
10
9
1A
1B
2A
2B
3A
3B
GND
GND
VDD
1Y
2Y
3Y
4Y
4B
4A
VDD
15
14
TC4467
TC4468
TC4469
16-Pin SOIC (Wide)
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1A
1B
2A
2B
3A
3B
GND
VDD
1Y
2Y
3Y
4Y
4B
4A
TC4467
TC4468
TC4469
14-Pin PDIP/CERDIP
Logic-Input CMOS Quad Drivers
TC4467/TC4468/TC4469
DS21425C-page 2 2001-2012 Microchip Technology Inc.
Logic Diagrams
TC4468TC4467
Output
TC446X
VDD
14
7
1Y
13
1
2
1B
1A
2Y
12
3
4
2B
2A
3Y
11
5
6
3B
3A
4Y
10
8
9
4B
4A
GND
TC4469
14
7
1Y
13
1
2
1B
1A
2Y
12
3
4
2B
2A
3Y
11
5
6
3B
3A
4Y
10
8
9
4B
4A
14
7
1Y
13
1
2
1B
1A
2Y
12
3
4
2B
2A
3Y
11
5
6
3B
3A
4Y
10
8
9
4B
4A
GND
VDD VDD VDD
6
GND
2001-2012 Microchip Technology Inc. DS21425C-page 3
TC4467/TC4468/TC4469
1.0 ELECTRICAL
CHARACTERISTICS
Absolute Maximum Ratings†
Supply Voltage...............................................................+20 V
Input Voltage.............................(GND – 5 V) to (VDD + 0.3 V)
Package Power Dissipation: (TA 70°C)
PDIP................. ............. ...... ............. ...... ............800 mW
CERDIP ....... ............. ............ ............. ............. ...840 mW
SOIC .......... ...... ............. ...... ............. ...... ............760 mW
Package Thermal Resistance:
CERDIP RJ-A...................................................100°C/W
CERDIP RJ-C.....................................................23°C/W
PDIP RJ-A ..........................................................80°C/W
PDIP RJ-C ..........................................................35°C/W
SOIC RJ-A..........................................................95°C/W
SOIC RJ-C..........................................................28°C/W
Operating Temperature Range:
C Version ...................................................0°C to +70°C
E Version.................................................- 40°C to +85°C
M Version..............................................-55°C to +125°C
Maximum Chip Temperature.......................................+150°C
Storage Temperature Range.........................-65°C to +150°C
†Notice: Stresses above those listed under "Maximum
Ratings" may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at
those or any other conditions above those indicated in the
operation listings of this specification is not implied. Exposure
to maximum rating conditions for extended periods may affect
device reliability.
ELECTRICAL SPECIFICATIONS
Electrical Characteristics: Unless otherwise noted, TA = +25°C, with 4.5 V VDD18 V.
Parameters Sym Min Typ Max Units Conditions
Input
Logic 1, High Input Voltage VIH 2.4 VDD VNote 3
Logic 0, Low Input Voltage VIL ——0.8VNote 3
Input Current IIN -1.0 +1.0 µA 0 VVINVDD
Output
High Output V oltage VOH VDD0.025 V ILOAD = 100 µA (Note 1)
Low Output Voltage VOL ——0.15VI
LOAD = 10 mA (Note 1)
Output Resistance RO—1015IOUT = 10 mA, VDD = 18 V
Peak Output Current IPK —1.2A
Continuous Output Current IDC 300 mA Single Output
500 Total Package
Latch-Up Protection Withstand
Reverse Current I 500 mA 4.5 VVDD 16 V
Swit c h in g Tim e ( N o t e 1 )
Rise Time tR 15 25 nsec Figure 4-1
Fall Time tF 15 25 nsec Figure 4-1
Delay Time tD1 40 75 nsec Figure 4-1
Delay Time tD2 40 75 nsec Figure 4-1
Power Supply
Power Supply Current IS—1.54mA
Power Supply Volt age VDD 4.5 18 V Note 2
Note 1: Totem pole outputs should not be paralleled because the propagation delay differences from one to the other could cause one driver to
drive high a few nanoseconds before another. The resulting current spike, although short, may decrease the life of the device. Switching
times are ensured by design.
2: When driving all four outputs simultaneously in the same direction, VDD will be limited to 16 V. This reduces the chance that internal dv/dt
will cause high-power dissipation in the device.
3: The input threshold has approximately 50 mV of hysteresis centered at approximately 1.5 V. Input rise times should be kept below 5 µsec
to avoid high internal peak currents during input transitions. Static input levels should also be maintained above the maximum, or below
the minimum, input levels specified in the "Electrical Characteristics" to avoid increased power dissipation in the device.
TC4467/TC4468/TC4469
DS21425C-page 4 2001-2012 Microchip Technology Inc.
ELECTR ICAL SPECIFICATIONS (OPE RATING TEMPERATURES)
TRUTH TABLE
Electrical Characteristics: Unless otherwise noted, over operating temperature range with 4.5 V VDD18 V.
Parameters Sym Min Typ Max Units Conditions
Input
Logic 1, High Input Voltage VIH 2.4 V Note 3
Logic 0, Low Input Voltage VIL ——0.8VNote 3
Input Current IIN -10 10 µA 0 VVINVDD
Output
High Output V oltage VOH VDD0.025 V ILOAD = 100 µA (Note 1)
Low Output Voltage VOL 0.30 V ILOAD = 10 mA (Note 1)
Output Resistance RO—2030IOUT = 10 mA, VDD = 18 V
Peak Output Current IPK —1.2A
Continuous Output Current IDC 300 mA Single Output
500 Total Package
Latch-Up Protection Withstand
Reverse Current I 500 mA 4.5 VVDD 16 V
Swit c h in g Tim e ( N o t e 1 )
Rise Time tR 15 50 nsec Figure 4-1
Fall Time tF 15 50 nsec Figure 4-1
Delay Time tD1 40 100 nsec Figure 4-1
Delay Time tD2 40 100 nsec Figure 4-1
Power Supply
Power Supply Current IS——8mA
Power Supply Volt age VDD 4.5 18 V Note 2
Note 1: Totem pole outputs should not be paralleled because the propagation delay differences from one to the other could cause one driver to
drive high a few nanoseconds before another. The resulting current spike, although short, may decrease the life of the device. Switching
times are ensured by design.
2: When driving all four outputs simultaneously in the same direction, VDD will be limited to 16 V. This reduces the chance that internal dv/dt
will cause high-power dissipation in the device.
3: The input threshold has approximately 50 mV of hysteresis centered at approximately 1.5 V. Input rise times should be kept below 5 µsec
to avoid high internal peak currents during input transitions. Static input levels should also be maintained above the maximum, or below
the minimum, input levels specified in the "Electrical Characteristics" to avoid increased power dissipation in the device.
Part No. TC4467 NAND TC4468 AND TC4469 AND/INV
Inputs A HHLLHHLLHHLL
Inputs B HLHLHLHLHLHL
Outputs TC446XLHHHHLLLLHLL
Legend: H = High L = Low
2001-2012 Microchip Technology Inc. DS21425C-page 5
TC4467/TC4468/TC4469
2.0 TYPICAL PERFORMANCE CURVES
Note: TA = +25°C, with 4.5 V VDD18 V.
FIGURE 2-1: Rise Time vs. Supply
Voltage.
FIGURE 2-2: Rise Time vs. Capacitive
Load.
FIGURE 2-3: Rise/Fall Times vs.
Temperature.
FIGURE 2-4: Fall Time vs. Supply
Voltage.
FIGURE 2-5: Fall Time vs. Capacitive
Load.
FIGURE 2-6: Propagation Delay Time vs.
Supply Voltage.
Note: The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are pro vided for informational purposes only. The performanc e characteristics listed herein are
not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
14
0
12
0
1
00
80
60
4
0
2
0
0
5
7
9
11
1
3
1
5
17
1
9
2200 pF
0
p
p
1600
pF
1000
pF
470
pF
100
pF
t
R
I
S
E
(
nsec
)
V
SU
PPL
Y
(
V
)
14
0
12
0
1
00
80
60
4
0
2
0
0
1
00
1
000
10
,
00
0
10 V
15 V
V
V
V
5
V
t
R
I
S
E
(
nsec
)
C
L
O
A
D
(
pF
)
0
-
50
TIME
(
nsec
)
5
1
0
1
5
2
0
2
5
-2
5
0
2
5
50
7
5
1
00
12
5
t
FALL
tRISE
V
SU
PPL
Y
= 17.
5
V
C
L
O
A
D
= 470
pF
TEMPERATURE
(
°
C
)
14
0
12
0
1
00
80
60
4
0
2
0
0
3
5
7
9
11
1
3
1
5
17
1
9
p
100
pF
470
pF
1000
pF
1500
pF
2200
pF
t
FALL
(
nsec
)
V
SU
PPL
Y
(V
)
14
0
12
0
1
00
80
60
4
0
2
0
0
100
0
0
1
000
10
,
00
0
V
V
V
5
V
10 V
15 V
t
FALL
(
nsec
)
C
L
O
A
D
(
pF
)
0
4
D
ELAY TIME
(
nsec
)
2
0
4
0
60
80
8
1
2
1
4
1
6
1
8
6
1
0
V
SU
PPL
Y
(
V
)
t
t
D1
t
D2
C
C
L
O
A
D
4
70
pF
=
4
TC4467/TC4468/TC4469
DS21425C-page 6 2001-2012 Microchip Technology Inc.
2.0 TYPICAL PERFORMANCE CURVES (CONTINUED)
Note: TA = +25°C, with 4.5 V VDD18 V.
FIGURE 2-7: Input Amplitude vs. Delay
Times.
FIGURE 2-8: Quiescent Supply Current
vs. Supply Voltage.
FIGURE 2-9: High-State Output
Resistance.
FIGURE 2-10: Propagation Delay Times
vs. Temperatures.
FIGURE 2-11: Quiescent Supply Current
vs. Temperature.
FIGURE 2-12: Low-State Output
Resistance.
14
0
12
0
1
00
80
60
4
0
2
0
0
1
9
1
0
D
ELAY TIME
(
nsec
)
2
3
4
5
6
7
8
INP
U
T FALLIN
G
INP
U
T RI
S
IN
G
V
DRIVE
(
V
)
t
D1
tD2
V
DD
V
=
12 V
0
4
0
.
5
1.
0
1.
5
2.
0
2.
5
6
8
1
0
12
14
1
6
1
8
OU
TP
U
T
S
=
1
OUTPUTS = 0
V
SU
PPL
Y
(V
)
I
Q
UIESCENT
(
mA
)
0
4
6
8
1
0
12
14
1
6
1
8
V
SU
PPL
Y
(
V
)
5
1
0
1
5
2
0
2
5
30
35
R
D
S
(
ON
)
(
Ω
)
T
J
= +1
50
°
C
TJ = +25°C
7
0
2
0
1
00
12
0
D
ELAY TIME
(
nsec
)
-4
0
-2
0
0
2
0
4
0
60
80
30
4
0
50
60
-
60
°
C
)
V
DD
= 17.
5
V
= 470
pF
V
IN
t
D1
t
D2
3
.
5
0
1
00
12
0
-4
0
-2
0
0
2
0
4
0
60
80
3
.
0
2.
5
2.
0
1.
5
1.
0
0
.
5
OU
TP
U
T
S
=
1
OUTPUTS = 0
-
60
I
Q
UIESCENT
(mA)
T
J
U
N
C
TI
ON
(
°
C
)
V
V
DD
= 17.
5
V
0
4
6
8
1
0
1
2
1
4
1
6
1
8
5
1
0
1
5
2
0
2
5
30
35
V
SU
PPLY
(
V
)
R
D
S
(
ON
)
(
Ω
)
T
J
= +150
°
C
T
J
= +2
5
°
C
2001-2012 Microchip Technology Inc. DS21425C-page 7
TC4467/TC4468/TC4469
2.0 TYPICAL PERFORMANCE CURVES (CONTINUED)
Note: (Load on single output only).
FIGURE 2-13: Su ppl y Curr ent vs.
Capacitive Load .
FIGURE 2-14: Su ppl y Curr ent vs.
Capacitive Load .
FIGURE 2-15: Su ppl y Curr ent vs.
Capacitive Load .
FIGURE 2-16: Supply Current vs.
Frequency.
FIGURE 2-17: Supply Current vs.
Frequency.
FIGURE 2-18: Supply Current vs.
Frequency.
60
0
1
00
1
000
10
,
00
0
50
4
0
30
2
0
1
0
2MH
Hz
1 MHz
1 MHz
1MH
50
00
kH
z
2
00
kH
z
2
0
kH
z
I
SU
PPL
Y
(
mA
)
C
L
O
A
D
(
pF
)
V
DD
= 1
8
V
60
1
00
1
000
10
,
00
0
50
4
0
30
2
0
1
0
2 MHz
2 MHz
1 MHz
5
00
kH
z
2
00
kH
z
2
0
kH
z
C
L
O
A
D
(
pF
)
I
SU
PPLY
(
mA
)
V
DD
V
=
12 V
60
50
4
0
30
2
0
1
0
0
1
00
1
000
10
,
00
0
1 MHz
500
kH
z
2
00
kH
z
2
0
kH
z
2 MHz
I
SU
PPLY
(
mA
)
C
L
O
A
D
(p
F
)
V
V
DD
V
=
6
V
60
0
1
00
1
000
FREQUENCY
(
kHz
)
50
4
0
30
2
0
1
0
2200
pF
1
1
000
pF
p
100
pF
1
0
10
,
00
0
V
DD
= 1
8
V
I
SU
PPLY
(
mA
)
60
0
1
0
1
00
FREQUENCY
(
kHz
)
50
4
0
30
2
0
1
0
1
000
2200
pF
p
p
1000
pF
100
pF
10
,
00
0
I
SU
PPLY
(
mA
)
V
DD
V
=
12 V
60
0
1
0
1
000
1
00
FREQUENCY
(
kHz
)
50
4
0
30
2
0
1
0
2200
pF
1000
pF
100
pF
10
,
00
0
I
SU
PPLY
(
mA
)
V
V
DD
=
6
V
TC4467/TC4468/TC4469
DS21425C-page 8 2001-2012 Microchip Technology Inc.
3.0 PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 3-1.
TABLE 3-1: PIN FUNCTION TABLE
14-Pin PDIP,
CERDIP 16-Pin SOIC
(Wide) Description
Symbol Symbol
1A 1A Input A for Driver 1, TTL/CMOS Compatible Input
1B 1B Input B for Driver 1, TTL/CMOS Compatible Input
2A 2A Input A for Driver 2, TTL/CMOS Compatible Input
2B 2B Input B for Driver 2, TTL/CMOS Compatible Input
3A 3A Input A for Driver 3, TTL/CMOS Compatible Input
3B 3B Input B for Driver 3, TTL/CMOS Compatible Input
GND GND Ground
GND Ground
4A 4A Input A for Driver 4, TTL/CMOS Compatible Input
4B 4B Input B for Driver 4, TTL/CMOS Compatible Input
4Y 4Y Output for Driver 4, CMOS Push-Pull Output
3Y 3Y Output for Driver 3, CMOS Push-Pull Output
2Y 2Y Output for Driver 2, CMOS Push-Pull Output
1Y 1Y Output for Driver 1, CMOS Push-Pull Output
VDD VDD Supply Input, 4.5 V to 18 V
—V
DD Supply Input, 4.5 V to 18 V
2001-2012 Microchip Technology Inc. DS21425C-page 9
TC4467/TC4468/TC4469
4.0 DETAILED DESCRIPTION
4.1 Suppl y Bypassing
Large currents are required to charge and discharge
large ca pac itive loads quick ly. For exam ple, c harging a
1000 pF load to 18 V in 25 nsec requires 0.72 A from
the devic e' s power supply.
To ensure low supply im pedance over a wide frequency
range, a 1 µF film capacitor in parallel with one or two
low-inductance, 0.1 µF ceramic disk capacitors with
short lead le ngths (<0.5 in.) normall y provide adequa te
bypassing.
4.2 Grounding
The TC4467 and TC4469 contain inverting drivers.
Potential drops developed in common ground
impedances from input to output will appear as
negative feedback and degrade switching speed
characteristics. Instead, individual ground returns for
input and output circuits, or a ground plane, should be
used.
4.3 I nput Stage
The input voltage level changes the no-load or
quiescent supply current. The N-channel MOSFET
input stage transistor drives a 2.5 mA current source
load. Wit h logic “0” outpu ts, maximum quiescent supply
current is 4 mA. Logic “1” output level signals reduce
quiescent current to 1.4 mA, maximum. Unused driver
inputs must be connected to VDD or VSS. Minimum
power dissipation occurs for logic “1” outputs.
The drivers are designed with 50 mV of hysteresis,
which provides clean transitions and minimizes output
stage curren t sp iki ng wh en c ha ngi ng s tates. Inpu t vo lt-
age thresholds are approximately 1.5 V, making any
voltage greater than 1.5 V, up to VDD, a logic “1” input.
Input current is less than 1 µA over this range.
4.4 Power Dissipation
The supply current versus frequency and supply
current versus capacitive load characteristic curves will
aid in determining power dissipation calculations.
Microchip Technology's CMOS drivers have greatly
reduced quiescent DC power consumption.
Input signal duty cycle, power supply voltage and load
type in fluence p ackage pow er dissipat ion. Given power
dissipation and package thermal resistance, the maxi-
mum ambient operating temperature is easily
calculated. The 14-pin plastic package junction-to-
ambient thermal resistance is 83.3°C/W. At +70°C, the
package is rated at 800 mW maximum dissipation.
Maximum allowable chip temperature is +150°C.
Three components make up total package power
dissipation:
1. Load-caused dissipation (PL).
2. Quiescent power (PQ).
3. Trans ition power (P T).
A cap aciti ve-loa d-caused diss ipa tion (d rivin g MOSFET
gates), i s a d irect f unctio n of fre quenc y, cap acitive load
and supply voltage. The power dissipation is:
EQUATION
A resistive-load-caused dissipation for ground-
referenced loads is a function of duty cycle, load
current and load voltage. The power dissipation is:
EQUATION
PLfCVS
2
=
VSSupply Voltage=
C Capacitive Load=
f Switching Frequency=
PLDV
SVL
IL
=
ILLoad Current=
DDuty Cycle=
VSSupply V oltage=
VLLoad Voltage=
TC4467/TC4468/TC4469
DS21425C-page 10 2001-2012 Microchip Technology Inc.
A resistive-load-caused dissipation for supply-
referenced loads is a function of duty cycle, load
current and output voltage. The power dissipation is
EQUATION
Quiescent power dissipation depends on input signal
duty cycle. Logic HIGH outputs result in a lower power
dissipation mode, with only 0.6 mA total current drain
(all devices driven). Logic LOW outputs raise the
current to 4 mA maximum. The quiescent power
dissipation is :
EQUATION
Transition power dissipation arises in the complimen-
tary configuration (TC446X) because the output stage
N-channel and P-channel MOS transistors are ON
simultaneously for a very short period when the output
changes. The transition power dissipation is
approximately:
EQUATION
Package power dissipation is the sum of load,
quiescent and transition power dissipations. An
example shows the relative magnitude for each term:
Maximum operating temperature is:
EQUATION
FIGURE 4-1: Switching Time Test Circuit.
PLDVOIL
=
ILLoad Current=
VODevice Output Voltage=
D Duty Cycle=
PQVSDI
H
 1DIL
+=
ILQuiescent Current with all outputs HIGH=
IHQuiescent Current with all outputs LOW=
D Duty Cycle=
VSSupp ly Voltage=
(4 mA max.)
(0.6 mA max.)
Note: Ambient operating temperature should not
exceed +85°C for "EJD" device or +125°C
for "MJD" device.
PTfVs10 10 9
=
VS15 V=
C 100 0 pF C ap ac iti ve Loa d=
D50%=
f200kHz=
PDPackage Power Dissipation=
PLPQPT
++=
45mW 35mW 30mW++=
110mW=
TJJA PD
141C=
JA Junction-to-ambient thernal resistance=
TJMaximum allowable junction temperature=
(+150C
(83.3C/W) 14 -pin pla s tic package
VOUT
470 pF
1B
1A
2B
2A
3B
3A
4B
4A
F Film 0.1 µF Ceramic
90%
10%
10% 10%
90%
+5 V
Input
(A, B)
VDD
Output
0V
0V
90%
1
2
3
4
5
6
8
9
7
10
11
12
13
14
VDD
tR
tD1 tF
tD2
Input: 100 kHz,
square wave,
tRISE = tFALL 10 nsec
2001-2012 Microchip Technology Inc. DS21425C-page 11
TC4467/TC4468/TC4469
5.0 APPLICATIONS INFORMATION
FIGURE 5-1: Stepper Motor Drive.
FIGURE 5-2: Quad Driver For H-bridge Motor Control.
+12 V
14
TC4469
13
12
11
10
7
9
8
6
5
4
3
2
1Red
Gray
Yel
Blk
Motor
B
A
Airpax
#M82102-P2
7.5/Step
5
13
+5 V to +15 V
14
TC4469
Direction
PWM Speed
18 V
Fwd
13
12
11
10
7
9
8
6
5
4
3
2
1
Rev
Motor
M
TC4467/TC4468/TC4469
DS21425C-page 12 2001-2012 Microchip Technology Inc.
6.0 PACKAGING INFORMATION
6.1 Package Marking Information
14-Lead PDIP (300 mil) Example:
14-Lead CERDIP (300 mil) Example:
16-Lead SOIC (300 mil) Example:
XXXXXXXXXXX
XXXXXXXXXXX
YYWWNNN
XXXXXXXXXXX
YYWWNNN
TC4469COE
XXXXXXXXXXXXXX
XXXXXXXXXXXXXX
YYWWNNN
XXXXXXXXXXXXXX
XXXXXXXXXXXXXX
YYWWNNN
TC4467CPD
YYWWNNN
TC4468EJD
YYWWNNN
Legend: XX...X Customer-specific information
Y Year code (last digit of calendar year)
YY Year code (last 2 digits of calendar year)
WW Week code (week of January 1 is week ‘01’)
NNN Alphanumeric traceability code
Pb-free JEDEC designator for Matte Tin (Sn)
*This package is Pb-free. The Pb-free JEDEC designator ( )
can be found on the outer packaging for this package.
Note: In the even t the full M icroc hip p art numb er cann ot be mark ed on one line, it wil l
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
3
e
3
e
2001-2012 Microchip Technology Inc. DS21425C-page 13
TC4467/TC4468/TC4469
14-Lead Plastic Dual In-line (P) 300 mil (PDIP)
E1
n
D
1
2
eB
E
c
A
A1
B
B1
L
A2
p
Units INCHES* MILLIMETERS
Dimen sion Li mits MIN NOM MAX MIN NOM MAX
Number of P ins n14 14
Pitch p.100 2.54
Top to Seating Plane A .140 .155 .170 3.56 3.94 4.32
Molded Package Thickness A2 .115 .130 .145 2.92 3.30 3.68
Base to Seating Plane A1 .015 0.38
Shoulder to Shoulder Wid th E .300 .313 .325 7.62 7.94 8.26
Molded Packag e Width E1 .240 .250 .260 6.10 6.35 6.60
Overal l Length D .740 .750 .760 18.80 19. 05 19.30
Tip to Seating Plane L .125 .130 .135 3.18 3.30 3.43
Lead Thickness c.008 .012 .015 0.20 0.29 0.38
Upper Lead Width B1 .045 .058 .070 1.14 1.46 1.78
Lower Lead Width B .014 .018 .022 0.36 0.46 0.56
Overall Row Spacing § eB .310 .370 .430 7.87 9.40 10.92
Mold Draft Angle Top 5 10 15 5 10 15
5 10 15 5 10 15
Mold Draft Angle Bottom
* Controlling Parameter
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-001
Drawing No. C04-005
§ Significant Characteristic
Note: For the most current package drawings, please see the Microchip Packaging Specification located
at http://www.microchip.com/packaging
TC4467/TC4468/TC4469
DS21425C-page 14 2001-2012 Microchip Technology Inc.
14-Lead Ceramic Dual In-line – 300 mil (CERDIP)
.780 (19.81)
.740 (18.80)
.300 (7. 62)
.230 (5. 84)
.200 (5.08)
.160 (4.06)
.200 (5.08)
.125 (3.18)
.110 (2.79)
.090 (2.29) .065 (1. 65)
.045 (1. 14)
.020 (0.51)
.016 (0.41)
.040 (1. 02)
.020 (0. 51)
.098 (2.49) MAX.
.030 (0.76) MIN.
14-Pin CERDIP (Narrow)
.400 (10.16)
.320 (8. 13)
.015 (0.38)
.008 (0.20) 3° MIN.
PIN 1
.320 (8.13)
.290 (7.37)
.150 (3.81)
MIN.
Dimensions: inches (mm)
Note: For th e mo s t c urr e nt pac kag e d r awi n gs , plea se se e th e M ic roc hi p Pa c ka gi n g Spe ci f ic ati on lo c at ed
at http://www.microchip.com/packaging
2001-2012 Microchip Technology Inc. DS21425C-page 15
TC4467/TC4468/TC4469
16-Lead Plasti c Small Outline (SO) – Wide, 300 mil (SOIC)
Foot A ngle 048048
1512015120
Mold Draft Angle Bottom 1512015120
Mold Draft Angle Top 0.510.420.36.020.017.014BLead Width 0.330.280.23.013.011.009
c
Lead Thickness
1.270.840.41.050.033.016LFoot Length 0.740.500.25.029.020.010hChamfer Distance 10.4910.3010.10.413.406.398DOverall Length 7.597.497.39.299.295.291E1Molded Package Width 10.6710.3410.01.420.407.394EOverall Width 0.300.200.10.012.008.004A1Standoff § 2.392.312.24.094.091.088A2Molded Package Thickness 2.642.502.36.104.099.093AOverall Height 1.27.050
p
Pitch 1616
n
Number of Pins MAXNOMMINMAXNOMMINDimension Limits MILLIMETERSINCHES*Units
L
c
h
45
1
2
D
p
n
B
E1
E
A2
A1
A
* Controlling Parameter
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Eq uiva lent: MS - 013
Drawing No. C04-102
§ Significant Characteristic
Note: For the most current package drawings, please see the Microchip Packaging Specification located
at http://www.microchip.com/packaging
TC4467/TC4468/TC4469
DS21425C-page 16 2001-2012 Microchip Technology Inc.
7.0 REVISION HISTORY
Revision C (December 2012)
Added a note to each package outline drawing.
2001-2012 Microchip Technology Inc. DS21425C-page 17
TC4467/4468/4469
THE MICROCHIP WEB SITE
Microc hip pro vides onl ine s upport v ia our W WW site at
www.microchip.com. Thi s web si te is used as a m ean s
to make files and information easily available to
customers. Accessible by using your favorite Internet
browser, the web site contains the following
information:
Product Support – Data sheets and errata,
application notes and sample programs, design
resources, user’s guides and hardware support
documents, latest software releases and archived
software
General Technical Support – Frequently Asked
Questions (FAQ), technical support requests,
online dis cu ss io n gr oups, Micro chi p con sul t ant
program member listing
Business of Microchip Product selector and
ordering guides, latest Microchip press releases,
listing of seminars and events, listings of
Microchip sales offices, distributors and factory
representatives
CUSTOMER CHANGE NOTIFICATION
SERVICE
Microchip’s customer notification service helps keep
customers current on Microchip products. Subscribers
will receive e-mail notification whenever there are
changes, updates, revisions or errata related to a
specif ied produ ct family or develo pment tool of interes t.
To register, access the Microchip web site at
www.microchip.com. Under “Support”, click on
“Customer Change Notification” and follow the
registration instructions.
CUSTOMER SUPP ORT
Users of Microchip products can receive assistance
through several channels:
Distributor or Representative
Local Sales Office
Field Application Engineer (FAE)
Technical Support
Customers should contact their distributor,
representative or field application engineer (FAE) for
support. Local sales offices are also available to help
customers. A listing of sales offices and locations is
included in the back of this document.
Technical suppo rt is a vailable through the web site
at: http://microchip.com/support
TC4467/4468/4469
DS21425C-page 18 2001-2012 Microchip Technology Inc.
READER RESP ONSE
It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip
product. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our
documentation can better serve you, please FAX your comments to the Technical Publications Manager at
(480) 792-4150.
Please list the following information, and use this outline to provide us with your comments about this document.
TO: Technical Publications Manager
RE: Reader Response Total Pages Sent ________
From: Name
Company
Address
City / State / ZIP / Country
Telephone: (_______) _________ - _________
Application (optional):
Would you like a reply? Y N
Device: Literature Number:
Questions:
FAX: (______) _________ - _________
DS21425CTC4467/4468/4469
1. What are the best features of this document?
2. How does this document meet your hardware and software development needs?
3. Do you find the organization of this document easy to follow? If not, why?
4. What additions to the document do you think would enhance the structure and subject?
5. What deletions from the document could be made without affecting the overall usefulness?
6. Is there any incorrect or misleading information (what and where)?
7. How would you improve this document?
2001-2012 Microchip Technology Inc. DS21425C-page19
TC4467/TC4468/TC4469
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
Sales and Support
Data Sheets
Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recom-
mended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following:
1. Your local Microchip sales office
2. The Microchip Worldwide Site (www.microchip.com)
Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using.
New Customer Notification System
Register on our web site (www.microchip.com/cn) to receive the most current information on our products.
PART NO. XXX
PackageTemperature
Range
Device
Device: TC4467: 1.2A Quad MOSFET Driver, NAND
TC4468: 1.2A Quad MOSFET Driver, AND
TC4469: 1.2A Quad MOSFET Driver, AND/INV
Temperature Range: C = 0C to +70C
E= -40C to +85C (CERDIP only)
M= -55C to +125C (CERDIP only)
Package: PD = Plastic DIP, (300 mil body), 14-lead
JD = Ceramic DIP, (300 mil body), 14-lead
OE = SOIC (Wide), 16-lead
OE713 = SOIC (Wide), 16-lead (Tape and Reel)
Examples:
a) TC446 7COE : C om mer ical Temp er ature,
SOIC package.
b) TC4467CPD: Commercial Temperature,
PDIP package.
c) TC4467MJD: Military Temperature,
Ceramic DIP package.
a) TC4468COE713: Tape and Reel,
Commerical Temp., SO IC package.
b) TC4468CPD: Commercial Temperature,
PDIP package.
a) TC446 9COE : Com mer ci al Temperature,
SOIC package.
b) TC4469CPD: Commercial Temperature,
PDIP package.
TC4467/TC4468/TC4469
DS21425C-page 20 2001-2012 Microchip Technology Inc.
NOTES:
2001-2012 Microchip Technology Inc. DS21425C-page 21
Information contained in this publication regarding device
applications a nd the lik e is provided only f or yo ur convenience
and may be supers ed ed by u pda t es . It is y our responsibil it y to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, dsPIC,
FlashFlex, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro,
PICSTART, PIC32 logo, rfPIC, SST, SST Logo, SuperFlash
and UNI/O are registered trademarks of Microchip T echnology
Incorporated in the U.S.A. and other countries.
FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor,
MTP, SEEVAL and The Embedded Contr ol Solutions
Company are registered trademarks of Microchip Technology
Incorporated in the U.S.A.
Silicon Storage Technology is a registered trademark of
Microchip Technology Inc. in other countries.
Analog-for-the-Digital Age, Application Maestro, BodyCom,
chipKIT, chipKIT logo, CodeGuard, dsPICDEM,
dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,
ECONOMONIT OR, FanSense, HI-TIDE , In - Circuit Serial
Programm ing, ICSP, Mindi, MiWi, MPAS M, MPF, MPLAB
Certified logo, MPLIB, MPLINK, mTouch, Omniscient Code
Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit,
PICtail, REAL ICE, rfLAB, Select Mode, SQI, Serial Quad I/O,
Total E ndurance, T SHARC, UniWinDriver, Wi perLock, ZENA
and Z-Scale are trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip T echnology Incorporated
in the U.S.A.
GestIC and ULPP are registered trademarks of Microchip
Technology Germany II GmbH & Co. & KG, a subsidiary of
Microchip Technology Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2001-2012, Microchip Technology Incorporated, Printed in
the U.S.A., All Rights Reserved.
Printed on recycled paper.
ISBN: 9781620767993
Note the following details of the code protection feature on Microchip devices:
Microchip products meet the specification contained in their particular Microchip Data Sheet.
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.
Code protection is c onstantly evolving. We a t Microc hip are co m mitted to continuously improving the code prot ect ion featur es of our
products. Attempts to break Microchip’ s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperiph erals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
QUALITY MANAGEMENT S
YSTEM
CERTIFIED BY DNV
== ISO/TS 16949 ==
DS21425C-page 22 2001-2012 Microchip Technology Inc.
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11/27/12