CD54AC74F3A96 - Texas Instruments

Data sheet acquired from Harris Semiconductor

SCHS231C

September 1998 - Revised June 2002

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.

FAST™ is a Trademark of Fairchild Semiconductor.

CD54/74AC74,

CD54/74ACT74

Dual D-Type Flip-Flop with Set and Reset

Positive-Edge-Triggered

[ /Title

(CD74

AC74,

CD74

ACT74

)

/Sub-

ject

(Dual

D-

Type

Flip-

Flop

with

Setand

Reset

Posi-

tive-

Edge-

Trig-

gered)

/Autho

r ()

/Key-

words

(Har-

ris

Semi-

con-

ductor,

Advan

ced

CMOS

,Harris

Semi-

con-

ductor,

Advan

Features

• Buffered Inputs

• Typical Propagation Delay (AC00)

- 4.9ns at VCC = 5V, TA = 25oC, CL = 50pF

• Exceeds 2kV ESD Protection MIL-STD-883, Method

3015

• SCR-Lachup-Resistant CMOS Process and Circuit

Design

• Speed of Bipolar FAST™/AS/S with Signiﬁcantly

Reduced Power Consumption

• Balanced Propagation Delays

• AC Types Feature 1.5V to 5.5V Operation and

Balanced Noise Immunity at 30% of the Supply

•±24mA Output Drive Current

- Fanout to 15 FAST™ ICs

- Drives 50Ω Transmission Lines

Description

The ’AC74 and ’ACT74 dual D-type, positive edge triggered

ﬂip-ﬂops use ADVANCED CMOS technology. These ﬂip-

ﬂops have independent DATA, SET, RESET, and CLOCK

inputs and Q and Q outputs. The logic level present at the

data input is transferred to the output during the positive

going transition of the clock pulse. SET and RESET are

independent of the clock and are accomplished by a low

level at the appropriate input.

Ordering Information

PART

NUMBER TEMP.

RANGE (oC) PACKAGE

CD54AC74F3A -55 to 125 14 Ld CERDIP

CD74AC74E 0 to 70, -40 to 85,

-55 to 125 14 Ld PDIP

CD74AC74EX 0 to 70, -40 to 85,

-55 to 125 14 Ld PDIP

CD74AC74M 0 to 70, -40 to 85,

-55 to 125 14 Ld SOIC

CD54ACT74F3A -55 to 125 14 Ld CERDIP

CD74ACT74E 0 to 70, -40 to 85,

-55 to 125 14 Ld PDIP

CD74ACT74EX 0 to 70, -40 to 85,

-55 to 125 14 Ld PDIP

CD74ACT74M 0 to 70, -40 to 85,

-55 to 125 14 Ld SOIC

NOTES:

1. When ordering, use the entire part number. Add the suffix 96 to

obtain the variant in the tape and reel.

2. Wafer and die for this part number is available which meets all

electrical specifications. Please contact your local TI sales office or

customer service for ordering information.

Pinout

CD54AC74, CD54ACT74

(CERDIP)

CD74AC74, CD74ACT74

(PDIP, SOIC)

TOP VIEW

Functional Diagram

1CP

GND

VCC

2CP

TRUTH TABLE

INPUTS OUTPUTS

SET RESET CP D Q Q

LHXXH L

HLXX L H

L L X X H (Note 5) H (Note 5)

HH↑HH L

HH↑LLH

HHLXQ0Q0

NOTES:

3. H = High level (steady state), L = Low level (steady state), X =

Don’t care, ↑= Transition from Low to High level.

4. Q0 = the level of Q before the indicated input conditions were es-

tablished.

5. This configuration is nonstable, that is, it will not persist when set

and reset inputs return to their inactive (high) level.

1R 1

1CP

2R 13

2CP

FF1

FF2

CD54/74AC74, CD54/74ACT74

Absolute Maximum Ratings Thermal Information

DC Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 6V

DC Input Diode Current, IIK

For VI < -0.5V or VI > VCC + 0.5V. . . . . . . . . . . . . . . . . . . . . .±20mA

DC Output Diode Current, IOK

For VO < -0.5V or VO > VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±50mA

DC Output Source or Sink Current per Output Pin, IO

For VO > -0.5V or VO < VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±50mA

DC VCC or Ground Current, ICC or IGND (Note 6) . . . . . . . . .±100mA

Operating Conditions

Temperature Range,TA. . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC

Supply Voltage Range, VCC (Note 7)

AC Types. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.5V to 5.5V

ACT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V

DC Input or Output Voltage, VI, VO . . . . . . . . . . . . . . . . . 0V to VCC

Input Rise and Fall Slew Rate, dt/dv

AC Types, 1.5V to 3V . . . . . . . . . . . . . . . . . . . . . . . . . 50ns (Max)

AC Types, 3.6V to 5.5V. . . . . . . . . . . . . . . . . . . . . . . . 20ns (Max)

ACT Types, 4.5V to 5.5V. . . . . . . . . . . . . . . . . . . . . . . 10ns (Max)

Thermal Resistance (Typical, Note 8) θJA (oC/W)

PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90

SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175

Maximum Junction Temperature (Plastic Package) . . . . . . . . . . 150oC

Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC

Maximum Lead Temperature (Soldering 10s). . . . . . . . . . . . . 300oC

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation

of the device at these or any other conditions above those indicated in the operational sections of this speciﬁcation is not implied.

NOTES:

6. For up to 4 outputs per device, add ±25mA for each additional output.

7. Unless otherwise specified, all voltages are referenced to ground.

8. θJA is measured with the component mounted on an evaluation PC board in free air.

DC Electrical Speciﬁcations

PARAMETER SYMBOL

TEST

CONDITIONS VCC

(V)

25oC-40oC TO

85oC-55oC TO

125oC

UNITSVI(V) IO(mA) MIN MAX MIN MAX MIN MAX

AC TYPES

High Level Input Voltage VIH - - 1.5 1.2 - 1.2 - 1.2 - V

3 2.1 - 2.1 - 2.1 - V

5.5 3.85 - 3.85 - 3.85 - V

Low Level Input Voltage VIL - - 1.5 - 0.3 - 0.3 - 0.3 V

3 - 0.9 - 0.9 - 0.9 V

5.5 - 1.65 - 1.65 - 1.65 V

High Level Output Voltage VOH VIH or VIL -0.05 1.5 1.4 - 1.4 - 1.4 - V

-0.05 3 2.9 - 2.9 - 2.9 - V

-0.05 4.5 4.4 - 4.4 - 4.4 - V

-4 3 2.58 - 2.48 - 2.4 - V

-24 4.5 3.94 - 3.8 - 3.7 - V

-75

(Note 9, 10) 5.5 - - 3.85 - - - V

-50

(Note 9, 10) 5.5----3.85 - V

CD54/74AC74, CD54/74ACT74

Low Level Output Voltage VOL VIH or VIL 0.05 1.5 - 0.1 - 0.1 - 0.1 V

0.05 3 - 0.1 - 0.1 - 0.1 V

0.05 4.5 - 0.1 - 0.1 - 0.1 V

12 3 - 0.36 - 0.44 - 0.5 V

24 4.5 - 0.36 - 0.44 - 0.5 V

(Note 9, 10) 5.5 - - - 1.65 - - V

(Note 9, 10) 5.5-----1.65 V

Input Leakage Current IIVCC or

GND - 5.5 - ±0.1 - ±1-±1µA

Quiescent Supply Current,

FF ICC VCC or

GND 0 5.5 - 4 - 40 - 80 µA

ACT TYPES

High Level Input Voltage VIH - - 4.5 to

5.5 2-2-2-V

Low Level Input Voltage VIL - - 4.5 to

5.5 - 0.8 - 0.8 - 0.8 V

High Level Output Voltage VOH VIH or VIL -0.05 4.5 4.4 - 4.4 - 4.4 - V

-24 4.5 3.94 - 3.8 - 3.7 - V

-75

(Note 9, 10) 5.5 - - 3.85 - - - V

-50

(Note 9, 10) 5.5----3.85 - V

Low Level Output Voltage VOL VIH or VIL 0.05 4.5 - 0.1 - 0.1 - 0.1 V

24 4.5 - 0.36 - 0.44 - 0.5 V

(Note 9, 10) 5.5 - - - 1.65 - - V

(Note 9, 10) 5.5-----1.65 V

Input Leakage Current IIVCC or

GND - 5.5 - ±0.1 - ±1-±1µA

Quiescent Supply Current,

FF ICC VCC or

GND 0 5.5 - 4 - 40 - 80 µA

AdditionalSupplyCurrent per

Input Pin TTL Inputs High

1 Unit Load

∆ICC VCC

-2.1 - 4.5 to

5.5 - 2.4 - 2.8 - 3 mA

NOTES:

9. Test one output at a time for a 1-second maximum duration. Measurement is made by forcing current and measuring voltage to minimize

power dissipation.

10. Test verifies a minimum 50Ω transmission-line-drive capability at 85oC, 75Ω at 125oC.

DC Electrical Speciﬁcations (Continued)

PARAMETER SYMBOL

TEST

CONDITIONS VCC

(V)

25oC-40oC TO

85oC-55oC TO

125oC

UNITSVI(V) IO(mA) MIN MAX MIN MAX MIN MAX

ACT Input Load Table

INPUT UNIT LOAD

D 0.53

R, S 0.58

CP 1

NOTE: Unit load is ∆ICC limit specified in DC Electrical Specifications

Tab le , e.g., 2.4mA max at 25oC.

CD54/74AC74, CD54/74ACT74

Prerequisite For Switching Function

PARAMETER SYMBOL VCC (V)

-40oC TO 85oC -55oC TO 125oC

UNITSMIN MAX MIN MAX

AC TYPES

Data to CP Setup Time tSU 1.5 39 - 44 - ns

3.3 (Note 11) 4.3 - 4.9 - ns

5 (Note 12) 3.1 - 3.5 - ns

Hold Time tH1.5 0 - 0 - ns

3.3 0 - 0 - ns

50-0-ns

Removal Time, R, S to CP tREM 1.5 30 - 34 - ns

3.3 4.1 - 4.7 - ns

5 2.4 - 2.7 - ns

Pulse Width, R, St

W1.5 44 - 50 - ns

3.3 4.9 - 5.6 - ns

5 3.5 - 4 - ns

Pulse Width, CP tW1.5 49 - 56 - ns

3.3 5.5 - 6.3 - ns

5 3.9 - 4.5 - ns

CP Frequency fMAX 1.5 10 - 9 - MHz

3.3 90 - 79 - MHz

5 125 - 110 - MHz

ACT TYPES

Data to CP Setup Time tSU 5 (Note 12) 3.5 - 4 - ns

Hold Time tH50-0-ns

Removal Time, R, S to CP tREM 5 2.4 - 2.7 - ns

Pulse Width, R, St

W5 4.4 - 5 - ns

Pulse Width, CP tW5 5 - 5.7 - ns

CP Frequency fMAX 5 97 - 85 - MHz

NOTES:

11. 3.3V Min at 3.6V.

12. 5V Min at 4.5V.

Switching Speciﬁcations Input tr, tf = 3ns, CL= 50pF (Worst Case)

PARAMETER SYMBOL VCC (V)

-40oC TO 85oC -55oC TO 125oC

UNITSMIN TYP MAX MIN TYP MAX

AC TYPES

Propagation Delay, CP to Q, Qt

PLH, tPHL 1.5 - - 114 - - 125 ns

3.3

(Note 14) 3.6 - 12.7 3.5 - 14 ns

(Note 15) 2.6 - 9.1 2.5 - 10 ns

CD54/74AC74, CD54/74ACT74

Propagation Delay, R, StoQ,Qt

PLH 1.5 - - 120 - - 132 ns

3.3 3.8 - 13.4 3.7 - 14.7 ns

5 2.7 - 9.5 2.6 - 10.5 ns

tPHL 1.5 - - 131 - - 144 ns

3.3 4.1 - 14.6 4 - 16.1 ns

5 3 - 10.4 2.9 - 11.5 ns

Input Capacitance CI- - -10- -10pF

Power Dissipation Capacitance CPD

(Note 16) - - 55 - - 55 - pF

ACT TYPES

Propagation Delay, CP to Q, Qt

PHL

tPLH 5

(Note 15) 2.5 - 8.6 2.4 - 9.5 ns

Propagation Delay, R, StoQ,Qt

PLH 5 3 - 10.5 2.9 - 11.5 ns

tPHL 5 3.2 - 11.4 3.1 - 12.5 ns

Input Capacitance CI- - -10- -10pF

Power Dissipation Capacitance CPD

(Note 16) - - 55 - - 55 - pF

NOTES:

13. Limits tested 100%.

14. 3.3V Min at 3.6V, Max at 3V.

15. 5V Min at 5.5V, Max at 4.5V.

16. CPD is used to determine the dynamic power consumption per flip-flop.

PD=C

PDVCC2fi+Σ(CLVCC2fo)+V

CC ∆ICC where fi= input frequency, fo= output frequency, CL= output load capacitance, VCC =

supply voltage.

FIGURE 1. FIGURE 2.

FIGURE 3.

Switching Speciﬁcations Input tr, tf = 3ns, CL= 50pF (Worst Case) (Continued)

PARAMETER SYMBOL VCC (V)

-40oC TO 85oC -55oC TO 125oC

UNITSMIN TYP MAX MIN TYP MAX

INPUT LEVEL CP

GND

Q OR Q

VStW

tPHL tPLH

VSVS

INPUT LEVEL

GND

INPUT CP

R (S)

tWtREM

tPLH

Q(Q)

(Q)

INPUT LEVEL

GND

tSU(L) tH(L) tH(H)

tSU(H)

VSVSVS

INPUT LEVEL

GND

CD54/74AC74, CD54/74ACT74

DUT

OUTPUT

RL (NOTE)

OUTPUT

LOAD

500Ω

50pF

NOTE: For AC Series Only: When VCC = 1.5V, RL = 1kΩ.

FIGURE 4. PROPAGATION DELAY TIMES

AC ACT

Input Level VCC 3V

Input Switching Voltage, VS0.5 VCC 1.5V

Output Switching Voltage, VS0.5 VCC 0.5 VCC

CD54/74AC74, CD54/74ACT74

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