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©2012 Fairchild Semiconductor Corporation 1www.fairchildsemi.comNN
Novermber 2014
FAN7083_GF085 Rev. 1.0.2
FAN7083_GF085 High Side Gate Driver with Reset
FAN7083_GF085
High Side Gate Driver with Reset
Features
Qualified to AEC Q100
Floating channel designed for bootstrap operation up fully
operational to + 600V
Tolerance to negative transient voltage on VS pin
dv/dt immune.
Gate drive supply range from 10V to 20V
Under-voltage lockout
CMOS Schmitt-triggered inputs with pull-down
High side output in phase with input
RESET input is 3.3V and 5V logic compatible
Typical Applications
Diesel and gasoline injectors/valves
MOSFET-and IGBT high side driver applications
For Fairchild’s definition of “green” Eco Status, please visit:
http://www.fairchildsemi.com/company/green/rohs_green.html
Description
The FAN7083_GF085 is a high-side gate drive IC with reset
input. It is designed for high voltage and high speed driving of
MOSFET or IGBT, which operates up to 600V. Fairchild's high-
voltage process and common-mode noise cancellation tech-
nique provide stable operation in the high side driver under
high-dv/dt noise circumstances. An advanced level-shift circuit
allows high-side gate driver operation up to VS=-5V (typical) at
VBS=15V. Logic input is compatible with standard CMOS out-
puts. The UVLO circuits prevent from malfunction when VCC
and VBS are lower than the specified threshold voltage. It is
available with space saving SOIC-8 Package. Minimum source
and sink current capability of output driver is 200mA and 400mA
respectively, which is suitable for magnetic-and piezo type injec-
tors and general MOSFET/IGBT based high side driver applica-
tions.
SOIC-8
Ordering Information
Device Package Operating
Temp.
FAN7083M_GF085 SOIC-8 -40 C ~ 125 C
FAN7083MX_GF085 SOIC-8 -40 C ~ 125 C
X : Tape & Reel type
©2012 Fairchild Semiconductor Corporation 2www.fairchildsemi.com
FAN7083_GF085 Rev. 1.0.2
FAN7083_GF085 High Side Gate Driver with Reset
Block Diagrams
PULSE
GEN
UV
DETECT
UV
DETECT
PULSE
FILTER
R
R
S
Q
HV Level
Shift
IN
RESET
VB
HO
VS
COM
VCC
LOGIC
Pin Assignments
1
2
3
45
6
7
8
VCC
IN
RESET
COM
N.C
VS
HO
VB
Pin Definitions
Pin Number Pin Name I/O Pin Function Description
1VCC PDriver supply voltage
2IN ILogic input for high side gate drive output, in phase with HO
3COM PGround
4RESET IReset input
5NC -NC
6VS PHigh side floating offset for MOSFET Source connection
7HO AHigh side drive output for MOSFET Gate connection
8VB PDriver output stage supply
©2012 Fairchild Semiconductor Corporation 3www.fairchildsemi.com
FAN7083_GF085 Rev. 1.0.2
FAN7083_GF085 High Side Gate Driver with Reset
Absolute Maximum Ratings
Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are abso-
lute voltages referenced to COM.
Parameter Symbol Min. Max. Unit
High side floating supply offset voltage VSVB-25 VB+0.3 V
High side floating supply voltage VB-0.3 625 V
High side floating output voltage VHO Vs-0.3 VB+0.3 V
Supply voltage VCC -0.3 25 V
Input voltage for IN VIN -0.3 Vcc+0.3 V
Input voltage for RESET VRESET -0.3 Vcc+0.3 V
Power Dissipation 1) Pd 0.625 W
Thermal resistance, junction to ambient 1) Rthja 200 C/W
Electrostatic discharge voltage
(Human Body Model)
VESD 1K V
Charge device model VCDM 500 V
Junction Temperature Tj 150 C
Storage Temperature TS-55 150 C
Note: 1) The thermal resistance and power dissipation rating are measured bellow conditions;
JESD51-2: Integrated Circuit Thermal Test Method Environmental Conditions - Natural convection(StillAir)
JESD51-3 : Low Effective Thermal Conductivity Test Board for Leaded Surface Mount Package
Recommended Operating Conditions
For proper operation the device should be used within the recommended conditions
Parameter Symbol Min. Max. Unit
High side floating supply voltage
-10V Transient 0.2us
VBVs + 10 Vs + 20 V
High side floating supply offset voltage(DC) VS-4 (@VBS >= 10V)
-5 (@VBS >= 11.5V)
600 V
High side floating supply offset voltage(Transient) VS-25 (~200ns)
-20(200ns~240ns)
-7(240ns~400ns)
600 V
High side floating output voltage VHO VsVBV
Allowable offset voltage Slew Rate 1) dv/dt -50 V/ns
Supply voltage VCC 10 20 V
Input voltage for IN VIN 0Vcc V
Input voltage for RESET VRESET 0Vcc V
Switching Frequency 2) Fs 200 KHz
Minimum Pulse Width(3) Tpulse 85 -ns
Ambient Temperature Ta-40 125 C
.-40°C <= Ta <= 125°C
Note : 1) Guaranteed by design.
2) Duty = 0.5
3) Guaranteed by design. Refer to Figure 4a, 4b and 4c on Page 9.
©2012 Fairchild Semiconductor Corporation 4www.fairchildsemi.com
FAN7083_GF085 Rev. 1.0.2
FAN7083_GF085 High Side Gate Driver with Reset
Statics Electrical Characteristics
Unless otherwise specified, -40°C <= Ta <= 125°C, VCC = 15V, VBS = 15V, VRESET = 5V, VS = 0V, RL = 50, CL = 2.5nF.
Parameter Symbol Conditions Min. Typ. Max. Unit
Vcc and VBS supply Characteristics
VCC and VBS supply under voltage
positive going threshold
VCCUV+
VBSUV+
- - 9.0 9.8 V
VCC and VBS supply under voltage
negative going threshold
VCCUV-
VBSUV-
-7.4 8.4 - V
VCC and VBS supply under voltage hystere-
sis
VCCUVH
VBSUVH
-0.2 0.6 - V
Under voltage lockout response time tduvcc
tduvbs
VCC: 10V-->7.3V or 7.3V-->10V
VBS: 10V-->7.3V or 7.3V-->10V
0.5
0.5
20
20
us
us
Offset supply leakage current ILK VB=VS=600V - - 50 uA
Quiescent VBS supply current IQBS VIN=0, VRESET=5V -50 100 uA
Quiescent Vcc supply current IQCC1 VIN=VRESET=0 -65 140 uA
Quiescent Vcc supply current IQCC2 VIN=15V, VRESET=0 -75 160 uA
Input Characteristics
High logic level input voltage for IN VIH -0.63Vcc - V
Low logic level input voltage for IN VIL - - - 0.4Vcc V
High logic level input current for IN IIN+ VIN=15V -15 50 uA
Low logic level input bias current for IN IIN- VIN=0 - 0 1 uA
High logic level input voltage for RESET VRIH -3.0 - - V
Low logic level input voltage for RESET VRIL - - - 1.4 V
High logic level input current for RESET IRIN+ VRESET=5V - 5 30 uA
Low logic level input bias current for RESET IRIN- VRESET=0 - 0 1 uA
Output characteristics
High level output voltage, VBIAS- VO VOH IO=0 - - 0.1 V
Low level output voltage, VO VOL IO=0 - - 0.1 V
Peak output source current IO1+ -200 - - mA
Peak output sink current IO1- -400 - - mA
Equivalent output resistance ROP 54 75
RON 24 38
Note: The input parameter are referenced to COM. The VO and IO parameters are referenced to COM.
©2012 Fairchild Semiconductor Corporation 5www.fairchildsemi.com
FAN7083_GF085 Rev. 1.0.2
FAN7083_GF085 High Side Gate Driver with Reset
Dynamic Electrical Characteristics
Unless otherwise specified, -40°C <= Ta <= 125°C, VCC = 15V, VBS = 15V, VRESET = 5V, VS = 0V, RL = 50, CL = 2.5nF.
Parameter Symbol Conditions Min. Typ. Max. Unit
IN-to-output turn-on propagation delay tplh 50% input level to 10% output level,
VS = 0V
-115 250 ns
IN-to-output turn-off propagation delay tphl 50% input level to 90% output level
VS = 0V
-90 200 ns
RESET-to-output turn-off propagation delay tphl_res 50% input level to 90% output level -90 200 ns
RESET-to-output turn-on propagation delay tplh_res 50% input level to 10% output level -115 250 ns
Output rising time tr1 Tj=25C,VBS=15V -200 400 ns
tr2 - - 500 ns
Output falling time tf1 Tj=25C,VBS=15V -25 200 ns
tf2 - - 400 ns
©2012 Fairchild Semiconductor Corporation 6www.fairchildsemi.com
FAN7083_GF085 Rev. 1.0.2
FAN7083_GF085 High Side Gate Driver with Reset
Application Information
1. Relationship in input/output and supplies
VCC VBS RESET IN HO
< VCCUVLO- X X X OFF
X< VBSUVLO- X X OFF
X X LOW XOFF
X X X LOW OFF
> VCCUVLO+ > VBSUVLO+ HIGH HIGH ON
Notes:
X menans independent from signal
©2012 Fairchild Semiconductor Corporation 7www.fairchildsemi.com
FAN7083_GF085 Rev. 1.0.2
FAN7083_GF085 High Side Gate Driver with Reset
Typical Application Circuit
VCC
IN
COM
RESET
VB
HO
VS
NC
C1
Rg
R1Cbs
VCC
C2
Db
Up to 600V
Load
5
6
7
8
4
3
2
1
©2012 Fairchild Semiconductor Corporation 8www.fairchildsemi.com
FAN7083_GF085 Rev. 1.0.2
FAN7083_GF085 High Side Gate Driver with Reset
Typical Waveforms
1. Input/Output Timing
Figure 1b. Input(IN)/output Timing Diagram
HO
RESET
IN
tphl
IN
RESET
VS
HO tplh
tphl_res
tplh_res
IN
RESET
HO
Figure 1a. Input/output Timing Diagram
Figure 1C. Input(RESET)/output Timing Diagram
Figure 2. Switching Time Waveform Definitions
10%
90%90%
10%
tr tf
2. Ouput(HO) Switching Timing
©2012 Fairchild Semiconductor Corporation 9www.fairchildsemi.com
FAN7083_GF085 Rev. 1.0.2
FAN7083_GF085 High Side Gate Driver with Reset
3.VB Drop Voltage Diagram
Figure3b. VB Drop Voltage Test Circuit
Figure 3a. VB Drop Voltage Diagram
VBdrop
IN
RESET
VB-VS
Ig
15V
Brake before make
VCC
IN
COM
RESET
VB
HO
NC
VS
1u
50
2.5n
Ig
4.Recommendation Min. Short Pulse Width
VCC
IN
COM
RESET
VB
HO
VS
NC
0.1uF
5
6
7
8
3
4
2
1
Bat1 Bat2
FAN7083
IN
63%
40%
Tpulse = 85nS
Figure 4a.Short Pulse Width Test Circuit and Pulse Width Waveform
142KHz
IN
HO Abnormal Output
Less than
65nS Pulse
Width
Figure 4b. Abnormal Output Waveform with short pulse width
142KHz
IN
HO
Recommended
pulse width
85nS
Figure 4c. Recommendation of pulse width Output Waveform
©2012 Fairchild Semiconductor Corporation 10 www.fairchildsemi.com
FAN7083_GF085 Rev. 1.0.2
FAN7083_GF085 High Side Gate Driver with Reset
Performance Graphs
Figure 5a. Turn-On Delay Time vs Temperature Figure 5b. Turn-On Delay Time vs VBS Supply Voltage
Figure 6a. Turn-Off DelayTime vs Temperature Figure 6b. Turn-Off Delay Time vs VBS Supply Voltage
-50 -25 0 25 50 75 100 125
0
100
200
300
400
500
Max
Turn-On Delay Time (ns)
Temperature ('C)
Typ
10 12 14 16 18 20
0
100
200
300
400
500
Max
Turn-On Delay (ns)
Vbias Supply Voltage (V)
Typ
-50 -25 0 25 50 75 100 125
0
100
200
300
400
500
Max
Turn-Off Delay Time (ns)
Temperature ('C)
Typ
10 12 14 16 18 20
0
100
200
300
400
500
Max
Turn-Off Delay Time (ns)
Vbias Supply Voltage (V)
Typ
Figure 7a. Turn-On Rise Time vs Temperature Figure 7b. Turn-On Rise Time vs VBS Supply Voltage
-50 -25 0 25 50 75 100 125
0
100
200
300
400
500
600
Typ
Max
Max
Typ
RL=0ohm, CL=1nF
Turn-On Rise Time (ns)
Temperature ('C)
RL=50ohm, CL=2.5nF
10 12 14 16 18 20
0
100
200
300
400
500
600
Typ
Max
Max
Typ
RL=0Ohm, CL=1.0nF
Turn-On Rise Time (ns)
VB Supply Voltage (V)
RL=50Ohm, CL=2.5nF
VBS=15V, RL=50, CL=2.5nF
ta=25°C,
RL=50, CL=2.5nF
ta=25°C
RL=50, CL=2.5nF
VBS=15V, RL=50, CL=2.5nF
VBS=15V, RL=50, CL=2.5nF
ta=25°C
RL=50, CL=2.5nF
This performance graphs based on ambient temperature -40C ~125C
-50 -25 0 25 50 75 100 125
0
100
200
300
400
500
RL = 0Ohm, CL=1,0nF
Max.
Max.
Typ.
Typ.
Turn-Off Fall Time(ns)
Temperature(oC)
RL = 50Ohm, CL=2,5nF
Figure 9a. RESET to output Turn-Off Delay Time vs Temperature Figure 9b. RESET to output Turn-Off Delay Time vs VBS Supply
Figure 8a. Turn-Off Falling Time vs Temperature Figure 8b. Turn-Off Falling Time vs VBS Supply Voltage
10 12 14 16 18 20
0
50
100
150
200
250
300
Turn-Off Fall Time (ns)
VB Supply Voltage (V)
Max
Typ
RL=50Ohm, CL=2.5nF
RL=0Ohm, CL=1.0nF
Max
Typ
-50 -25 0 25 50 75 100 125
0
100
200
300
400
500
Max
Reset to Output Turn-Off Delay Time (ns)
Temperature ('C)
Typ
10 12 14 16 18 20
0
100
200
300
400
500
Max
Reset to Turn-Off Delay Time (ns)
VB Supply Voltage (V)
Typ
-50 -25 0 25 50 75 100 125
0
100
200
300
400
500
Max
Reset to Output Turn-On Delay Time (ns)
Temperature ('C)
Typ
10 12 14 16 18 20
0
100
200
300
400
500
Max
Reset to Turn-On Delay Time (ns)
VB Supply Voltage (V)
Typ
ta=25°C
RL=50, CL=2.5nF
ta=25°C
RL=50, CL=2.5nF
ta=25°C,
RL=50, CL=2.5nF
VBS=15V, RL=50, CL=2.5nF
VBS=15V, RL=50, CL=2.5nF
VBS=15V, RL=50, CL=2.5nF
©2012 Fairchild Semiconductor Corporation 11 www.fairchildsemi.com
FAN7083_GF085 Rev. 1.0.2
FAN7083_GF085 High Side Gate Driver with Reset
Figure 10a. RESET to output Turn-On Delay Time vs Temperature Figure 10b. RESET to output Turn-On Delay Time vs VBS Supply
Figure 11a. Logic “1” IN Threshold vs Temperature Figure 11b. Logic “1” IN Threshold vs VCC Supply Voltage
10 12 14 16 18 20
0
2
4
6
8
10
12
14
16
Input Voltage (V)
VCC Supply Voltage(V)
Max
Figure 12a. Logic “0” IN Threshold vs Temperature Figure 12b. Logic “0” IN Threshold vs VCC Supply Voltage
-50 -25 0 25 50 75 100 125
4
5
6
7
8
9
Input Voltage(V)
Temperature(oC)
Max
10 12 14 16 18 20
0
2
4
6
8
10
12
Input Voltage (V)
VCC Supply Voltage(V)
Min
Figure 13a. Logic “1” Reset Threshold vs Temperature Figure 13b. Logic “1” Reset Threshold vs VCC Supply Voltage
-50 -25 0 25 50 75 100 125
0
1
2
3
4
5
6
7
8
Shutdown Logic "1" Input Threshold Voltage (V)
Temperature ('C)
Min
10 12 14 16 18 20
0
1
2
3
4
5
6
7
8
Shutdown Logic "1" Threshold Voltage (V)
Vcc Supply Voltage (V)
Min
-50-250 255075100125
8
9
10
11
12
13
Input Voltage(V)
Temperature(oC)
Min
©2012 Fairchild Semiconductor Corporation 12 www.fairchildsemi.com
FAN7083_GF085 Rev. 1.0.2
FAN7083_GF085 High Side Gate Driver with Reset
10 12 14 16 18 20
0
1
2
3
4
5
Shutdown Logic "0" Threshold Voltage (V)
Vcc Supply Voltage (V)
Max
-50 -25 0 25 50 75 100 125
0
1
2
3
4
5
Shutdown Logic "0" Input Threshold Voltage (V)
Temperature ('C)
Max
-50-250 255075100125
0.0
0.1
0.2
0.3
0.4
0.5
High Level Output Voltage(V)
Temperature(oC)
High Level Output Voltage vs Temperature
Max
Figure 16a. Low Level Output vs Temperature Figure 16b. Low Level Output vs VBS Supply Voltage
Figure 14b. Logic “0” Reset Threshold vs VCC Supply VoltageFigure 14a. Logic “0” Reset Threshold vs Temperature
Figure 15a. High Level Output vs Temperature Figure 15b. High Level Output vs VBS Supply Voltage
10 12 14 16 18 20
0.0
0.1
0.2
0.3
0.4
0.5
High Level Output Voltage(V)
VBS Supply Voltage(V)
Max
-50 -25 0 25 50 75 100 125
0.0
0.1
0.2
0.3
0.4
0.5
High Level Output Voltage(V)
Temperature(oC)
Max
10 12 14 16 18 20
0.0
0.1
0.2
0.3
0.4
0.5
High Level Output Voltage(V)
VBS Supply Voltage(V)
Max
©2012 Fairchild Semiconductor Corporation 13 www.fairchildsemi.com
FAN7083_GF085 Rev. 1.0.2
FAN7083_GF085 High Side Gate Driver with Reset
Figure 18a. VBS Supply Current vs Temperature Figure 18b. VBS Supply Current vs VBS Supply Voltage
Figure 19b. VCC supply Current vs VCC Supply Voltage
Figure 17a. Offset Supply Leakage vs Temperature Figure 17b. Offset Supply Leakage vs Voltage
0 100 200 300 400 500 600
0
100
200
300
400
500
Offset Supply Leakage Current(uA)
VB Boost Voltage(V)
Max
-50 -25 0 25 50 75 100 125
0
50
100
150
200
250
Max
VBS Supply Current (uA)
Temperature ('C)
Typ
Figure 19a. VCC supply Current vs Temperature
10 12 14 16 18 20 22 24
0
50
100
150
200
250
Max
VBS Supply Current (uA)
VBS Floating Supply Voltage (V)
Typ
-50 -25 0 25 50 75 100 125
0
50
100
150
200
250
Max
Vcc Supply Current (uA)
Temperature ('C)
Typ
10 12 14 16 18 20 22 24
0
50
100
150
200
250
Max
Vcc Supply Current (uA)
Vcc Fixed Supply Voltage (V)
Typ
-50 -25 0 25 50 75 100 125
0
40
80
120
160
200
Offset Supply Leakage Current(uA)
Temperature(oC)
Max.
©2012 Fairchild Semiconductor Corporation 14 www.fairchildsemi.com
FAN7083_GF085 Rev. 1.0.2
FAN7083_GF085 High Side Gate Driver with Reset
Figure21a. Logic “0” IN Current vs Temperature Figure 21b. Logic “0” IN Current vs Voltage
Figure 22. Logic “1” Reset Current vs Temperature Figure 23. Logic “1” Reset Current vs Temperature
Figure 20b. Logic “1” IN Current vs VoltageFigure 20a. Logic “1” IN Current vs Temperature
-50 -25 0 25 50 75 100 125
0
20
40
60
80
100
Max
Logic "1" Input Bias Current (uA)
Temperature ('C)
Typ
-50 -25 0 25 50 75 100 125
0
1
2
3
4
5
Logic "0" Inpit Current(A)
Temperature(oC)
Max
10 12 14 16 18 20
0
1
2
3
4
5
Logic "0" Inpit Current(A)
VCC Supply Voltage(V)
Max
-50 -25 0 25 50 75 100 125
0
20
40
60
80
100
Max
Shutdown Logic "1" Input Bias Current (uA)
Temperature ('C)
Typ
-50 -25 0 25 50 75 100 125
0
1
2
3
4
5
Logic "0" Inpit Current(A)
Temperature(oC)
Max
10 12 14 16 18 20
0
2
4
6
8
10
12
14
16
Input Voltage (V)
VCC Supply Voltage(V)
Max
©2012 Fairchild Semiconductor Corporation 15 www.fairchildsemi.com
FAN7083_GF085 Rev. 1.0.2
FAN7083_GF085 High Side Gate Driver with Reset
-50 -25 0 25 50 75 100 125
0
100
200
300
400
500
Typ.
Io+, Output Source Current (mA)
Temperature (oC)
Min.
Figure 24a. VBS Undervoltage(+) vs Temperature Figure 24b. VBS Undervoltage(-) vs Temperature
Figure 25a. VCC Undervoltage(+) vs Temperature Figure 25b. VCC Undervoltage(-) vs Temperature
Figure 26a. Output Source Current vs Temperature Figure 26b. Output Source Current vs Voltage
-50 -25 0 25 50 75 100 125
6
7
8
9
10
11
12
Min
Max
VBS Undervoltage Lockout + (V)
Temperature ('C)
Typ
-50 -25 0 25 50 75 100 125
5
6
7
8
9
10
11
Max
Min
VBS Undervoltage Lockout - (V)
Temperature ('C)
Typ
-50 -25 0 25 50 75 100 125
6
7
8
9
10
11
12
Min
Max
VCC Undervoltage Lockout + (V)
Temperature ('C)
Typ
-50 -25 0 25 50 75 100 125
5
6
7
8
9
10
11
Max
Min
VCC Undervoltage Lockout - (V)
Temperature ('C)
Typ
10 12 14 16 18 20
0
100
200
300
400
500
Min
Io+, Output Source Current (mA)
VBS Supply Voltage (V)
Typ
Vcc=VBS=15V Vcc=15V
©2012 Fairchild Semiconductor Corporation 16 www.fairchildsemi.com
FAN7083_GF085 Rev. 1.0.2
FAN7083_GF085 High Side Gate Driver with Reset
-50 -25 0 25 50 75 100 125
0
200
400
600
800
1000
Typ.
Io-,Output Sink Cureent (mA)
Temperature (oC)
Min.
10 12 14 16 18 20
0
200
400
600
800
1000
Min
Output Sink Current, IO- (mA)
VBS Supply Voltage (V)
Typ
-50 -25 0 25 50 75 100 125
0
-2
-4
-6
-8
-10
-12
-14
-16
-18
-20
Allowable Negative VS (V)
Temperature ('C)
Typ
Vcc=VBS=15V Vcc=15V
10 12 14 16 18 20
-16
-14
-12
-10
-8
-6
-4
-2
Typ. @ 125oC
Min
Typ. @ 25oC
VS Offset Supply Voltage (V)
VBS Floating Supply Voltage(V)
RL=50, CL=2.5nF
10<=VCC<=20V,
©2012 Fairchild Semiconductor Corporation 17 www.fairchildsemi.com
FAN7083_GF085 Rev. 1.0.2
FAN7083_GF085 High Side Gate Driver with Reset
Figure 27a. Output Sink Current vs Temperature Figure 27b. Output Sink Current vs Voltage
Figure 28a. Negative Allowable Offset vs Temperature Figure 28b. Negative Allowable Offset vs Voltage
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