IRF1404S
IRF1404L
HEXFET® Power MOSFET
Seventh Generation HEXFET® Power MOSFETs from
International Rectifier utilize advanced processing
techniques to achieve extremely low on-resistance per
silicon area. This benefit, combined with the fast
switching speed and ruggedized device design that
HEXFET power MOSFETs are well known for, provides
the designer with an extremely efficient and reliable
device for use in a wide variety of applications.
The D2Pak is a surface mount power package capable of
accommodating die sizes up to HEX-4. It provides the
highest power capability and the lowest possible on-
resistance in any existing surface mount package. The
D2Pak is suitable for high current applications because of
its low internal connection resistance and can dissipate up
to 2.0W in a typical surface mount application.
The through-hole version (IRF1404L) is available for low-
profile applications.
S
D
G
Absolute Maximum Ratings
Thermal Resistance
VDSS = 40V
RDS(on) = 0.004
ID = 162A
lAdvanced Process Technology
lUltra Low On-Resistance
lDynamic dv/dt Rating
l175°C Operating Temperature
lFast Switching
lFully Avalanche Rated
Description
5/18/01
www.irf.com 1
D2Pak
IRF1404S TO-262
IRF1404L
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V162
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V115A
IDM Pulsed Drain Current  650
PD @TA = 25°C Power Dissipation 3.8 W
PD @TC = 25°C Power Dissipation 200 W
Linear Derating Factor 1.3 W/°C
VGS Gate-to-Source Voltage ± 20 V
EAS Single Pulse Avalanche Energy519 mJ
IAR Avalanche Current95 A
EAR Repetitive Avalanche Energy20 mJ
dv/dt Peak Diode Recovery dv/dt  5.0 V/ns
TJOperating Junction and -55 to +175
TSTG Storage Temperature Range -55 to +175
Soldering Temperature, for 10 seconds 300 (1.6mm from case ) °C
Parameter Typ. Max. Units
RθJC Junction-to-Case ––– 0.75 °C/W
RθJA Junction-to-Ambient (PCB mounted, steady-state)*––– 40
PD -93853C
IRF1404S/L
2www.irf.com
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Repetitive rating; pulse width limited by
max. junction temperature. (See fig. 11)
ISD 95A, di/dt 150A/µs, VDD V(BR)DSS,
TJ 175°C
Notes:
Starting TJ = 25°C, L = 0.12mH
RG = 25, IAS = 95A. (See Figure 12)
Pulse width 300µs; duty cycle 2%.
S
D
G
Parameter Min. Typ. Max. Units Conditions
ISContinuous Source Current MOSFET symbol
(Body Diode) ––– ––– showing the
ISM Pulsed Source Current integral reverse
(Body Diode)
––– ––– p-n junction diode.
VSD Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 95A, VGS = 0V
trr Reverse Recovery Time ––– 71 110 ns TJ = 25°C, IF = 95A
Qrr Reverse RecoveryCharge ––– 180 270 nC di/dt = 100A/µs 
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Source-Drain Ratings and Characteristics
162
650 A
Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS
Calculated continuous current based on maximum allowable
junction temperature. Package limitation current is 75A
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 40 –– ––– V VGS = 0V, I D = 250µA
V(BR)DSS/TJBreakdown Voltage Temp. Coefficient –– 0.036 V/°C Reference to 25°C, ID = 1mA
RDS(on) Static Drain-to-Source On-Resistance ––– 0.0035 0.004 VGS = 10V, ID = 95A
VGS(th) Gate Threshold Voltage 2.0 ––– 4.0 V VDS = 10V, ID = 250µA
gfs Forward Transconductance 106 ––– ––– S VDS = 25V, ID = 60A
––– ––– 20 µA VDS = 40V, VGS = 0V
––– ––– 250 VDS = 32V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage ––– ––– 200 VGS = 20V
Gate-to-Source Reverse Leakage ––– ––– -200 nA VGS = -20V
QgTotal Gate Charge –– 160 2 0 0 ID = 95A
Qgs Gate-to-Source Charge ––– 35 –– nC VDS = 32V
Qgd Gate-to-Drain ("Miller") Charge ––– 42 60 VGS = 10V 
td(on) Turn-On Delay Time ––– 17 ––– VDD = 20V
trRise Time ––– 140 ––– ID = 95A
td(off) Turn-Off Delay Time ––– 72 ––– RG = 2.5
tfFall Time ––– 26 ––– RD = 0.21 
Between lead,
and center of die contact
Ciss Input Capacitance ––– 7360 ––– VGS = 0V
Coss Output Capacitance –– 1680 –– VDS = 25V
Crss Reverse Transfer Capacitance –– 24 0 ––– pF ƒ = 1.0MHz, See Fig. 5
Coss Output Capacitance ––– 6630 ––– VGS = 0V, V DS = 1.0V, ƒ = 1.0MHz
Coss Output Capacitance –– 1490 –– VGS = 0V, VDS = 32V, ƒ = 1.0MHz
Coss eff. Effective Output Capacitance  ––– 1540 ––– VGS = 0V, VDS = 0V to 32V
IGSS
ns
IDSS Drain-to-Source Leakage Current
nH
7.5
LSInternal Source Inductance ––– –––
Use IRF1404 data and test conditions.
* When mounted on 1" square PCB ( FR-4 or G-10 Material ).
For recommended footprint and soldering techniques refer to application note #AN-994.
IRF1404S/L
www.irf.com 3
Fig 4. Normalized On-Resistance
Vs. Temperature
Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics
10
100
1000
0.1 1 10 100
20
µ
s PULSE WIDTH
T = 25 C
J°
TOP
BOTTOM
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
V , Drain-to-Source Voltage (V)
I , Drain-to-Source Current (A)
DS
D
4.5V
10
100
1000
0.1 1 10 100
20
µ
s PULSE WIDTH
T = 175 C
J°
TOP
BOTTOM
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
V , Drain-to-Source Volta
g
e (V)
I , Drain-to-Source Current (A)
DS
D
4.5V
10
100
1000
4.0 5.0 6.0 7.0 8.0 9.0
V = 25V
20µs PULSE WIDTH
DS
V , Gate-to-Source Voltage (V)
I , Drain-to-Source Current (A)
GS
D
T = 25 C
J°
T = 175 C
J°
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
0.0
0.5
1.0
1.5
2.0
2.5
T , Junction Temperature ( C)
R , Drain-to-Source On Resistance
(Normalized)
J
DS(on)
°
V =
I =
GS
D
10V
159A
IRF1404S/L
4www.irf.com
Fig 8. Maximum Safe Operating Area
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 7. Typical Source-Drain Diode
Forward Voltage
1 10 100
0
2000
4000
6000
8000
10000
12000
V , Drain-to-Source Volta
g
e (V)
C, Capacitance (pF)
DS
V
C
C
C
=
=
=
=
0V,
C
C
C
f = 1MHz
+ C
+ C
C SHORTED
GS
iss
g
s
g
d , ds
rss
g
d
oss ds
g
d
Ciss
Coss
Crss
040 80 120 160 200 240
0
4
8
12
16
20
Q , Total Gate Charge (nC)
V , Gate-to-Source Voltage (V)
G
GS
FOR TEST CIRCUIT
SEE FIGURE
I =
D
13
95A
V = 20V
DS
V = 32V
DS
1
10
100
1000
0.4 0.8 1.2 1.6 2.0 2.4
V ,Source-to-Drain Volta
g
e (V)
I , Reverse Drain Current (A)
SD
SD
V = 0 V
GS
T = 25 C
J°
T = 175 C
J°
1
10
100
1000
10000
1 10 100
OPERATION IN THIS AREA LIMITED
BY RDS(on)
Sin
g
le Pulse
T
T = 175 C
= 25 C
°°
J
C
V , Drain-to-Source Voltage (V)
I , Drain Current (A)I , Drain Current (A)
DS
D
10us
100us
1ms
10ms
IRF1404S/L
www.irf.com 5
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Fig 9. Maximum Drain Current Vs.
Case Temperature
Fig 10a. Switching Time Test Circuit
V
DS
90%
10%
V
GS t
d(on)
t
r
t
d(off)
t
f
Fig 10b. Switching Time Waveforms
VDS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
RD
VGS
RGD.U.T.
10V
+
-
VDD
25 50 75 100 125 150 175
0
40
80
120
160
200
T , Case Temperature ( C)
I , Drain Current (A)
°
C
D
LIMITED BY PACKAGE
0.01
0.1
1
0.00001 0.0001 0.001 0.01 0.1 1
Notes:
1. Duty factor D = t / t
2. Peak T =P x Z + T
1 2
JDM thJC C
P
t
t
DM
1
2
t , Rectangular Pulse Duration (sec)
Thermal Response(Z )
1
thJC
0.01
0.02
0.05
0.10
0.20
D = 0.50
SINGLE PULSE
(THERMAL RESPONSE)
IRF1404S/L
6www.irf.com
Q
G
Q
GS
Q
GD
V
G
Charge
D.U.T. V
DS
I
D
I
G
3mA
V
GS
.3µF
50K
.2µF
12V
Current Regulator
Same Type as D.U.T.
Current Sampling Resistors
+
-
10 V
Fig 13b. Gate Charge Test Circuit
Fig 13a. Basic Gate Charge Waveform
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
Fig 12a. Unclamped Inductive Test Circuit
tp
V
(BR)DSS
I
AS
R
G
I
AS
0.01
t
p
D.U.T
L
VDS
+
-V
DD
DRIVER
15V
20V
Fig 12d. Typical Drain-to-Source Voltage
Vs. Avalanche Current
020 40 60 80 100
IAV , Avalanche Current ( A)
40
42
44
46
48
50
V DSav , Avalanche Voltage ( V )
25 50 75 100 125 150 175
0
200
400
600
800
1000
1200
Starting T , Junction Temperature( C)
E , Single Pulse Avalanche Energy (mJ)
J
AS
°
ID
TOP
BOTTOM
39A
67A
95A
IRF1404S/L
www.irf.com 7
P.W. Period
di/dt
Diode Recovery
dv/dt
Ripple 5%
Body Diode Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current Body Diode Forward
Current
V
GS
=10V
V
DD
I
SD
Driver Gate Drive
D.U.T. I
SD
Waveform
D.U.T. V
DS
Waveform
Inductor Curent
D = P.W.
Period
+
-
+
+
+
-
-
-
Fig 14. For N-channel HEXFET® Power MOSFETs
* VGS = 5V for Logic Level Devices
Peak Diode Recovery dv/dt Test Circuit
RGVDD
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
D.U.T Circuit Layout Considerations
Low Stray Inductance
Ground Plane
Low Leakage Inductance
Current Transformer
*
IRF1404S/L
8www.irf.com
D2Pak Package Outline
D2Pak Part Marking Information
F530S
THIS IS AN IRF530 S WITH
LOT CODE 8024
ASSEMBLED ON WW 02, 20 00
IN THE ASSEMBLY LINE "L"
ASSEMBLY
LOT CODE
INTERNATIONAL
RECTIFIER
LOGO
PART N UMBER
DATE CO DE
Y EAR 0 = 2000
WEEK 02
LINE L
IRF1404S/L
www.irf.com 9
TO-262 Part Marking Information
TO-262 Package Outline
EXAMPLE: THIS IS AN IRL3103L
LOT CODE 1789
ASSEMBLY
PART NUMBER
DATE CODE
WEEK 19
LINE C
LOT CODE
YEAR 7 = 1997
ASSEMBLED ON WW 19, 1997
IN THE ASSEMBLY LINE "C" LOGO
RECTIFIER
INTERNATIONAL
IRF1404S/L
10 www.irf.com
D2Pak Tape & Reel Information
3
4
4
TRR
FEED D IRE CTION
1.85 (.073 )
1.65 (.065 )
1.60 (.063)
1.50 (.059)
4.10 (.16 1)
3.90 (.15 3)
TRL
FEED DIRECTION
10.90 (.429)
10.70 (.421) 16.10 (.634)
15.90 (.626)
1.75 (.069)
1.25 (.049)
11.60 (.457)
11.40 (.449) 15 .42 (.60 9)
15 .22 (.60 1)
4.72 (.136)
4.52 (.178)
24.30 (.957)
23.90 (.941)
0.368 (.0145)
0.342 (.0135)
1.60 (.063)
1.50 (.059)
13.50 (.532)
12.80 (.504)
330.00
(14.173)
M A X.
27.40 (1.079)
2 3.90 (.941 )
60.00 (2.362)
MIN.
30 .4 0 (1.197)
MA X.
26 .40 (1.0 3 9)
24.40 (.961)
NO TES :
1. CO MFORMS TO EIA-418.
2. CONTROLLING DIMENSIO N: MILLIMETER.
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.5/01
Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/