Product structureSilicon monolithic integrated circuitThis product is not designed protection against radioactive rays
1/35 TSZ02201-0R2R0G100390-1-2
15.Oct.2013 Rev. 002
©2012 ROHM Co., Ltd. All rights reserved.
TSZ2211114001
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Datashee
t
Serial EEPROM Series Standard EEPROM
Microwire BUS EEPROM(3-Wire)
BR93Lxx-W
General Description
BR93Lxx-W is serial EEPROM of serial 3-line interface method
Features
3-line communications of chip select, serial clock, serial data
input / output (the case where input and output are shared)
Actions available at high speed 2MHz clock(2.5V to 5.5V)
Speed write available (write time 5ms max.
Same package and pin layout from 1Kbit to 16Kbit
1.8V to 5.5V single power source action
Address auto increment function at read action
Write mistake prevention function
¾ Write prohibition at power on
¾ Write prohibition by command code
¾ Write mistake prevention function at low voltage
Program cycle auto delete and auto en d function
Program condition display by READY / BUSY
Low current consumption
¾ At write action (at 5V) : 1.2mA (Typ.)
¾ At read action (at 5V) : 0.3mA (Typ.)
¾ At standby action (at 5V) : 0.1μA (Typ.)(CMOS input)
TTL compatible( input / outputs)
Data retention for 40 years
Endurance up to 1,000,000 times
Data at shipment all addresses FFFFh
Packages W(Typ.) x D(Typ.) x H(Max.)
BR93Lxx-W
Package type SOP8 SOP-J8 SSOP-B8 TSSOP-B8 MSOP8 TSSOP-
B8J DIP-T8
Capacity Bit format Type Power source
voltage F RF FJ RFJ FV RFV FVT RFVT RFVM RFVJ -
1Kbit 64×16 BR93L46-W 1.8V to 5.5V ●●●●●●●
2Kbit 128×16 BR93L56-W 1.8V to 5.5V ●●●●●●●
4Kbit 256×16 BR93L66-W 1.8V to 5.5V ●●●●●●●
8Kbit 512×16 BR93L76-W 1.8V to 5.5V ●●●●
16Kbit 1K×16 BR93L86-W
1.8V to 5.5V ●●●●
TSSOP-B8
3.00mm x 6.40mm x 1.20mm
SOP8
5.00mm x 6.20mm x 1.71mm
SOP- J8
4.90mm x 6.00mm x 1.65mm TSSOP-B8J
3.00mm x 4.90mm x 1.10mm
MSOP8
2.90mm x 4.00mm x 0.90mm
SSOP-B8
3.00mm x 6.40mm x 1.35mm
DIP-T8
9.30mm x 6.50mm x 7.10mm
Figure.1
Datasheet
Datasheet
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BR93Lxx-W
TSZ02201-0R2R0G100390-1-2
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Absolute Maximum Ratings (Ta=25)
Parameter Symbol Limits Unit Remarks
Impressed voltage VCC -0.3 to +6.5 V
Permissible dissipation Pd
450 (SOP8)
mW
When using at Ta=25 or higher, 4.5mW, to be reduced per 1.
450 (SOP-J8) When using at Ta=25 or higher, 4.5mW, to be reduced per 1.
300 (SSOP-B8) When using at Ta=25 or higher, 3.0mW, to be reduced per 1.
330 (TSSOP-B8) When using at Ta=25 or higher, 3.3mW, to be reduced per 1.
310 (MSOP8) When using at Ta=25 or higher, 3.1mW, to be reduced per 1.
310 (TSSOP-B8J) When using at Ta=25 or higher, 3.1mW, to be reduced per 1.
800(DIP-T8) When using at Ta=25 or higher, 8.0mW, to be reduced per 1
Storage temperature range Tstg -65 to +125
Action temperature range Topr -40 to +85
Terminal voltage -0.3 to VCC+0.3 V
Memory Cell Characteristics(VCC=1.8V to 5.5V)
Parameter Limit Unit Condition
Min. Typ. Max.
Endurance *1 1,000,000 - - Times Ta=25
Data retention *1 40 - - Years Ta=25
Shipment data all address FFFFh
*1Not 100 TESTED
Recommended Operating Ratings
Parameter Symbol Limits
Unit
Power source voltage VCC 1.8 to 5.5 V
Input voltage VIN 0 to VCC
Datasheet
Datasheet
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BR93Lxx-W
TSZ02201-0R2R0G100390-1-2
15.Oct.2013 Rev. 002
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Electrical Characteristics
(Unless otherwise specified, VCC=2.5V to 5.5V, Ta=-40 to +85)
Parameter Symbol Limits Unit Condition
Min. Typ. Max.
“L” input voltage 1 VIL1 -0.3 - 0.8 V 4.0VVCC5.5V
“L” input voltage 2 VIL2 -0.3 - 0.2 x VCC V VCC4.0V
“H” input voltage 1 VIH1 2.0 - VCC +0.3 V 4.0VVCC5.5V
“H” input voltage 2 VIH2 0.7 x VCC - VCC +0.3 V VCC4.0V
“L” output voltage 1 VOL1 0 - 0.4 V IOL=2.1mA, 4.0VVCC5.5V
“L” output voltage 2 VOL2 0 - 0.2 V IOL=100μA
“H” output voltage 1 VOH1 2.4 - VCC V IOH=-0.4mA, 4.0VVCC5.5V
“H” output voltage 2 VOH2 VCC -0.2 - VCC V IOH=-100μA
Input leak current ILI -1 - 1 µA VIN=0V to VCC
Output leak current ILO -1 - 1 µA VOUT=0V to VCC, CS=0V
Current consumption
at action
ICC1 - - 3.0 mA fSK=2MHz, tE/W=5ms (WRITE)
ICC2 - - 1.5 mA fSK=2MHz (READ)
ICC3 - - 4.5 mA fSK=2MHz, tE/W=5ms (WRAL, ERAL)
Standby current ISB - - 2 µA CS=0V, DO=OPEN
(Unless otherwise specified, VCC =1.8V to 2.5V, Ta=-40 to +85)
Parameter Symbol Limits Unit Condition
Min. Typ. Max.
“L” input voltage VIL -0.3 - 0.2 x VCC V
“H” input voltage VIH 0.7 x VCC - VCC+0.3 V
“L” output voltage VOL 0 - 0.2 V IOL=100μA
“H” output voltage VOH VCC-0.2 - VCC V IOH=-100μA
Input leak current ILI -1 - 1 μA VIN=0V to VCC
Output leak current ILO -1 - 1 μA VOUT=0V to VCC, CS=0V
Current consumption
at action
ICC1 - - 1.5 mA fSK=500kHz, tE/W=5ms (WRITE)
ICC2 - - 0.5 mA fSK=500kHz (READ)
ICC3 - - 2 mA fSK=500kHz, tE/W=5ms (WRAL, ERAL)
Standby current ISB - - 2 μA CS=0V, DO=OPEN
Datasheet
Datasheet
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TSZ02201-0R2R0G100390-1-2
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Action Timing Characteristics
(Ta=-40 to +85, VCC=2.5V to 5.5V)
Parameter Symbol 2.5VVCC5.5V Unit
Min. Typ. Max.
SK frequency fSK - - 2 MHz
SK “H” time tSKH 230 - - ns
SK “L” time tSKL 230 - - ns
CS “L” time tCS 200 - - ns
CS setup time tCSS 50 - - ns
DI setup time tDIS 100 - - ns
CS hold time tCSH 0 - - ns
DI hold time tDIH 100 - - ns
Data “1” output delay time tPD1 - - 200 ns
Data “0” output delay time tPD0 - - 200 ns
Time from CS to output establishment tSV - - 150 ns
Time from CS to High-Z tDF - - 150 ns
Write cycle time tE/W - - 5 ms
(Ta=-40 to +85, VCC=1.8V to 2.5V)
Parameter Symbol
1.8VVCC2.5V Unit
Min. Typ. Max.
SK frequency fSK - - 500 kHz
SK “H” time tSKH 0.8 - - us
SK “L” time tSKL 0.8 - - us
CS “L” time tCS 1 - - us
CS setup time tCSS 200 - - ns
DI setup time tDIS 100 - - ns
CS hold time tCSH 0 - - ns
DI hold time tDIH 100 - - ns
Data “1” output delay time tPD1 - - 0.7 us
Data “0” output delay time tPD0 - - 0.7 us
Time from CS to output establishment tSV - - 0.7 us
Time from CS to High-Z tDF - - 200 ns
Write cycle time tE/W - - 5 ms
Sync Data Input / Output Timing
Data is taken by DI sync with the rise of SK.
At read action, data is output from DO in sync with the rise of SK.
The status signal at write (READY / BUSY) is output after tCS from the fall of CS after write command input, at the area
DO where CS is “H”, and valid until the next command start bit is input. And, while CS is “L”, DO becomes High-Z.
After completion of each mode execution, set CS “L” once for internal circuit reset, and execute the following action mode.
CS
SK
DO(READ)
DI
DO( WRITE)
tCSS
tSKH tSKL tCSH
tDIS tDIH
tPD1
t PD0
tDF
STATUS VALID
Datasheet
Datasheet
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BR93Lxx-W
TSZ02201-0R2R0G100390-1-2
15.Oct.2013 Rev. 002
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TSZ2211115001
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Block Diagram
Pin Configurations
Pin Descriptions
Command decode
Control
Clock generation
Power source voltage detection
Write
prohibition High voltage occurrence
Command
register Address
buffer
SK
DI
Dummy bit
DO
Data
register R/W
amplifier
6bit
7bit
8bit
9bit
10bit
6bit
7bit
8bit
9bit
10bit
16bit 16bit
1,024 bit
2,048 bit
4,096 bit
8,192 bit
16,384 bit
EEPROM
CS
Address
decoder
Pin name I / O Function
VCC - Power source
GND - All input / output reference voltage, 0V
CS Input Chip select input
SK Input Serial clock input
DI Input Start bit, ope code, address, and serial data input
DO Output Serial data output, READY / BUSY inter nal condition display output
NC - Non connected terminal, Vcc, GND or OPEN
*BR93L46/56/66-W
BR93LXXF-W:SOP8
BR93LXXFJ-W:SOP-J8
BR93LXXFV-W:SSOP-B8*
BR93LXXFVT-W:TSSOP-B8*
NC GND DO DI
NC Vcc CS SK
TOP VIEW
BR93LXX-W:DIP-T8
Vcc NC NC GND
CS SK DI DO
TOP VIEW
BR93LXXRF-W:SOP8
BR93LXXRFJ-W:SOP-J8
BR93LXXRFV -W:SSOP-B8
BR93LXXRFVT-W:TSSOP-B8
BR93LXXRFVM-W:MSOP8
BR93LXXRFVJ-W:TSSOP-B8J
Vcc NC NC GND
CS SK DI DO
TOP VIEW
Datasheet
Datasheet
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Typical Performance Curves
(The following characteristic data are typ. values.)
Figure 2. H input voltage VIH (CS,SK,DI)
Figure 3. L input voltage VIL (CS,SK,DI)
Figure 4. L out put voltage VOL-IOL (Vcc=1.8V)
Figure 5. L output voltage VOL-IOL (Vcc=2.5V)
Datasheet
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Typical Performance CurvesContinued
Figure 6. L output voltage VOL-IOL
(Vcc=4.0V)
Figure 7. H output voltage VOH-IOH
(Vcc=1.8V)
Figure 8. H output voltage VOH-IOH (Vcc=2.5V)
Figure 9. H output voltage VOH-IOH (Vcc=4.0V)
Datasheet
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Typical Performance CurvesContinued
Figure 10. Input leak current ILI (CS,SK,DI)
Figure 11. Output leak current ILO (DO)
Figure 12. Current consumptio n at W RITE action
ICC1 (WRITE, fSK=2MHz)
Figure 13. Consumption current at READ action
ICC2 (READ, fSK=2MHz)
Datasheet
Datasheet
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TSZ02201-0R2R0G100390-1-2
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Typical Performance CurvesContinued
Figure 14. Consumption current at WRAL action
ICC3 (WRAL, fSK=2MHz)
Figure 15. Current consumptio n at W RITE action
ICC1 (WRITE, fSK=500kHz)
Figure 16. Consumption current at READ action
ICC2 (READ, fSK=500kHz)
Figure 17. Consumption current at WRAL action
ICC3 (WRAL, fSK=500kHz)
Datasheet
Datasheet
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TSZ02201-0R2R0G100390-1-2
15.Oct.2013 Rev. 002
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Typical Performance CurvesContinued
Fi
gure
1
8
.
C
onsumpt
i
on current at stan
db
y ac t
i
on
ISB
Figure 19. SK frequency fSK
Figure 20. SK high time tSKH
Figure 21. SK low time tSKL
Datasheet
Datasheet
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Typical Performance CurvesContinued
Figure 22. CS low time tCS
Figure 23. CS hold time tCSH
Figure 24. CS setup time tCSS
Figure 25. DI hold time tDIH
Datasheet
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TSZ02201-0R2R0G100390-1-2
15.Oct.2013 Rev. 002
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Typical Performance CurvesContinued
Figure 26. DI setup time tDIS
Figure 27. Data “0” output delay time tPD0
Figure 28. Output data “1” delay time tPD1
Figure 29. Time from CS to output establishment tSV
Datasheet
Datasheet
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15.Oct.2013 Rev. 002
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Typical Performance CurvesContinued
Figure 30. Time from CS to High-Z tDF
Figure 31. Write cycle time tE/W
Datasheet
Datasheet
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BR93Lxx-W
TSZ02201-0R2R0G100390-1-2
15.Oct.2013 Rev. 002
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TSZ2211115001
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Description of Operations
Communications of the Microwire Bus are carried out by SK (serial clock), DI (serial data input),DO (serial data
output) ,and CS (chip select) for device selection.
When to connect one EEPROM to a microcontroller, connect it as shown in Figure 32 (a) or Figure 32 (b). When to use
the input and output common I/O port of the microcontroller, connect DI and DO via a resistor as shown in Figure 31
(b) (Refer to page 19.), and connection by 3 lines is available.
In the case of plural connections, refer to Figure 32 (c).
Communications of the Microwire Bus are st arted b y the fir st “1” input after the rise of CS. This inp ut is called a start b it.
After input of the start bit, input ope code, address and data. Address and data are input all in MSB first manners.
“0” input after the rise of CS to the start bit input is all ignored. T herefore, when there is li mitation in the bit width of PIO
of the microcontroller, input “0” before the start bit input, to control the b it width.
Command Mode
Command Start
bit
Ope
code
Address Data
BR93L46-W BR93L56/66-W BR93L76/86-W
Read (READ)
*
1 1 10 A5,A4,A3,A2,A1,A0 A7,A6,A5,A4,A3,A2,A1,A0 A9,A8,A7,A6,A5,A4,A3,A2,A1,A0 D15 to D0(READ DATA)
Write enable (WEN) 1 00 1 1 * * * * 1 1 * * * * * * 1 1 * * * * * * * *
Write (WRITE)
*
2 1 01 A5,A4,A3,A2,A1,A0 A7,A6,A 5,A4,A3,A2,A1,A0 A9,A8,A7,A6,A5,A4,A3,A2,A1,A0 D 1 5 t o D 0 (W R I T E DA T A )
Write all (WRAL)
*
2 1 00 0 1 * * * * 0 1 * * * * * * 0 1 * * * * * * * * D15 to D0(WRITE DATA)
Write disable (WDS) 1 00 0 0 * * * * 0 0 * * * * * * 0 0 * * * * * * * *
Erase (ERASE) 1 11 A5,A4,A3,A2,A1,A0 A7,A6,A5,A4,A3,A2,A1,A0 A9,A8,A7,A6,A5,A4,A3,A2,A1,A0
Chip erase (ERAL) 1 00 1 0 * * * * 1 0 * * * * * * 1 0 * * * * * * * *
Input the address and the data in MSB first manners.
As for *, input either VIH or VIL.
*Start bit
Acceptance of all the commands of this IC starts at recognition of the start bit.
The start bit means the first “1” input after the rise of CS.
*1 As for read, by continuous SK clock input after setting the read command, data output of the set address starts, and
address data in significant order are sequentially output continuously. (Auto incr ement function)
*2 When the read and the write all commands are executed, data written in the selected memory cell is automatically deleted, and input data is written.
Figure 32-(a) Connection by 4 lines
CS
SK
DO
DI
CS
SK
DO
CS
SK
DI
DO
Figure 32-(b) Connection by 3 lines
CS
SK
DI
DO
CS3
CS1
CS0
SK
DO
DI
CS
SK
DI
DO
Device 1
CS
SK
DI
DO
Device 2
CS
SK
DI
DO
Device 3
Figure 32-(c) Connection example of plural devices
Figure 32. Connection method with microcontroller
Micro-
controller BR93LXX Micro-
controller
Micro-
controller
A7 of BR93L56-W becomes Don't Care.
A9 of BR93L76-W becomes Don't Care.
BR93LXX
Datasheet
Datasheet
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BR93Lxx-W
TSZ02201-0R2R0G100390-1-2
15.Oct.2013 Rev. 002
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Timing Chart
1) Read cycle (READ)
*1 Start bit
When data “1” is input for the first time after the rise of CS, this is recognized as a start bit. And when “1” is input after plural “0” are input, it is recognized as
a start bit, and the following operation is started. This is common to all the commands to described hereafter.
When the read command is recognized, input address data (16bit) is output to serial. And at that moment, at taking A0, in
sync with the rise of SK, “0” (dummy bit) is output. And, the following data is output in sync with the rise of SK.
This IC has an address auto increment function valid only at read command. This is the function where after the above
read execution, by continuously inputting SK clock, the above address data is read sequentially. And, during the auto
increment, keep CS at “H”.
2) Write cycle (WRITE)
In this command, input 16bit data (D15 to D0) are written to designated addresses (Am to A0). The actual write starts b y
the fall of CS of D0 taken SK clock.
When STATUS is not detected, (CS=”L” fixed) Max. 5ms in conformity with tE/W, and when STATUS is detected (CS=”H”),
all commands are not accepted for areas where “L” (BUSY) is output from D0, therefore, do not input any command.
3) Write all cycyle (WRAL)
In this command, input 16bit data is written simultaneously to all adresses. Data is not written continuously per one word
but is written in bulk, the write time is only Max. 5ms in conformity with tE/W.
CS
1
2
1
4
High-Z
1
Am
A1
A0
0
D15 D14 D1
D15 D14
*1
*2
D0
SK
DI
DO
0
n
n+1
CS
1
2
1
4
High-Z
0
A
m
1
0D15 D14 D1
D0
SK
DI
DO
1
n
STATUS
tCS
tSV
BUSY
tE/W
READY
CS
1 2
1
5
High-Z
0 0 0 D15 D14 D1
D0
SK
DI
DO
n
STATUS
tCS
tSV
BUSY
tE/W
READY
1
: n=27, m=7
: n=29, m=9
BR93L46-W : n=25, m=5
BR93L56-W
BR93L66-W
BR93L76-W
BR93L86-W
: n=27
: n=29
BR93L46- W : n=25
BR93L56-W
BR93L66-W
BR93L76-W
BR93L86-W
Figure 33. Read cycle
Figure 34. Write cycle
Figure 35. Write all cycle
: n=27, m=7
: n=29, m=9
BR93L46-W : n=25, m=5
BR93L56-W
BR93L66-W
BR93L76-W
BR93L86-W
Datasheet
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TSZ02201-0R2R0G100390-1-2
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4) Write enable (WEN) / disable (WDS) cycle
At power on, this IC is in write disable status by the internal RESET circuit. Before executing the write command, it is
necessary to execute the write enable command. And, once this command is executed, it is valid unitl the write disable
command is executed or the po wer is turned off. However, the read command is valid irre spective of write enable / diabl e
command. Input to SK after 6 clocks of this command is available by either “H” or “L”, but be sure to input it.
When the write enable command is executed after power on, write enable status gets in. When the write disable
command is executed then, the IC gets in write disable status as same as at power on, and then the write command is
canceled thereafter in software manner. However, the read command is executable. In write enable status, even when the
write command is input by mistake, write is started. To prevent such a mistake, it is recommended to execute the write
disable command after completion of write.
5) Erase cycle timing (ERASE)
In this command, data of the designated address is made into “1”. The data of the designated address becomes “FFFFh”.
Actual ERASE starts at the fall of CS after the fall of A0 taken SK clock.
In ERASE, status can be detected in the same manner as in WRITE command.
6) Chip erase cycle timing (ERAL)
In this command, data of all addresses is erased. Data of all addresses becomes ”FFFFh”.
Actual ERASE starts at the fall of CS after the falll of the n-th clock from the start bit input.
In ERAL, status can be detected in the same manner as in WRITE command.
Figure 36. Write enable (WEN) / disable (WDS) cycle
CS
1
2
1 1 1
4
High-Z
SK
DI
DO
STATUS
tCS
tSV
BUSY
tE/W
READY
Am
A3
A2 A1
n
A0
Figure 37. Erase cycle timing
CS
1
2
1
4
High-Z
SK
DI
DO
STATUS
tCS
tSV
BUSY
tE/W
READY
1
n
0 0
0
Figure 38. Chip eras e cycle timing
: n=11
: n=13
BR93L46- W : n=9
BR93L56-W
BR93L66-W
BR93L76-W
BR93L86-W
BR93L46- W : n=9, m=5
BR93L56-W
BR93L66-W
BR93L76-W
BR93L86-W
: n=11, m=7
: n=13, m=9
BR93L46- W : n=9
BR93L56-W
BR93L66-W
BR93L76-W
BR93L86-W
: n=11
: n=13
CS
1
2
1
5
High-Z
0 0
SK
DI
DO
n3 4 6
7
8
ENABLE=1 1
DISABLE=0 0
Datasheet
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Application
1) Method to cancel each command
READ
WRITE, WRAL
(In the case of BR93L46-W)
1 Address is 8 bits in BR93L56-W, BR93L-66W
Address is 10 bits in BR93L76-W, BR93L86-W
Figure 39. READ cancel available timing
Note 1) If Vcc is made OFF in this area, designated address data is
not guaranteed, therefore write once again.
Note 2) If CS is started at the same timing as that of the SK rise,
write execution/cancel becomes unstable, therefore, it is
recommended to fail in SK=”L” area.
As for SK rise, recommend timing of tCSS/tCSH or higher.
Figure 40. WRITE, WRAL cancel available timing
(In the case of BR93L46-W)
aFrom start bit to 25 clock rise
2
Cancel by CS=“L”
b25 clock rise and after2
Cancellation is not available by any means. If Vcc is made OFF in this area,
designated address data is not guaranteed, ther efore write once again.
And when SK clock is input continuously, cancellation is not available.
*1 Addres s is 8 bits in BR93L56-W, BR93L66-W
Address is 10 bits in BR93L76-W BR93L86-W
*2 27 clocks in BR93L56- W, BR93L66-W
29 clocks in BR93L76-W BR93L86-W
(In the case of BR93L86-W)
aFrom start bit to 29 clock rise
Cancel by CS=“L”
b29 clock rise and after
Cancellation is not available by any means. If Vcc is made OFF in this area,
designated address data is not guaranteed, ther efore write once again.
c30 clock rise and after
Cancel by CS=“L”
However, when write is started in b area (CS is ended), cancellation is not
available by any means.
And when SK clock is output continuously is not available.
SK
DI
29 Rise of c l oc
k
*2
28
D1 D0
29 30 31
b
Enlarged figure
c
a
a
*1
1bit 2bit 10bit 16bit
c
b
Start bit Ope code
A
ddress Data
1bit 2bit 6bit 16bit
Cancel is available in all areas in read mode.
Method to cancelcanc el by CS=“L”
*1
SK
25 Rise of clock *2
D1
Enlarged figure
D0
DI
24 25
a b
*1
1bit 2bit 6bit 16bit
Start bit Ope code
A
ddress Data tE/W
Datasheet
Datasheet
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ERASE, ERAL
2) At standby
Standby current
When CS is “L”, SK input is “L”, DI input is “H”, and eve n with middle electric potential, current does n ot increase.
T iming
As shown in Figure 42, when SK at standby is “H”, if CS is started, DI status may be read at the rise edge.
At standby and at power ON/OFF, when to start CS, set SK input or DI input to “L” status. (Refer to F igure 4 2)
1 Address is 8 bit s in BR93L56-W, BR93L66-W
Address is 10 bits in BR93L76-W
2 11 clocks in BR93L56-W, BR93L66-W
13 clocks in BR93L76-W
Figure 41. ERASE, ERAL cancel available timing
(In the case of BR93L46-W)
aFrom start bit to 9 clock rise2
Cancel by CS=“L”
b9 clock rise and after2
Cancellation is not available by any means. If Vcc is made OFF in this area,
designated address data is not guaranteed, therefore write once again.
And when SK clock is input continuously, cancellation is not available.
(In the case of BR93L86-W)
aFrom start bit to 13 clock rise
Cancel by CS=“L”
b13 clock rise and after
Cancellation is not available by any means. If Vcc is made OFF in this area,
designated address data is not guaranteed, ther efore write once again.
c14 clock rise and after
Cancel by CS=“L”
However, when write is started in b area (CS is ended), cancellation is not
available by any means.
And when SK clock is output continuously is not available.
CS
SK
DI
Start bit input
CS=SK=DI=”H”
Wrong recognition as a start bit
CS
SK
DI
Start bit input
If CS is star ted w hen SK=”L” or DI=”L”, a start
bit is recognized correctly.
Figure 42. Wrong action timing Figure 43. Normal action timing
Note 1) If Vcc is made OFF in this area, designated address data is
not guaranteed, therefore write once again.
Note 2) If CS is started at the same timing as that of the SK rise,
write execution/cancel becomes unstable, therefore, it is
recommended to fail in SK=”L” area.
As for SK rise, recommend timing of tCSS/tCSH or higher.
SK
DI
8
A1 A0
Enlarged figure
9
9 Rise of cloc
k
2
*1
a b
1bit 2bit 6bit
Start bit Ope code
A
ddress 1/2
tE/W
1bit 2bit 10bit
a c
b
*1
Start bit Ope code
A
ddress tE/W
Enlarged figure
SK
DI
13 Rise of c l oc
k
*2
12
D1
13 14 15
b c
a
Datasheet
Datasheet
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3) Equivalent circuit
4) I/O peripheral circuit
4-1) Pull down CS.
By making CS=“L” at power ON/OFF, mistake in operation and mistake write are prevented.
Pull down resistance Rpd of CS pin
To prevent mistake in operation and mistake write at power ON/OFF, CS pull down resistance is necessary. Select an
appropriate value to this resistance value fro m microcontrol ler VOH, IOH, and VIL characteristics of this IC.
4-2) DO is available in both pull up and pull down.
Do output become “High-Z” in other READY / BUSY output timing than after data output at read command and write
command. When malfunction occurs at “High-Z ” input of the microcontroller port connected to DO, it is necessary to
pull down and pull up DO. When there is no influence upon the microcontroller actions, DO may be OPEN.
If DO is OPEN, and at timing to output status READY, at timing of CS=“H”, SK=“H”, DI=“H”, EEPROM recognizes this
as a start bit, resets READY output, and DO=”High-Z”, therefore, READY signal cannot be detected. To avoid such
output, pull up DO pin for improvement.
Figure 49. READY output timing at DO=OPEN
Output circuit
DO
OEint.
Input citcuit
CS CSint.
RESET int.
Input cir cuit
DI
CS int.
Input cir cuit
SK
CS int.
Figure 44. Output circuit (DO)
Figure 46. Input circuit (DI)
Figure 45. Input circuit (CS)
Figure 47. Input circuit (SK)
Microcontroller
VOHM
“H” output IOHM Rpd
VIHE
“L” input
EEPROM
Figure 48. CS pull down resistance
VOHM
IOHM
Rpd ・・・①
2.4
2×10-3
Rpd
1.2 [kΩ]
VOHM VIHE ・・・②
Rpd
Example) When VCC =5V, VIHE=2V, VOHM=2.4V, IOHM=2mA,
from the equation ,
VIHE
VOHM
IOHM
With the value of Rpd to satisfy the above equation, VOHM becomes
2.4V or higher, and VIHE (=2.0V), the equation is also satisfied.
: EEPROM VIH specifications
: Microcontroller VOH specifications
: Microcontroller IOH specifications
CS
SK
DI
DO
D0
BUSY
READY
High-Z
Enlarged
CS
SK
DI
DO
BUSY
High-Z
Improvement by DO pull up
BUSY READY
CS=SK=DI=”H”
When DO=OPEN
CS=SK=DI=”H”
When DO=pull up
DO
“H”
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Pull up resistance Rpu and pull do wn resis tance Rpd of DO pin
As for pull up and pull down resistance value, select an ap propriate value to this resistance value from microcontro ller
VIH, VIL, and VOH, IOH, VOL, IOL characteristics of this IC.
5) READY / BUSY status display (DO terminal)
(common to BR93L46-W ,BR93L56-W , BR93L66-W , BR93L76-W, BR93L86-W)
This display outputs the internal status signal. When CS is started after tCS (Min.200ns)
from CS fall after write command input, “H” or “L” is output.
R/B display“L” (BUSY) = write under execution
After the timer circuit in the IC works and creates the period of tE/W, this time circuit completes automatically.
And write to the memory cell is made in the period of tE/W, and during this period, other command is not accepted.
R/B display = “H” (READY) = command wait status
Even after tE/W (max.5ms) from write of the memory cell, the following command is accepted.
Therefore, CS=“H” in the period of tE/W, and when input is in SK, DI, malfunction may occur, therefore, DI=“L” in the area
CS=“H”. (Especially, in the case of shared input port, attention is required.)
*Do not input any command while status signal is output. Command input in BUSY area is cancelled, but command input in READY area is accepted.
Therefore, status READY output is cancelled, and malfunction and mistake write may be made.
Microcontroller
VILM
“L” input
IOLE VOLE
“L” output
EEPROM
Rpu
Microcontroller
VIHM
“H” input IOHE
VOHE
“H” output
EEPROM
Rpd
Figure 50. DO pull up resistance
Rpu ・・・③
50.4
2.1×10-3
Rpu
2.2 [kΩ]
VOLE VILM ・・・④
Rpu
Example) When VCC =5V, VOLE=0.4V, IOLE=2.1mA, VILM=0.8V,
from the equation ,
VccVOLE
IOLE
With the value of Rpu to satisfy the above equation, VOLE becomes 0.4V
or below, and with VILM(=0.8V), the equation is also satisfied.
Rpd ・・・⑤
50.2
0.1×10-3
Rpd
48 [kΩ]
VOHE VIHM ・・・⑥
Rpd
Example) When VCC =5V, VOHE=Vcc0.2V, IOHE=0.1mA,
VIHM=Vcc×0.7V from the equation ,
VOHE
IOHE
With the value of Rpd to satisfy the above equation, VOHE becomes 2.4V
or below, and with VIHM (=3.5V), the equation is also satisfied.
Figure 51. DO pull down resistance
DO status
DO status
: EEPROM VOL specifications
: EEPROM IOL specifications
: Microcontroller VIL specifications
VOLE
IOLE
VILM
: EEPROM VOH specifications
: EEPROM IOH specifications
: Microcontroller VIH specifications
VOHE
IOHE
VIHM
Figure 52. R/B status output timing chart
tSV
CS
High-Z
SK
DI
DO
CLOCK
WRITE
INSTRUCTION
READY
BUSY
STATUS
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6) When to directly connect DI and DO
This IC has independent input terminal DI and output terminal DO, and separate signals are handled on timing chart,
meanwhile, by inserting a resistance R between these DI and DO terminals, it is possible to carry out control by 1 control
line.
Data collision of microcontroller DI/O output and DO output and feedback of DO output to DI input.
Drive from the microcontroller DI/O output to DI input on I/O timing, and signal output from DO output occur at the
same time in the following points.
(1) 1 clock cycle to take in A0 address data at read command
Dummy bit “0” is output to DO terminal.
When address data A0 = “1” input, through current route o ccurs.
(2) Timing of CS = “H” after write command. DO terminal in READY / BUSY function output.
When the next start bit input is recognized, “HIGH-Z ” gets in.
Especially, at command input after write, when CS input is started with microcontroller DI/O output “L”,
READY output “H” is output from DO terminal, and through current route occurs.
Feedback input at timing of these (1) and (2) does not cause disorder in basic operations, if resistance R is inserted.
Note) As for the case (2), atte ntio n must be paid to the following.
When status READY is output, DO and DI are shared, DI=”H” and the microc ontroller DI/O=”High-Z” or the microcontroller DI/O=”H”,if SK cloc k is
input, DO output is input to DI and is recognized as a start bit, and malfunction may occur. As a method to avoid malfunction, at status READY
output, set SK=“L”, or start CS within 4 clocks after “H” of READY signal is output.
Microcontroller
DI/O PORT
DI
EEPROM
DO
R
Figure 53. DI, DO control line common connection
EEPROM CS input
EEPROM SK input
EEPROM DI input
EEPROM DO output
Microcontroller DI/O port
A1
High-Z
Collision of DI input and DO output
“H”
A0
0 D15 D14 D13
A1 A0 High-Z
Microcontroller output Mic r o cont r ol l e r i n put
Figure 54. Collision timing at read data output at DI, DO direct connectio n
EEPROM CS input
EEPROM SK input
EEPROM DI input
EEPROM DO output
Microcontroller DI/O port
Wri t e c o m mand
Microcontroller output
BUSY
BUSY READY
READY
READY
Collision of DI input and DO output
High-Z
Wri t e c o m mand
Wri t e c o m mand
Wri t e c o m mand
Wri t e c o m mand
Microcontroller input Microcontroller output
Figure 55. Collision timing at DI, DO direct connection
CS
SK
DI
DO
READY
High-Z
Start bit
Because DI=”H”, set
SK=”L” at CS ris e.
Figure 56. Start bit input timing at DI, DO direct connection
Datasheet
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Selection of resistance value R
The resistance R becomes through current limit resistance at data collision. When through current flows, noises of
power source line and instantaneous stop of po wer source may occur. When allo wable through current is defined as I,
the following relation should be satisfied. Determine allowable current amount in consideration of impedance and so
forth of power source line in set. And insert resistance R, and set the value R to satisfy EEPROM input level VIH/VIL
even under influence of voltage decline owing to leak current and so forth. Insertion of R will not cause any influence
upon basic operations.
(1) Address data A0 = “1” input, dummy bit “0” output timing
(When microcontroller DI/O output is “H”, EEPROM DO outputs “L”, and “H” is input to DI)
Make the through current to EEPROM 10mA or below.
See to it that the level VIH of EEPROM should satisfy the following.
(2) DO status READY output timing
(When the microcontroller DI/O is “L”, EEPROM DO output “H”, and “L” is input to DI)
Set the EEPROM input level VIL so as to satisfy the following.
Microcontroller
DI/O PORT DI
EEPROM
DO
R
“H” output
IOHM
VOHM
VOLE
“L” output
Figure 57. Circuit at DI, DO direct connection (Microcontroller DI/O “H” output, EEPROM “L” output)
Conditions VOHM VIHE
VOHM IOHM×R + VOLE
At this moment, if VOLE=0V,
VOHM IOHM×R
R ・・・⑦
VOHM
IOHM
Microcontroller
DI/O PORT DI
EEPROM
DO
R
“L” output
IOHM
VOLM
VOHE “H” output
Conditions
VOLM VILE
VOLM VOHE – IOLM×R
As this moment, VOHE=Vcc
VOLM Vcc – IOLM×R
・・・⑧
Vcc – VOLM
IOLM
Figure 58. Circuit at DI, DO direct connection (Microcontroller DI/O “L” output, EEPROM “H” output)
Example) When Vcc=5V, VOHM=5V, IOHM=0.4mA, VOLM=5V, IOLM=0.4mA,
From the equation , From the equation,
R
R
VOHM
IOHM
5
0.4×10-3
R 12.5 [k] ・・・⑨
R
R
Vcc – VOLM
IOLM
5 – 0.4
2.1×10-3
R 2.2 [k] ・・・⑩
Therefore, from the equations and ,
R 12.5 [k]
: EEPROM VIH specifications
: EEPROM VOL specifications
: Microcontroller VOH specifications
: Microcontroller IOH specifications
VIHE
VOLE
VOHM
IOHM
: EEPROM VIL specifications
: EEPROM VOH specifications
: Microcontroller VOL specifications
: Microcontroller IOL specifications
VILE
VOHE
VOLM
IOLM
Datasheet
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7) Notes on power ON/OFF
At power ON/OFF, set CS “L”.
When CS is “H”, this IC gets in input accept status (active). If power is turned on in this status, noises and the likes may
cause malfunction, mistake write or so. To prevent these, at power ON, set CS “L”. (When CS is in “L” status, all inputs
are cancelled.) And at po wer decline, o wing to po wer line capacity and so forth, low power status may continue long. At
this case too, owing to the same reason, malfunction, mistake write may occur, therefore, at power OFF too, set CS “L”.
POR citcuit
This IC has a POR (Power On Reset) circuit as a mistake write countermeasure. After POR action, it gets in write
disable status. The POR circuit is valid only when po wer is ON, and does not work when power is OFF. However, if CS
is “H” at power ON/OFF, it may become write enable status o wing to noises and the likes. For secure actions, obser ve
the follwing conditions.
1. Set CS=”L”
2. Turn on power so as to satisfy the recommended conditions of tR, tOFF, Vbot for POR circuit action.
LVCC circuit
LVCC (VCC-Lockout) circuit prevents data rewrite action at low power, and prevents wrong write.
At LVCC voltage (Typ.=1.2V) or below, it prevent data rewrite.
8) Noise countermeasur es
VCC noise (bypass capacitor)
When noise or surge gets in the power source line, malfunction may occur, therefore, for removing these, it is
recommended to attach a by pass capacitor (0.1µF) between IC VCC and GND, At that moment, attach it as close to IC
as possible.And, it is also recommended to attach a bypass capacitor between board VCC and GND.
SK noise
When the rise time (tR) of SK is long, and a certain degree or more of noise exists, malfunction may occur owing to
clock bit displacement. To avoid this, a Schmitt trigger circuit is built in SK input. The hysteresis width of this circuit is
set about 0.2V, if noises exist at SK input, set the noise amplitude 0.2Vp-p or below. And it is recommended to set the
rise time (tR) of SK 100ns or below. In the case when the rise time is 100ns or higher, take sufficient noise
countermeasures. Make the clock rise, fall time as small as possible.
tOFF
tR
Vbot
0
VCC
tRtOFF Vbot
10m s or below 10ms or higher 0.3V or below
100m s or below 10m s or higher 0.2V or below
Fi
g
ure 60. Rise waveform dia
g
ram
Bad exampleCS pin is pulled up to Vcc.
In this case, CS becomes “H” (active status), and EEPROM may have malf unction,
mistake write owing to noise and the likes.
Even when CS in
p
ut is Hi
g
h-Z, the status becomes like this case, which
p
lease note.
Good exampleIt is “L” at power ON/OFF.
Set 10ms or higher to recharge at power OFF.
When power is turned on without observing this condition,
I C internal circuit may not be reset, which please note.
Recommended conditions of tR, tOFF, Vbot
VCC
GND
VCC
GND
VCC
CS
Bad example
Good example
Figure 59. Timing at power ON/OFF
Datasheet
Datasheet
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Notes for Use
(1) Described numeric values and data are design representative values, and the values ar e not guaranteed.
(2) We believe that application circuit examples are recommend able, however, in actual use, confirm characteristics further
sufficiently. In the case of us e by changing the fixed number of external parts, make your decision with sufficient margin in
consideration of static characteristics and transition characteristics an d fluctuations of external parts and our IC.
(3) Absolute Maximum Ratings
If the absolute maximum ratings such as impressed voltage and action temperature range and so forth are exceeded, IC
may be destructed. Do not impress voltage and temperature exceeding the absolute maximum ratings. In the case of
fear exceeding the absolute maximum ratings, take physical safety countermeasures such as fuses, and see to it that
conditions exceeding the absolute maximum ratings should not be impressed to IC.
(4) GND electric potential
Set the voltage of GND terminal lowest at any action condition. Make sure that each terminal voltage is not lower than
that of GND terminal in consideration of transition status.
(5) Heat design
In consideration of allowable loss in actual use condition, carry out heat design with sufficient margin.
(6) Terminal to terminal shortcircuit and wrong packaging
When to package IC onto a board, pay sufficient attention to IC direction and displacement. Wrong packaging may
destruct IC. And in the case of shortcircuit between IC terminals and terminals and power source, terminal and GND
owing to foreign matter, IC may be destructed.
(7) Use in a strong electromagnetic field may cause malfunction, therefore, evaluate design sufficiently
Status of this document
The Japanese version of this docum ent is formal specification. A customer may use this translati on version only for a referenc e
to help reading the formal version.
If there are any differences in translation version of this docum ent formal version takes priority.
Datasheet
Datasheet
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Ordering Information
Product Code Description
B R 9 3 L x x x x - W x x
BUS Type
93Microwire
Operating temperature
-40 to +85
Capacity
46=1K 76=8K
56=2K 86=16K
66=4K
Package type
F, RF : SOP8
FJ, RFJ : SOP-J8
FV, RFV : SSOP-B8
FVT, RFVT : TSSOP-B8
RFVJ : TSSOP-B8J
RFVM
Blank : MSOP8
: DIP-T8
Double cell
Package specifications
E2 reel shape emboss taping
TR reel shape emboss taping
Datasheet
Datasheet
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Physical Dimension Tape and Reel Information
Order quantity needs to be multiple of the minimum quantity.
<Tape and Reel information>
Embossed carrier tapeTape
Quantity
Direction
of feed
The direction is the 1pin of product is at the upper left when you hold
reel on the left hand and you pull out the tape on the right hand
2500pcs
E2
()
Direction of feed
Reel 1pin
(Unit : mm)
SOP8
0.9±0.15
0.3MIN
4
°
+
6
°
4
°
0.17 +0.1
-
0.05
0.595
6
43
8
2
5
1
7
5.0±0.2
6.2±0.3
4.4±0.2
(MAX 5.35 include BURR)
1.27
0.11
0.42±0.1
1.5±0.1
S
0.1 S
Datasheet
Datasheet
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Physical Dimension Tape and Reel Information - Continued
Order quantity needs to be multiple of the minimum quantity.
<Tape and Reel information>
Embossed carrier tapeTape
Quantity
Direction
of feed
The direction is the 1pin of product is at the upper left when you hold
reel on the left hand and you pull out the tape on the right hand
2500pcs
E2
()
Direction of feed
Reel 1pin
(Unit : mm)
SOP-J8
4°+6°
4°
0.2±0.1
0.45MIN
234
5678
1
4.9±0.2
0.545
3.9±0.2
6.0±0.3
(MAX 5.25 include BURR)
0.42±0.1
1.27
0.175
1.375±0.1
0.1 S
S
Datasheet
Datasheet
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Physical Dimension Tape and Reel Information – Continued
Order quantity needs to be multiple of the minimum quantity.
<Tape and Reel information>
Embossed carrier tapeTape
Quantity
Direction
of feed
The direction is the 1pin of product is at the upper left when you hold
reel on the left hand and you pull out the tape on the right hand
2500pcs
E2
()
Direction of feed
Reel 1pin
(Unit : mm)
SSOP-B8
0.08
M
0.3MIN
0.65
(0.52)
3.0±0.2
0.15±0.1
(MAX 3.35 include BURR)
S
S
0.1
1234
5678
0.22
6.4±0.3
4.4±0.2
+0.06
0.04
0.1
1.15±0.1
Datasheet
Datasheet
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TSZ2211115001
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Physical Dimension Tape and Reel Information – Continued
Direction of feed
Reel
Order quantity needs to be multiple of the minimum quantity.
<Tape and Reel information>
Embossed carrier tapeTape
Quantity
Direction
of feed The direction is the 1pin of product is at the upper left when you hold
reel on the left hand and you pull out the tape on the right hand
2500pcs
E2
()
1pin
(Unit : mm)
TSSOP-B8J
0.08 M
0.08 S
S
4 ± 4
(MAX 3.35 include BURR)
578
1234
6
3.0±0.1
1PIN MARK
0.95±0.2
0.65
4.9±0.2
3.0±0.1
0.45±0.15
0.85±0.05
0.145
0.1±0.05
0.32
0.525
1.1MAX
+0.05
0.03
+0.05
0.04
Datasheet
Datasheet
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©2012 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
www.rohm.com
Physical Dimension Tape and Reel Information – Continued
Direction of feed
Reel
Order quantity needs to be multiple of the minimum quantity.
<Tape and Reel information>
Embossed carrier tapeTape
Quantity
Direction
of feed The direction is the 1pin of product is at the upper left when you hold
reel on the left hand and you pull out the tape on the right hand
3000pcs
E2
()
1pin
(Unit : mm)
TSSOP-B8
0.08 S
0.08 M
4 ± 4
234
8765
1
1.0±0.05
1PIN MARK
0.525
0.245+0.05
0.04
0.65
0.145+0.05
0.03
0.1±0.05
1.2MAX
3.0±0.1
4.4±0.1
6.4±0.2
0.5±0.15
1.0±0.2
(MAX 3.35 include BURR)
S
Datasheet
Datasheet
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©2012 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
www.rohm.com
Physical Dimension Tape and Reel Information – Continued
Direction of feed
Reel
Order quantity needs to be multiple of the minimum quantity.
<Tape and Reel information>
Embossed carrier tapeTape
Quantity
Direction
of feed The direction is the 1pin of product is at the upper right when you hold
reel on the left hand and you pull out the tape on the right hand
3000pcs
TR
()
1pin
(Unit : mm)
MSOP8
0.08 S
S
4.0±0.2
8
3
2.8±0.1
1
6
2.9±0.1
0.475
4
57
(MAX 3.25 include BURR)
2
1PIN MARK
0.9MAX
0.75±0.05
0.65
0.08±0.05
0.22 +0.05
0.04
0.6±0.2
0.29±0.15
0.145 +0.05
0.03
4°
+6°
4°
Datasheet
Datasheet
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©2012 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
www.rohm.com
Physical Dimension Tape and Reel Information – Continued
Order quantity needs to be multiple of the minimum quantity.
<Tape and Reel information>
TubeContainer
Quantity
Direction of feed 2000pcs
Direction of products is fixed in a container tube
(Unit : mm)
DIP-T8
0°−15°
7.62
0.3±0.1
9.3±0.3
6.5±0.3
85
14
0.51Min.
3.4±0.3
3.2±0.2
2.54 0.5±0.1
Datasheet
Datasheet
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©2012 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
www.rohm.com
Marking Diagrams
TSSOP-B8(TOP VIEW)
Part Number Marking
LOT Number
1PIN MARK
SSOP-B8(TOP VIEW) Part Number Marking
LOT Number
1PIN MARK
TSSOP-B8J(TOP VIEW) Part Number Marking
LOT Number
1PIN MARK
MSOP8(TOP VIEW)
Part Number Marking
LOT Number
1PIN MARK
SOP8(TOP VIEW)
Part Number Marking
LOT Number
1PIN MARK
SOP-J8(TOP VIEW)
Part Number Marking
LOT Number
1PIN MARK
DIP-T8 (TOP VIEW)
Part Number Marking
LOT Number
Datasheet
Datasheet
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©2012 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
www.rohm.com
Marking Information
Capacity Product
Name
Marking Package Type Orderable Part Number
1K
L46
RL46 SOP8 BR93L46F-WE2
BR93L46RF-WE2
L46
RL46 SOP-J8 BR93L46FJ-WE2
BR93L46RFJ-WE2
L46
RL46 SSOP-B8 BR93L46FV-WE2
BR93L46RFV-WE2
R46 TSSOP-B8J BR93L46RFVJ-WE2
L46
RL46 TSSOP-B8 BR93L46FVT-WE2
BR93L46RFVT-WE2
R46 MSOP8 BR93L46RFVM-WTR
BR93L46 DIP-T8 BR93L46-W
2K
L56
RL56 SOP8 BR93L56F-WE2
BR93L56RF-WE2
L56
RL56 SOP-J8 BR93L56FJ-WE2
BR93L56RFJ-WE2
L56
RL56 SSOP-B8 BR93L56FV-WE2
BR93L56RFV-WE2
R56 TSSOP-B8J BR93L56RFVJ-WE2
L56
RL56 TSSOP-B8 BR93L56FVT-WE2
BR93L56RFVT-WE2
R56 MSOP8 BR93L56RFVM-WTR
BR93L56 DIP-T8 BR93L56-W
4K
L66
RL66 SOP8 BR93L66F-WE2
BR93L66RF-WE2
L66
RL66 SOP-J8 BR93L66FJ-WE2
BR93L66RFJ-WE2
L66
RL66 SSOP-B8 BR93L66FV-WE2
BR93L66RFV-WE2
R66 TSSOP-B8J BR93L66RFVJ-WE2
L66
RL66 TSSOP-B8 BR93L66FVT-WE2
BR93L66RFVT-WE2
R66 MSOP8 BR93L66RFVM-WTR
BR93L66 DIP-T8 BR93L66-W
8K
L76
RL76 SOP8 BR93L76F-WE2
BR93L76RF-WE2
L76
RL76 SOP-J8 BR93L76FJ-WE2
BR93L76RFJ-WE2
RL76 SSOP-B8 BR93L76RFV-WE2
R76 TSSOP-B8J BR93L76RFVJ-WE2
RL76 TSSOP-B8 BR93L76RFVT-WE2
R76 MSOP8 BR93L76RFVM-WTR
BR93L76 DIP-T8 BR93L76-W
16K
L86
RL86 SOP8 BR93L86F-WE2
BR93L86RF-WE2
L86
RL86 SOP-J8 BR93L86FJ-WE2
BR93L86RFJ-WE2
RL86 SSOP-B8 BR93L86RFV-WE2
R86 TSSOP-B8J BR93L86RFVJ-WE2
RL86 TSSOP-B8 BR93L86RFVT-WE2
R86 MSOP8 BR93L86RFVM-WTR
BR93L86 DIP-T8 BR93L86-W
Datasheet
Datasheet
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©2012 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
www.rohm.com
Revision History
Date Revision Changes
31.Aug.2012 001 New Release
15.Oct.2013 002 Page34 Modify the Marking of MSOP8 pachage of 8K and 16K.
Datasheet
Datasheet
Notice - GE Rev.002
© 2014 ROHM Co., Ltd. All rights reserved.
Notice
Precaution on using ROHM Products
1. Our Products are designed and manufactured for application in ordinary electronic equipments (such as AV equipment,
OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you
intend to use our Products in devices requiring extremely high reliability (such as medical equipment (Note 1), transport
equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car
accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or
serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance.
Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any
damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific
Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN USA EU CHINA
CLASS CLASS CLASSb CLASS
CLASS CLASS
2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3. Our Products are designed and manufactured for use under standard conditions and not under any special or
extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any
special or extraordinary environments or conditions. If you intend to use our Products under any special or
extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of
product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of
flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning
residue after soldering
[h] Use of the Products in places subject to dew condensation
4. The Products are not subject to radiation-proof design.
5. Please verify and confirm characteristics of the final or mounted products in using the Products.
6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7. De-rate Power Dissipation (Pd) depending on Ambient temperature (Ta). When used in sealed area, confirm the actual
ambient temperature.
8. Confirm that operation temperature is within the specified range described in the product specification.
9. ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1. When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2. In principle, the reflow soldering method must be used; if flow soldering method is preferred, please consult with the
ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Datasheet
Datasheet
Notice - GE Rev.002
© 2014 ROHM Co., Ltd. All rights reserved.
Precautions Regarding Application Examples and External Circuits
1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2. You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1. Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2. Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3. Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4. Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
QR code printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since our Products might fall under controlled goods prescribed by the applicable foreign exchange and foreign trade act,
please consult with ROHM representative in case of export.
Precaution Regarding Intellectual Property Rights
1. All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data. ROHM shall not be in any way responsible or liable
for infringement of any intellectual property rights or other damages arising from use of such information or data.:
2. No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the information contained in this document.
Other Precaution
1. This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2. The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3. In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4. The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
DatasheetDatasheet
Notice – WE Rev.001
© 2014 ROHM Co., Ltd. All rights reserved.
General Precaution
1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents.
ROHM shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the la test information with a ROHM sale s
representative.
3. The information contained in this doc ument is provi ded on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate an d/or error-free. ROHM shall not be in an y way responsible or
liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccuracy or errors of or
concerning such information.