ICL7663SIBA - Intersil Corporation

File Number 3180.3

ICL7663S

CMOS Programmable Micropower

Positive Voltage Regulator

The ICL7663S Super Programmable Micropower Voltage

Regulator is a low power, high efficiency positive voltage

regulator whi ch accept s 1.6V to 16V inputs and provides

adjustable outputs from 1.3V to 16V at currents up to 40mA.

It is a di rect repl acem ent for the industry standard I CL7663B

offering wider operat ing voltage and temper ature ranges,

improved output acc ura cy (ICL7 663SA), better tem peratur e

coefficient, guaranteed maximum supply current, and

guarantee d li ne and load reg ulation. All impr ovem ents are

highlighted in the electri cal char acteristics secti on. Critical

parameters are guarant eed over the ent ire commercial

and industrial temperature ranges. The ICL7663S/SA

progr ammable output voltage is se t by two extern al resist ors.

The 1% ref erence a ccur acy of t he ICL766 3SA eli mina tes t he

need for trimming the output voltage in most applications.

The ICL7663S is well sui ted for battery power ed suppli es,

feat uring 4µA quiescent cu rrent, low VIN to VOUT diff erential,

output current sens ing and logic i nput lev el shutdown

control. I n addition, the ICL7663S has a negative

temperatu re coefficient out put sui table for generati ng a

temperatu re compensated display drive voltage for LCD

displays.

Features

•Guaranteed 10µA Maximum Quiescent Current Over All

Temperature Range s

•Wider Operat ing Voltage Range - 1.6V to 16V

•Guaranteed Line and Load Regulation Over Entire

Operati ng Tem perat ure Range Optional

• 1% Output Voltage Accuracy (ICL7663SA)

• Output Voltage Programmable from 1.3V to 16V

•Improved Temperature Coefficient of Output Voltage

• 40mA Minimum Output Current with Current Limiting

• Output Vol tages with Prog ramm able Negative

Temperature Coeffi cient s

• Output Shut down via Current-Limit Sensing or Ex ter nal

Logic Level

• Low Input-to-Output Voltage Di fferenti al

• Improved Direct Repl acement f or In dustry Standard

ICL7663B and Other Secon d-Source Products

Applications

• Low-Power Por table Inst rumentation

• Pagers

• Handhe ld Instruments

• LCD Display Modules

• Remote Data Loggers

• Battery-Powered Systems

Pinout

ICL7663S

(PDIP, CERDIP, SOIC)

TOP VIEW

Ordering Information

PART NUMBER TEMP. RANGE

(oC) PACKAGE PKG. NO.

ICL7663SCBA 0 to 70 8 Ld SOIC (N) M8.15

ICL7663SCPA 0 to 70 8 Ld PDIP E8.3

ICL7663SACBA 0 to 70 8 Ld SOIC (N) M8.15

ICL7663SACPA 0 to 70 8 Ld PDIP E8.3

ICL7663SIBA -25 to 85 8 Ld SOIC (N) M8.15

ICL7663SIPA -25 to 85 8 Ld PDIP E8.3

ICL7663SAIBA -25 to 85 8 Ld SOIC (N) M8.15

ICL7663SAIPA -25 to 85 8 Ld PDIP E8.3

SENSE

VOUT2

VOUT1

GND

VIN+

VTC

VSET

SHDN

Data S heet Apri l 1999

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-8 88-INTERS IL or 321-724-7143 |Intersil (and design) is a trademark of Intersil Americas Inc.

Absolute Maximum Ratings Thermal Information

Input Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+18V

Any Input or Output Voltage (N ote 1)

Term in al s 1, 2, 3, 5, 6, 7. . . . . . . . . . . . . VIN+ 0.3V to GND -0.3V

Output Source Current

Terminal 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50mA

Terminal 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25mA

Output Sinking Current

Terminal 7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -10mA

Ope rat i ng Condi tio ns

Te mp eratu r e R an ge

ICL7663SC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 70oC

ICL7663SI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -25oC to 85oC

Thermal Resistance (Typical, Note 2) θJA (oC/W) θJC (oC/W)

CERDIP Package. . . . . . . . . . . . . . . . . 1 15 30

PDIP Package . . . . . . . . . . . . . . . . . . . 150 N/A

Plastic SOIC Package . . . . . . . . . . . . . 180 N/A

Maximum Junction Temperatur e

PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150oC

CERDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175oC

Maximum Storage Temperature Range . . . . . . . . . -65oC to 150oC

Maximum Lead Temperature (Soldering 10s). . . . . . . . . . . . .300oC

(SOIC - Lead Tips Only)

CAUTIO N: S tresses abov e those l isted i n “ A bsolute Max imum Ra ting s” ma y cause per manen t dam age to th e de vice. This is a s tress on l y rating and ope ration of th e

device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTES:

1. Connecting any terminal to voltages greater than (V+IN + 0.3V) or less than (GND - 0.3V) may cause destructive device latch-up. It is recom-

mended that no inputs from s ources operating on exter nal pow er supplies be applied prior to ICL7663S power-up.

2. θJA is me asured with the component mou nted on an eval uation PC b oard in free air.

Electrical Speci fications Specifications Below Applicable to Both ICL7663S and ICL7663SA, Unless Otherwi se Specified. V+IN = 9V,

VOUT = 5V, TA = 25oC, Unless Otherwise Specified. Notes 4, 5. See Test Circuit, Figure 7

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Input Voltage V+IN ICL7663S TA = 2 5 oC1.5-16V

0oC < TA < 70oC1.6-16V

-25oC < TA < 85oC1.6- 16V

ICL7663SA 0oC < TA < 70oC1.6-16V

-25oC < TA < 85oC1.6- 16V

Qu iesc en t C ur re nt I Q1.4V ≤ VOUT ≤ 8. 5V, No Load

V+IN = 9 V 0oC < TA < 70oC--10µA

-25oC < TA < 85oC--10µA

V+IN = 1 6V 0oC < TA < 70oC--12µA

-25oC < TA < 85oC--12µA

Reference V oltage VSET IOUT1 = 10 0µA, VOUT = VSET

ICL7663S TA = 25 oC 1.2 1.3 1.4 V

ICL7663SA TA = 25oC 1.275 1.29 1.305 V

Temperature

Coefficient ∆VSET

∆T

0oC < TA < 70oC - 100 - ppm

-25oC < TA < 85oC - 100 - ppm

Line Regu lation ∆VSET

VSET’ ∆VIN

2V < VIN < 15V 0oC < TA < 70oC-0.03-%/V

-25oC < TA < 85oC - 0.03 0.3 %/V

VSET Input Current ISET 0oC < TA < 70oC - 0.01 10 nA

-25oC < TA < 85oC - 0.01 10 nA

Shutdown Input Current ISHDN -±0.01 10 nA

Shutdown Input Voltage VSHDN VSHDN HI: Both VOUT Disabled 1.4 - - V

VSHDN LO: Both VOUT Ena ble - - 0.3 V

Sense Pin Input Current ISENSE -0.0110nA

Sense Pin Input Threshold VCL -0.5- V

ICL7663S

Funct ional Diagram

Inp ut-O utp ut Sat ura ti on

Resistance (Note 3) RSAT V+IN = 2 V, IOUT1 = 1mA - 170 350 Ω

V+IN = 9 V, IOUT1 = 2m A - 50 100 Ω

V+IN = 15V, IOUT1 = 5mA - 35 70 Ω

Load Regulation ∆VOUT

∆IOUT

1mA < IOUT2 < 20mA - 1 3 Ω

50µA < IOUT1 < 5 m A - 2 1 0 Ω

Available Output Current

(VOUT2)IOUT2 3V ≤ VIN ≤ 16V, VIN - VOUT2 = 1.5V 40 - - mA

Negative Tempco Output

(N ote 4) VTC Ope n C irc uit Voltag e - 0 . 9 - V

ITC Ma ximum Sink Cu rrent 0 8 2. 0 mA

Temperature Coe ffici ent ∆VTC

∆T

Open Circuit - +2.5 - mV/oC

Minimum Load Current IL(MIN) Includes VSET Divider TA = 25 oC--1.0µA

0oC < TA < 70oC-0.25.0µA

-25oC < TA < 85oC-0.25.0µA

NOTES:

3. This parameter refers to the saturation resistance of the MOS pass transistor. The minimum input-output voltage differential at low curr ent ( unde r

5m A), can be determined by m ultiply ing the load current (including s et resistor current, but not quiescent current) by this re sistance.

4. This outp ut has a positive temp erature coefficient. Us ing it in combination with the inverting input of the regulator at VSET, a negative

coefficient results in the output voltage. See Figure 9 for details. Pin will not source current.

5. All pins are designed to withstand electrostatic discharge (ESD) levels in excess of 2000V.

6. All significant improvements over the industry stand ard ICL7663 a re high lighted.

Electrical Speci fications Specifications Below Applicable to Both ICL7663S and ICL7663SA, Unless Otherwi se Specified. V+IN = 9V,

VOUT = 5V, TA = 25oC, Unless Otherwise Specified. Notes 4, 5. See Test Circuit, Figure 7 (Continued)

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

REF B

VOUT1

VOUT2

SENSE

VSET

VTC

SHUTDOWN

GND

V+IN 8

GND

ICL7663S

Typical Perfo rmance Curves

FIGURE 1. VOUT2 OUTPUT VOLTAGE AS A FUNCTION OF

OUTPUT CURRENT FIGURE 2. VOUT1 INPUT-OUTPUT DIFFERENTIAL vs

OUTPUT CURRENT

FIGURE 3. VOUT2 INPUT-OUTPUT DIFFERENTIAL vs

OUTPUT CURRENT FIGURE 4. NPUT POWER SUPPLY REJECTION RATIO

FIGURE 5. QUIESCENT CURRENT AS A FUNCTION OF

INPUT VOLTAGE FIGURE 6. QUIESCENT CURRENT AS A FUNCTION OF

TEMPERATURE

5.000

4.995

4.990

4.985

4.980

4.975

4.970

4.965

4.960

4.955

4.950

VOUT (V)

10-2 10-1 100101102

10-3

IOUT (mA)

TA = 25oC

V+ = 9.0V

2.0

1.8

1.6

1.4

1.2

1.0

0.8

0.6

0.4

0.2

002468101214161820

TA = 25oC

V+IN = 15V

V+IN - VOUT1 (V)

IOUT1 (mA)

V+IN = 9V

V+IN = 2V

IOUT2 (mA)

V+IN - VOUT1 (V)

2.0

1.8

1.6

1.4

1.2

1.0

0.8

0.6

0.4

0.2

00 5 10 15 20 25 30 35 40 45 50

V+IN = 9V

TA = 25oC

V+IN = 2V

V+IN = 15V

10-2 10-1 1001011021k

100

PSRR (dB)

FREQUENCY (Hz)

VIN = 9.0V

∆VIN = 2V

TA = -20oC

5.0

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

00246810121416

V+IN (V)

IO (µA)

TA = -25oC

TA = -70oC

5.00

4.75

4.50

4.25

4.00

3.75

3.50

3.25

3.00

2.75

2.50

IO (µA)

V+ = 15V

V+ = 9V

V+ = 2V

-20 0 20 40 60 80

TEMPERATURE (oC)

ICL7663S

Detailed Description

The ICL7663S is a CMOS in tegrated cir cuit incorporatin g all

the functions of a voltage regulator plus protection circuitry

on a singl e m onolit hic chip. Referri ng to the Funct ional

Diagram, the main blocks are a bandgap-t ype voltage

referen ce, an error amplifier, a nd an output driver with bot h

PMOS and NPN pass transistors.

The bandgap output volt age, trimmed to 1.29V ±15mV for

the ICL7663SA, and the input volt age at the VSET terminal

are compared in amplifi er A. Error amplifier A drives a

P-channel pass transistor which is sufficient for lo w (under

about 5mA) currents. The high current output is passed by

an NPN bipolar transistor connected as a follower. This

confi guration gives more gain and lower output impedance.

Logic-c ontrolled shutdown is impl em ented via a N-Channel

MOS transistor. Current -sensing is achieved with

com parator C, which functions with the VOUT2 terminal. The

ICL7663S has an output (VTC) from a buffer ampl ifier (B),

which can be used in combination wit h am plifier A to

generate programma ble-tem perature-coef ficient output

voltages.

The am plif ier, reference and comp arator circu it ry all operat e

at bi as l evels wel l below 1µA to achieve extremely low

quiescent current. This does limit the dynamic response of

the circuits, however, and transients are best dealt with

outside the r egulator loop.

Basic Operation

The ICL 7663S is desi gne d to reg ulate batter y volt ages i n t he

5V to 15V region at maximum l oad currents of about 5mA to

30mA. Although intended as low power devices, power

dissip ation limits m ust be obs erved. For example, the power

dissip ation in t he case of a 10V supply regulated down to 2 V

with a load current of 30mA clearly exceeds the power

dissip ation ra ti ng of the Mini-DIP:

(10 - 2) (30) (10-3) = 240mW

The circuit of Figu re 8 illustrates proper use of t he device.

CMOS devices generally r equir e two precautions: every

input pin mus t go somewhere, and maximum values of

applied voltages and current limits must be rigorously

observed. Neglecting these precau ti ons m ay lead to, at the

least , incorrect or nonoperation, and at worst, destructiv e

device failur e. To avoid the problem of latch up, do not apply

inputs to any pins before supply vol tage is applied.

Input Voltages - The ICL7663S accepts working input s of

1.5V to 16V. W hen power is applied, the r ate-of-rise of the

input may be hundreds of volts per microsecond. This is

potentially harmful to the regulators, where internal

operating curren ts ar e in the nanoampere ra nge. The

0.047µF capacitor on the devi ce side of the swi tch will lim it

inputs to a safe level arou nd 2V/µs. Use of this capacitor is

suggested in all applications. I n severe rate-of- ri se ca ses, it

may be adv isable to use an RC network on the SHutDowN

pin to delay output turn-on. Batter y char ging surges,

transients, and assort ed noise signal s should be kept from

the regula tor s by RC fi lt ering, zener pro tection, or even

fusing.

Output Vol tages - The resistor divid er R2/R1 is used to

scale the reference voltage, VSET, to the desired output

using the formula VOUT = (1 + R2/R1) VSET. Suitable

arrangements of these resi stors, using a potentiometer,

enables exact values for VOUT to be obtained. In most

appli cations the potentiom eter may be eliminat ed by using

the ICL7663SA. T he ICL7663SA has VSET vol tage

guaranteed to be 1.29V ±15mV and when used with ±1%

tolerance res istors for R1 and R2 the ini tial ou tput voltage

will be within ±2.7% of ideal.

The low l eakage curren t of the VSET terminal allows R1 and

R2 to be tens of m egohms for mi nimum a dditional quiescent

drain current. However, som e load current is r equire d for

proper operati on, so fo r extremel y low-d rain appl icat ions it is

necessary to draw at le ast 1µA. This can inc lude th e current

for R2 and R1.

Output volt ages u p to near ly th e VIN suppl y may b e obt ained

at low load currents, while t he low l imi t i s the r eference

voltage. The minimum input-output differential in each

regulator is obtained using the VOUT1, termin al . Th e in put-

output differenti al inc reases to 1.5V when using VOUT2.

Output Cu rrents - Low ou tpu t curr ents of less t han 5mA ar e

obtai ned with the least input-output diff erential from the

VOUT1 terminal (connect VOUT2 to VOUT1). Where higher

currents are needed, use VOUT2 (VOUT1, should be left

open in this case).

SHDN

VOUT2

VOUT1

VTC

VSET

SENSE

GND

1µA MIN

S2S1

RCL

RLCL

(7663 ONLY)

VOUT

OFF

1MΩ1.4V < VSHDN < V+IN

0.047µF

-M

NOTES:

7. S1 when closed disables output current limiting.

8. Cl os e S 2 fo r VOUT1, open S2 for VOUT2.

9. IQ quiescent currents measured at GND pin by meter M.

10. S3 when ON, p er mit s nor mal ope rat i on, whe n OF F, sh uts do w n

both VOUT1 and VOUT2.

FIGURE 7. ICL7663S TEST CIRCUIT

ICL7663S

High output currents can be ob tained only as far as package

dissip ation allows. It i s str ongly recommended that output

current-limit sensing be used in such cases.

Current-Limit Sensing - The on-chip comparator (C in the

Functional Diagram ) permits shutdown of the regulator

output in the event of excessive current drain. As Figure 8

shows, a cur rent-li miting resistor, RCL, is placed in series

with VOUT2 and the SENSE terminal is connec ted to the

load si de of RCL. When the current thr ough RCL is high

enough to produce a voltage drop equal to VCL (0.5V) the

voltage feedback is by-passed and the regulator output will

be l imite d to t his c urr ent. Theref ore, wh en the maximum loa d

curr ent ( ILOAD) is determi ned, si mpl y div ide V CL by ILOAD to

obtain the val ue for RCL.

Logic- C ontrollable Shutdown - When equipment is not

needed continuou sly (e.g., in remote data-acquis it ion

systems), it is desirable to eliminate its drain on the system

until it is required. This usuall y means switches, with their

unreliable contacts. Instead, the ICL7663S can be shut

down by a logic signal, leaving only IQ (u nder 4µA) as a

drain on the powe r source. Since this pin must not be lef t

open, it should be tied to ground if not needed. A voltage of

less than 0.3V for the ICL7663S will keep the regulator ON,

and a voltage level of more than 1.4V but le ss than V+IN will

turn the outputs OF F. If there is a possibility that the contr ol

signal coul d exceed the regulator input ( V+IN) the current

from this signal sho uld be limited to 100µA max imum by a

high value (1MΩ) series resis tor. This situation may occ ur

when the logic signal originates from a system powered

separately from th at of the regulator.

Additional Cir cuit Precauti ons - This re gulato r has poor

rejection of voltage fluctuat ions from AC sources above

10Hz or so. To preve nt the outp ut f rom responding (where

this might be a problem), a reservo ir capacitor acros s the

load is advised. The value of this capacitor is chosen so that

the reg ulated output vol tage rea ches 90 % of its final value in

20ms . Fro m:

In add iti on, wher e suc h a capaci tor is used, a current -li miti ng

resistor is also suggested (see “Current-Limi t Sensi ng”).

Producing Output Volt ages wit h Negative Temperature

Coefficients -The ICL 7663S has an addi ti onal output which

is 0. 9V rel ative to GND and has a tempco of +2.5mV/oC. By

applyin g this voltage to the inverting input of amplifier A (i.e.,

the VSET pin), out put voltages having negative TC may be

produced. The TC of the output voltage is control led by the

R2/R3 ratio (se e Figure 9 and its design equations).

Applications

Boosting Output Current with External Transi stor

The max imum avail able outp ut curr ent from th e IC L7663S is

40mA. To obtain output currents gr eater th an 40m A, an

external NPN transistor is used connected as shown in

Figure 10.

SHDN

VOUT2

VOUT1

VTC

VSET

SENSE

GND

VIN 0.047µF

V+IN

604kΩ

RCL

20Ω

210kΩR1

10µFVOUT

+5V

FIGURE 8. POSITIVE REGULATOR W ITH CURRENT LIM IT

OUT = R2 + R 1

R1VSET = 5V

ICL = VCL

RCL = 2 5mA

I = ∆V

C ,C

∆t=

IOUT

(20 x 10-3)

0.9VOUT = 0.022 IOUT

VOUT

VREF

VSET

+VTC -

R1R2

VOUT

here:VSET = 1.3V

TC = 0.9V

CVTC = +2.5mV/oC

FIGURE 9. GENERATING NEGATIVE TEMPERATURE

COEFFICIENTS

EQ. 1: VOUT = VSET (R2

1 + R1

)R2

+ R3(VSET - VTC)

EQ. 2: TC VOUT = R2

-R3(TC VTC) in mV/oC

SHDN

VOUT2

VOUT1

VSET

SENSE

GND

VIN 10µF

V+IN

604kΩ

100Ω

210kΩ

VOUT

+5V

0.47Ω

EXTERNAL PIN

POWER

TRANSISTOR

FIGURE 10. BOOSTING OUTPUT CURRENT WITH EXTERNAL

TRANSISTOR

ICL7663S

Generati ng a Temperatu re Comp ensa ted Display Drive Voltage

Temperature has an important effect in the variati on of

threshold volt age in multiplexed LCD displays . As

temperature rises, the threshold volt age goes down. For

appli cations where the display temperature vari es widely, a

temperature compe nsated display vol tage, VDISP, can be

generated using the ICL7663S. This is shown in Figure 11

for t he ICM7233 tri plexed LCD display driver.

VOUT2

VOUT1

VSET

GND

V+IN

VTC

VDISP

ICM7233

ICL7663S

GND

DATA BUS

V+

+5V

1.8MΩ

300kΩ

2.7MΩ

LOGIC

SYSTEM,

PROCESSOR,

ETC.

GND

FIGURE 11. GENERATING A MULTIPLEXED LCD DISPLAY DRIVE VOLTAGE

ICL7663S