19-1196; Rev 0; 2/97 MA AXILAMN Low-Power, 12-Bit Voltage-Output DACs with Serial Interface General Description The MAX5S352/MAX5353 combine a low-power, voltage- output, 12-bit digital-to-analog converter (DAC) and a precision output amplifier in an 8-pin pMAX or DIP pack- age. The MAX5352 operates from a single +5V supply, and the MAX5353 operates from a single +3.3V supply. Both devices draw less than 280A of supply current. The output amplifiers inverting input is available to the user, allowing specific gain configurations, remote sensing, and high output current capability. This makes the MAX5352/MAX5353 ideal for a wide range of appli- cations, including industrial process control. Other fea- tures include a software shutdown and power-on reset. The serial interface is compatible with SPI/QSPI and Microwire. The DAC has a double-buffered input, organized as an input register followed by a DAC regis- ter. A 16-bit serial word loads data into the input regis- ter. The DAC register can be updated independently or simultaneously with the input register. All logic inputs are TTL/CMOS-logic compatible and buffered with Features 12-Bit DAC with Configurable Output Amplifier + +5V Single-Supply Operation (MAX5352) +3.3V Single-Supply Operation (MAX5353) # Low Supply Current: 0.28mA Normal Operation 2pA Shutdown Mode @ Available in 8-Pin pMAX # Power-On Reset Clears DAC Output to Zero # SPVQSP! and Microwire Compatible # Schmitt-Trigger Digital Inputs for Direct Optocoupler Interface @ +3.3V MAX5353 Directly Interfaces with +5V Logic Ordering information Schmitt triggers to allow direct interfacing to opto- INL couplers. PART* TEMP. RANGE PIN-PACKAGE (LSB) Applications MAX5352ACPA 0C to +70C 8 Plastic DIP +1/2 industrial Process Control MAX5352BCPA 0C to+70C 8 Plastic DIP +1 nousirial TTocess Vontro's MAXS362ACUA 0C 10 +70C _B UMAX 12 Automatic Test Equipment MAX5352BCUA _0C to+70C 8 uMAX +1 Digital Offset and Gain Adjustment Ordering Information continued at end of data sheet. Motion Control *Contact factory for availability of 8-pin SO package. Remote Industrial Controis Microprocessor-Controlled Systems Functional Diagram Pin Configuration GND Yao REF TOP VIEW [8 DAC OUT id REGISTER DAG out [1] ra] Vop CONTROL a sl meee 1] oo INPUT REGISTER ow [3] MAX5353 57 pee x i t MAM scux [4] 5] Fe Sy 16-817 MAXS352 DIN fw SHIFT REGISTER MAXS353 DIP/uMAX SCLK m4 SPI and QSP! are registered trademarks of Motorola, Inc. Microwire is a registered trademark of National Semiconductor Carp. MAAXIMA Maxim Integrated Products 9-141 For free samples & the latest literature: http:/www.maxim-ic.com, or phone 1-800-998-8800 For small orders, phone 408-737-7600 ext. 3468. = ; > 5 QoMAX5352/MAX5353 Low-Power, 12-Bit Voltage-Output DACs with Serial Interface ABSOLUTE MAXIMUM RATINGS VDD tO GND we centres tenneerseetseasesaneneeeses -0.3V, +6V REF, OUT, FB to GND... Digital inputs to GND ........... Continuous Current into Any Pin..... Continuous Power Dissipation (Ta = +70C) Plastic DIP (derate 9.09mW/C above +70C) Operating Temperature Ranges .-0.3V to (Vpp + 0.3V) MAX&352_C_A/MAX5353_C_A. o.oo ccccseercees OC to +70C berneees -0.3V to +6V MAX5352_E_A/MAX5353_E_A.... 40C to +85C deceteaseneees +20mA MAXS352BMJA/MAX5353BMJA ..... 55C to +126C Storage Temperature Range ............. 65C to +150C deveaneeseseetse 727mW Lead Temperature (soldering, 108@C) ....0......ccce cet BOOS uUMAX (derate 4.10mW/C above +70C) ....... CERDIP (derate 8.00mW/C above +70C) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device al these or any other conditions beyond those indicated in the operational! sections of the specifications is not implied. Exposure to absalute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS: MAX5352 (Vop = +5V 410%, REF = 2.5V, GND = OV, Ry = 5kQ, Cy, = 100pF, Ta = TIN to Tmax, unless otherwise noted. Typical values are at Ta = +25C. Output buffer connected in unity-gain configuration (Figure 8).) PARAMETER | SYMBOL | CONDITIONS MIN TYP MAX | UNITS STATIC PERFORMANCEANALOG SECTION Resolution N 12 Bits ; ; MAX5362A 40.5 Nee INL | MAXS3528 z10 |) LSB MAXS5352BMJA 2.0 Differential Nonlinearity ONL Guaranteed monotonic +1.0 LSB Offset Error Vos +0.3 +8 mV Offset-Error Tempco TCVos 6 pom/*c Gain Error (Note 1) GE -0.3 43 LSB Gain-Error Tempco 1 pom/ec Power-Supply Rejection Ratio PSRAR | 4.5VsVpp s 5.5V 600 uVV REFERENCE INPUT Referance Input Range VREF 0 Vpp - 1.4 v Referance Input Resistance Rrer Code dependent, minimum at code 1554 hex 14 20 kn MULTIPLYING-MODE PERFORMANCE Reference -3cB Bandwidth VrEF = 0.67Vp-p 650 kHz Reference Feedthrough Input code = all Os, VREF = 3.6Vp-p at 1kHz -84 dB signer to toe Plus SINAD | Vrgr = 1Vp-p at 25kHz, code = full scale 77 dB DIGITAL INPUTS Input High Voltage VIH 2.4 Vv Input Low Voltage Vit 0.8 Vv Input Leakage Current IN Vin = OV or Vop 0.004 +0.5 LA Input Capacitance Cin 8 pF 9-142 PRAXIMALow-Power, 12-Bit Voltage-Output DACs with Serial Interface ELECTRICAL CHARACTERISTICS: MAX5352 (continued) (Vop = +5V +10%, REF = 2.5V, GND = OV, RL = 5kQ, C_ = 100pF, Ta = TmIN to Tmax, unless otherwise noted. Typical values are at = Ta = +25C. Output buffer connected in unity-gain configuration (Figure 8}.) PARAMETER | SYMBOL || CONDITIONS | MIN TYP = MAX | UNITS e DYNAMIC PERFORMANCE Qi Voltage Output Slew Rate SR 0.6 Vis G Qutput Settling Time To +1/2LSB, Vstep = 2.5V 14 us QO Output Voltage Swing Rail-to-rail (Note 2) Oto Vop Vv Current into FB 0.001 +0.1 HA Start-Up Time 20 ps Digital Feedthrough ES = Vop. DIN = 100kHz 5 nv-s > POWER SUPPLIES Supply Voltage Vpp 45 5.5 Vv oO Supply Current lop {Note 3) 0.28 0.4 mA w Supply Current in Shutdown (Note 3) 4 20 pA Q Reference Current in Shutdown : 0.001 +0.5 pA TIMING CHARACTERISTICS (Figure 6) SCLK Clack Period tcp 100 ns SCLK Puise Width High tCH 40 ns SCLK Pulse Width Low tet 40 ns C5 Fall to SCLK Rise Setup Time| _tcss 40 ns SCLK Rise to CS Rise Hold Time} tcsH 0 ns DIN Setup Time tos 40 ns DIN Hold Time toH 0 ns SCLK Rise to CS Fall Delay tcso 40 ns CS Rise to SCLK Rise Hold Time| tcsi 40 ns CS Pulse Width High icsw 100 ns Note 1: Guaranteed from cade 11 to cade 4095 in unity-gain configuration. Note 2; Accuracy is better than 1LSB for VouUT = 8mV to Yop - 100mV, guaranteed by a power-supply rejection sest at the end points. Note 3: Rt = os, digital inputs at GND or Vpp. Ea MAAXIAA 9-143MAX5352/MAX5353 Low-Power, 12-Bit Voltage-Output DACs with Serial Interface ELECTRICAL CHARACTERISTICS: MAX5353 (VoD = +3.15V to +3.6V, REF = 1.25V, GND = OV, RL = 5kQ. Cy = 100pF, Ta = TmMIN to Tmax, unless otherwise noted. Typical values are at Ta = +25C. Output buffer connected in unity-gain configuration (Figure 8).) PARAMETER | SYMBOL CONDITIONS {| MIN- TYP Max | UNITS STATIC PERFORMANCEANALOG SECTION Resolution N 12 Bits / MAX5353A +1 Noe on neaty INL | MAXS3538 ~ | LSB MAX5353BMJA +4 Differential Nonlinearity DNL Guaranteed monotonic 1.0 LSB Offset Error Vos +0.3 +8 mv Offset-Error Temoco TCVas 6 pom/ec Gain Error (Note 4) GE 0.3 +3 LSB Gain-Error Tempco 1 ppmyrc Power-Supply Rejection Ratio PSRR 600 EVV REFERENCE INPUT Reference input Range VREF 0 Vpp - 1.4 v Reference Input Resistance Reer Code dependent, minimum at code 1554 hex 14 20 kQ MULTIPLYING-MODE PERFORMANCE (Vop = +3.3V) Reference -3dB Bandwidth VREF = 0.67Vp-p 350 kHz Reference Feedthrough Input code = a/l Os, VREF = 1.9Vp-p at TkHz -84 dB ponarto Noes Plus SINAD | Vage = 1Vp-p at 25kHz, code = full scale 72 dB DIGITAL INPUTS Input High Vcltage Vin 2.4 Vv Input Low Voltage Vit 0.6 V Input Leakage Current lin Vin = OV or VoD 0.001 +0.5 pA Input Capacitance Cin 8 pF DYNAMIC PERFORMANCE Voltage Output Slew Rate SR 0.6 Vis Output Settling Time To +1/2LSB, Vstep = 1.25V 14 us Output Voltage Swing Rail-to-rail (Note 5) Oto Vop Vv Current into FB 0.001 +0.1 pA Start-Up Time 20 us Digital Feedthrough CS = Vop, DIN = 100kHz 5 nV-s POWER SUPPLIES Supply Voltage Vpo 3.16 3.6 v Supply Current lop (Note 6) 0.24 04 mA Supply Current in Shutdown (Note 6) 1.6 10 LA Reference Current in Shutdown 0.001 40.5 UA 9-144 PRAXIPALow-Power, 12-Bit Voltage-Output DACs with Serial interface ELECTRICAL CHARACTERISTICS: MAX5353 (continued) (Vpp = +3.15V to +3.6V, REF = 1.25V, GND = OV, RL = 5kQ, C = 100pF, Ta = Tain to Tax, unless otherwise noted. Typical values = are at Ta = +25C. Output bu*fer connected in unity-gain configuration (Figure 8).) PARAMETER | SYMBOL | CONDITIONS | MIN TYP MAX | UNITS > TIMING CHARACTERISTICS (Figure 6) Qi SCLK Clock Period tcP 100 ns @ SCLK Pulse Width High 1CH 40 ns qi SCLK Pulse Width Low te. 40 ns CS Fall to SCLK Rise Setup Time} tess 40 ns SCLK Rise to CS Rise Haid Time | tcsH {9 ns > DIN Setup Time tos 40 ns DIN Hold Time {DH 0 ns ba SCLK Rise ta CS Fail Delay tcso 40 ns on CS Rise to SCLK Rise Hold Time} tcs1 40 ns e CS Pulse Width High tosw 100 ns Note 4: Guaranteed from code 22 to code 4095 in unity-gain configuration. Note : Accuracy is better chan 1LSB for Vout = 8mV to Vpp - 150mV, guaranteed by a power-supply rejection test at the end points. Note 6: Ry =, digital inputs at GND or Vpp. PAAXLAA 9-145MAX5352/MAX5353 Low-Power, 12-Bit Voltage-Output DACs with Serial interface Typical Operating Characteristics (MAX5352 only, Voo = +5, AL = 5kQ, Cy = 100pF, Ta = +25C, unless otherwise noted.) MAX5352 INTEGRAL NONLINEARITY REFERENCE VOLTAGE INPUT SUPPLY CURRENT vs. REFERENCE VOLTAGE FREQUENCY RESPONSE vs. TEMPERATURE 0 . 400 \ i li 380 4 360 S \ = Mo =e 5 N : ts 320 4 = i 2 Z 3 \ = wo * B12 = 280 { a z NN aq 2 -16 t < 240 \ 220 20 i 200 04 12 20 28 35 44 0 500k 1M 15M 2M 25M 3M 60-0 SCD REFERENCE VOLTAGE (V) FREQUENCY (Hz) TEMPERATURE (C) POWER-DOWN SUPPLY CURRENT "SUPPLY CURRENT TOTAL HARMONIC DISTORTION vs. TEMPERATURE to vs. SUPPLY VOLTAGE PLUS NOISE vz. FREQUENCY 10 50 450 # 25Vpc + 1Vp-p z 3 $5 = FULL 3 8 400 ? 3 350 3 60 B 6 g 300 = 3 > 2 e 5 a 0 2 -0 a > 200 * Z 4 Fs = -5 SB 3 a 150 2 -80 e 2 100 eR 4 50 85 0 0 90 6 20 2 8660 )= 10010 40 44 48 52 56 60 1 10 100 TEMPERATURE (C) SUPPLY VOLTAGE (V) FREQUENCY (kHz) REFERENCE FEEDTHROUGH OUTPUT FFT PLOT FULL-SCALE OUTPUT vs. LOAD AT thd 0 <n 2.49980 0k : REF = 3.BVp-p CADE FULL SCALE i t REFERENCE INPUT SIGNAL 2.49976 i 20 [4 fy = Tht A 0 @ Ir = [ Pa i S 2.49072 = i! en oe 3 3 40 FH 5 \ 2.49968 = || = 60 3 = -60 44 2 ri = 2.40064 Z ( B | \ iz | OUTPUT FEEDTHROUGH -80 \ -80 il | Tt 2.49960 yt 05 16 27 38 49 60 81k ik 10k 100k iM 05 16 27 38 49 60 FREQUENCY (kHz) LOAD (a) FREQUENCY (kHz) 9-146 MAXLMLow-Power, 12-Bit Voltage-Output DACs with Serial Interface Typical Operating Characteristics (continued) (MAX5362 only, Vop = +5V, RL = 5kQ, CL = 100pF, Ta = +25C, unless otherwise noted.) MAX5352 (continued) MAJOR-CARRY TRANSITION DIGITAL FEEDTHROUGH (fscix = 100KHz) SCLK, avidly es SVidiv OUT, OUT, AC COUPLED AC COUPLED 700m V/div tomVidiv CODE = 2048 10us/div 2nsidiv CS =5V DYNAMIC RESPONSE OUT wiv GND tOys/div GAIN = 2, SWITCHING FROM CODE 0 TO 4020 MRA AMAAA 9147 : :MAX35352/MAX5353 Low-Power, 12-Bit Voltage-Output DACs with Serial Interface Typical Operating Characteristics (continued) (MAX5353 only, Vop = +3.3V, AL = 5kQ, Cy = 100pF, Ta = +25C, unless otherwise noted.) MAX5353 INTEGRAL NONLINEARITY REFERENCE VOLTAGE INPUT SUPPLY CURRENT ys. REFERENCE VOLTAGE FREQUENCY RESPONSE vs. TEMPERATURE ; li IN g \ z = 8 g B 2 3 S \ 5 2 = +2 = \ = < & @ NX a -16 = -20 04 408) )=6t2)C48 20st 100k 500k = 1M) 15MM SM 2 0 8 100 149 REFERENCE VOLTAGE (V) FREQUENCY (H2} TEMPERATURE (C) POWER-DOWN SUPPLY CURRENT SUPPLY CURRENT TOTAL HARMONIC DISTORTION vs. TEMPERATURE s. SUPPLY VOLTAGE PLUS NOISE vs. FREQUENCY = 1Vog + SINE Ey S = Q a s i 3 = 2 a zg 5 3 3B > 3 a Z s & 5 0 6 20 6 100 149 30 34 32 33 34 35 36 47 38 1 10 100 TEMPERATURE (C) SUPPLY VOLTAGE (V} FREQUENCY (kHz) REFERENCE FEEDTHROUGH OUTPUT FFT PLOT FULL-SCALE OUTPUT vs. LOAD AT ikitz 0 , 1 2 1.24990 0 nl + 5 Vege 1.9Vp-p REFERENCE INPUT SIGNAL i i CODE = FULL SCALE 1.24988 i . ot fy = THe 4 20 13 a = a i = | S 4.24086 a i | & -40 5 = -40 t ; = 4.24984 = 2 al Z 2 ll 3 40 g a) 3 = 1.24982 s z a _OJTPUT FEEDTHROUGH 4 -B0 ft 1.24980 A : 3 } -100 jl Sadia basal 4.24978 100 healt tad 05 16 27 38 49 60 O.1k tk 10k 100k 1M 05 12 1906 (26 3848 FREQUENCY (kHz) LOAD (22) FREQUENCY (kHz) 9-148 MAXLAALow-Power, 12-Bit Voltage-Output DACs Pin Description PIN NAME FUNCTION 1 OUT DAC Output Voltage 2 cs Chip-Select input. Active low. 3 DIN Seral-Data Input 4 SCLK Sarial-Clock Input 5 FB DAC Output Amplifier Feedback 6 REF Reference Voltage Input 7 GND Ground 8 Vop Positive Power Supply Detailed Description The MAX5352/MAX5353 contain a voltage-output digi- tal-to-analog converter (DAC) that is easily addressed using a simple 3-wire serial interface. Each iC includes a 16-bit shift register, and has a double-buffered input composed of an input register and a DAC register (see Functional Diagram). in addition to the voltage output, the amplifier's negative input is available to the user. The DAC is an inverted R-2R ladder network that con- verts a digital input (12 data bits plus one sub-bit) into an equivalent analog output voltage in proportion to the applied reference voitage. Figure 1 shows a simplified circuit diagram of the DAC. Reference Inputs The reference input accepts positive DC and AC sig- nals. The voltage at the reference input sets the full- scale output voltage for the DAC. The reference input voltage range is OV to (VoD - 1.4V). The output voltage (Vout) is represented by a digitally programmable voit- age source, as expressed in the following equation: Vout = (VREF x NB / 4096) x Gain where NB is the numeric value of the DACs binary input code (0 to 4095), VREF is the reference voltage, and Gain is the externally set voltage gain. The impedance at the reference input is code depen- dent, ranging from a low vatue of 14kQ when the DAC has an input code of 1554 hex, to a high value exceed- ing several giga ohms (leakage currents) with an input code of 0000 hex. Because the input impedance at the reference pin is code dependent, load regulation of the reference source is important. MAAXIMA with Serial interface ii" R R R Out aR A 2R 2k 2R MSB 9 9 REF + ye * AGND C yD SHOWN FOR ALL 1s ON DAC Figure 1. Simplified DAC Circuit Diagram In shutdown mode, the MAX5352/MAX5353's REF input enters a high-impedance state with a typical input leak- age current of O.O01HA. The reference input capacitance is also code depen- dent and typically ranges from iSpF (with an input code of alt Os) to 50pF (at full scafe). The MAX873 +2.5V reference is recommended for the MAX5252. Output Amplifier Tne MAX5352/MAX5353's DAC output is internally buffered by a precision amplifier with a typical slew rate of 0.6V/us. Access to the output ampilifiers inverting input provides the user greater flexibility in output gain setting/signal conditioning {see the Applications information section). With a full-scale transition at the MAX5352/MAX5353 output, the typical settling time to +1/2LSB is t4us when loaded with 5kQ in parailel with 100pF (loads less than 2kQ degrade performance). The amplifier's output dynamic responses and settling performances are shown in the Typical Operating Characteristics. Shutdown Mode The MAX5352/MAX5353 feature a software-program- mable shutdown that reduces supply current to a typical value of 4A. Writing 11 1X XXXX XXXX XXXX as the input- control word puts the device in shutdown made (Table 1). In shutdown mode, the amplifiers output and the refer- ence input enter a high-impedance state. The serial interface remains active. Data in the input registers is retained in shutdown, allowing the MAX5352/MAX5353 9-149 5 g 8 5 O w Oo WMAXS5352/MAX5353 Low-Power, 12-Bit Voltage-Output DACs with Serial interface to recall the output state prior to entering shutdown. Exit shutdown mode by either recalling the previous configuration or by updating the DAC with new data. When powering up the device or bringing it out of shut- down, allow 20us for the output to stabilize. Serial-Interface Configurations The MAX5352/MAX5353s 3-wire serial interface is compatible with both Microwire (Figure 2) and SPP/QSPI (Figure 3). The serial input word consists of three control bits followed by 12+1 data bits (MSB first), as shown in Figure 4. The 3-bit control code determines the MAX5352/MAX5353s response outlined in Table 1. The MAX5352/MAX5353's digital inputs are double buffered. Dependirig on the command issued through the serial interface, the input register can be loaded without affecting the DAC register, the DAC register can be loaded directly, or the DAC register can be updated from the input register (Table 1). The +3.38V MAX353 can also directly interface with +5V logic. Serial-interface Description The MAX5352/MAX5353 require 16 bits of serial data. Table 1 lists the serial-interface programming com- mands, For certain commands, the 12+1 data bits are don't cares. Data is sent MSB first and can be sent in two 8-bit packets or one 16-bit word (CS must remain iow until 16 bits are transferred). The serial data is com- posed of three control bits (C2, C1, CQ), followed by the 12+1 data bits D11...00, SO (Figure 4). Set the sub-bit (SO) to zero. The 3-bit control code determines: the register to be updated, e the configuration when exiting shutdown. Figure 5 shows the serial-interface timing requirements. The chip-select pin (CS) must_be low to enable the DACs serial interface. When CS is high, the interface control circuitry is disabled. CS must go low at least tcss before the rising serial clock (SCLK) edge to prop- erly clock in the first bit. When CS is low, data is clocked into the internal shift register via the serial-data input pin (DIN) on SCLKs rising edge. The maximum guaranteed clock frequency is 10MHz. Data is latched into the MAX5352/MAX5353 input/DAC register on CSs rising edge. 9-150 SCLK [tt SK PA AXILMA MICROWIRE MAX5352 DIN iat 50 PORT MAX5353 cs pt YO Figure 2. Connections for Microwire +5V $8 DIN MOS! nes gr SCLK dt K MAX5353 s cs Yo CPOL = 0, CPHA=0 Figure 3. Connections for SPI/QSPI MSB ooo. cece cs eececaeceeceeeceusneenecatscensesespesseteaseseeneusnesenees LSB _ 16 Bits of Serial Data ----> Control Data Bits Bits c2 C1 co <q 8 Corto p> | <age 12+ 1 Data Bits j Figure 4. Serial-Data Format MAAXLAALow-Power, 12-Bit Voltage-Output DACs with Serial Interface Table 1. Serial-Interface Programming Commands 16-BIT SERIAL WORD DF ccscsssseneeee DO FUNCTION c2 C1 co MSB LSB so x 0 o 12 bits of data 0 Load input register; DAC register immediately updated (also exit shutdown). x 0 1 12 bits of data 0 Load input register; DAC register unchanged. Xx j 0 OOOXKXXKXKXK |X Update DAC register from input register (also exit shutdown; recall previ- ous State). 1 1 1 XXXXXXXXXXAKX | X Shutdown 0 4 1 XXXXXXXKXKAKKX x No operation (NOP) x = Don't care Can i 4 COMMAND sox TULL 1 8 9 16 on ca Xai X coor XoioX oa X08 Kor X_ 06X05 Xda X 0a X 02 Kv X 00 X 80 ) Figure 5. Serial-interface Tirning Diagram B ses i tesw a ' e tess ! Seto > i top test +t ~ les) i 1 oe HH ' t Figure 6. Detailed Serial-Interface Timing Diagram MAAKIMA 9-151 = : : : :MAX5352/MAX5353 Low-Power, 12-Bit Voltage-Output DACs with Serial Interface DIN > ese SCLK > eee CST > CS2 TO OTHER i SERIAL DEVICES t 6S cs ts MAXLAA PAAXLM maxim |" MAX5352 MAX5352 MAX5352 MAX5353 MAX5353 MAX5353 SCLK SCLK SCLK DIN DIN DIN Figure 7, Multiple MAX5352/MAX5353s Sharing Common DIN and SCLK Lines Figure 7 shows a method of connecting several Table 2. Unipolar Code Table MAX5352/MAX5358s. In this configuration, the clock P and the data bus are common to al! devices, and sepa- DAC CONTENTS ANALOG OUTPUT rate chip-select lines are used for each IC. MSB LSB Applications Information 14441444 1111 (0) her (2 4096 , Unipolar Output For a unipolar output, the output voltage and the refer- 4000 0000 0001 (3) ence input have the same polarity. Figure 8 shows the 0 000% (0) *\ReF | 4096 MAX5352/MAX5353 unipolar output circuit, which is also the typical operating circuit. Table 2 lists the unipo- 1000 0000 0000 (0) +VREE (2a = *VREF lar output codes. 4096 2 Figure 9 illustrates a rail-to-rail output. This circuit 2047 shows the MAX5352 with the output amplifier config- Ott TtAt 1114 (0) +VReF (22) ured with a closed-loop gain of +2 to provide a OV to 5V full-scale range when a 2.5V reference is used. When 1 the MAX5353 is used with a 1.25V reference, this circuit 0900 0000 000% (0) *\REF (sass) provides a OV to 2.5V full-scale range. 0000 0000 0000 (0) OV Bipolar Output The MAX5352/MAX5353 output can be configured for NOTE: () are for sub-bit. bipolar operation using Figure 10s circuit according to Using an AC Reference the following equation: Vout = VREF [(2NB / 4096) - 1] where NB is the numeric value of the DAC's binary input code. Table 3 shows digital codes (offset binary) and the corresponding output voltage for Figure 10's circuit. 9-152 In applications where the reference has AC-signal com- ponents, the MAX5352/MAX5353 have multiplying capability within the reference input range specifica- tions. Figure 11 shows a technique for applying a sine- wave signal to the reference input where the AC signal is offset before being applied to REF. The reference voltage must never be more negative than GND. PAAXIAALow-Power, 12-Bit Voltage-Output DACs with Serial Interface Table 3. Bipolar Code Table The MAX5352's total harmonic distortion plus noise (THD+N) is typically less than -77dB (full-scale code), = DAC CONTENTS ourtp and the MAX5353s THD+N is typically less than MSB LSB ANALOG ur -72dB (full-scale code), given a 1Vp-p signal swing and input frequencies up to 25kHz. The typical -3dB fre- 14141414 1111 (0) +Vage (33) quency is 650kHz for both devices, as shown in the Qy 2048 Typical Operating Characteristics graphs. 1 Digitally Programmable Current Source St 1000 0000 0001 (0 Veer | (0) wnREF (aa) The circuit of Figure 12 places an NPN transistor (2N3904 or similar) within the op-amp feedback loop to 1000 0000 0000 (0) ov implement a digitally programmable, unidirectional cur- { rent source. The output current is calculated with the 0111 1114 1411 (0) Veer (sua) following equation: 2047 lout = (VREF/R) x (NB/4096) Qi 0000 0000 0001 (0) ~VREF (2) where NB is the numeric value of the DACs binary G) input code and R is the sense resistor shown in cn 2048 Figure 12. 0000 0000 6000 (0) -VREF (2a = - VRer NOTE: () are for sub-bit. MAXLM MAXIM MAX5352 VNB V MAX5352 MANX5353 MAX5353 +5V/43.3V REF | REF Voo ra Vop FR 10k \ . 5 10k DAC > . out DAG Out GND GND Figure 8. Unipolar Output Circuit Figure 9. Unipolar Rail-to-Rail Output Circuit MAAXLAA : 9-153MAX5352/MAX5353 Low-Power, 12-Bit Voltage-Output DACs with Serial Interface RI R2 REF b +5V/43.3V Vop FB ~ Vout DAC * ouT V. ive MAX5353 GND Ri = R2 = 10k 40.1% iJKY +5V/ 433y > SC ean REFERENCE MAX495 eu => REF Voo FAAXIIA MAX5352 MAX5353 ony aL OUT Figure 10. Bipolar Output Circuit 45V/ aN REF Von MAXI vi MAX5352 Dae MAX5353 | lout OUT_Tang004 FB GND R Figure 12. Digitaily Programmable Currert Source Power-Supply Considerations On power-up, the input and DAC registers are cleared (set to zero code). For rated MAX5352/MAX5353 performance, REF must be at least 1.4V below Vop. Bypass Vob with a 4.7uF capacitor in parallel with a 0.1uF capacitor to GND. Use short lead lengths and place the bypass capaci- tors as close to the supply pins as possible. 9-154 Figure 11. AC Reference Input Circuit Grounding and Layout Considerations Digital or AC transient signals on GND can create noise at the analog output. Tie GND to the highest-quality ground available. Good printed circuit board ground layout minimizes crosstalk between the DAC output, reference input. and digital input. Reduce crosstalk by keeping analog lines away from digital lines. Wire-wrapped boards are not recommended. PAAXIAALow-Power, 12-Bit Voltage-Output DACs with Serial Interface _Ordering Information (continued) : Chip Information = PART TEMP. RANGE PIN-PACKAGE se) TRANSISTOR COUNT: 1677 > MAX5G52AEPA -40C to +85C 8 Plastic DIP 1/2 rm MAX5352BEPA -40C to +85C 8 Plastic DIP #1 ) MAX5352AEUA -40C to +85C 8 MAX 1/2 oi MAXS352BEUA -40C to +85C 8 uMAX 1 MAX5352BMJA _-85G 10 +125C 8 CERDIP* 2 MAXSS53ACPA OC to +70C 8 Plastic DIP td MAXS353BCPA OCto+70C 8PlasticDIP #2 MAX5353ACUA 0C to +70C 8B UMAX +1 > MAX5353BCUA CC to +70C BMAX +2 MAXS353AEPA -40C to +85C 8 Plastic DIP 1 oO MAXS353BEPA -40C to +85C 8 PlasticDIP #2 @ MAXS353AEUA -40C to +85C 8 MAX +1 QO MAXEG53BEUA -40C to 485C 8 MAX 42 MAX5353BMJA -55C ta +128C 8 CERDIP** +4 *Contact factory for availability of 8-pin SO package. *Contact factory for availability and processing to MIL-STD-883. MAAXISAA 9-155