´PowerRegister
CurrentRegister I C
Interface
2
VoltageRegister
VIN+ VIN-
VS
(SupplyVoltage)
A0
A1
Data
CLK
ADC
PGA
INA219
GND
INA219
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SBOS448F –AUGUST 2008–REVISED SEPTEMBER 2011
Zerø-Drift, Bi-Directional
CURRENT/POWER MONITOR with I
2
C™Interface
Check for Samples: INA219
1FEATURES DESCRIPTION
The INA219 is a high-side current shunt and power
23•SENSES BUS VOLTAGES FROM 0V TO +26V monitor with an I2C interface. The INA219 monitors
•REPORTS CURRENT, VOLTAGE, AND POWER both shunt drop and supply voltage, with
•16 PROGRAMMABLE ADDRESSES programmable conversion times and filtering. A
programmable calibration value, combined with an
•HIGH ACCURACY: 0.5% (Max) OVER internal multiplier, enables direct readouts in
TEMPERATURE (INA219B) amperes. An additional multiplying register calculates
•FILTERING OPTIONS power in watts. The I2C interface features 16
•CALIBRATION REGISTERS programmable addresses.
•SOT23-8 AND SO-8 PACKAGES The INA219 is available in two grades: A and B. The
B grade version has higher accuracy and higher
APPLICATIONS precision specifications.
•SERVERS The INA219 senses across shunts on buses that can
vary from 0V to 26V. The device uses a single +3V to
•TELECOM EQUIPMENT +5.5V supply, drawing a maximum of 1mA of supply
•NOTEBOOK COMPUTERS current. The INA219 operates from –40°C to +125°C.
•POWER MANAGEMENT
•BATTERY CHARGERS RELATED PRODUCTS
DESCRIPTION DEVICE
•WELDING EQUIPMENT Current/Power Monitor with Watchdog, INA209
•POWER SUPPLIES Peak-Hold, and Fast Comparator Functions
•TEST EQUIPMENT Zerø-Drift, Low-Cost, Analog Current Shunt INA210,INA211,INA212,
Monitor Series in Small Package INA213,INA214
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2I2C is a trademark of NXP Semiconductors.
3All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Copyright ©2008–2011, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
INA219
SBOS448F –AUGUST 2008–REVISED SEPTEMBER 2011
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
Table 1. PACKAGING INFORMATION(1)
PRODUCT PACKAGE-LEAD PACKAGE DESIGNATOR PACKAGE MARKING
SO-8 D I219A
INA219A SOT23-8 DCN A219
SO-8 D I219B
INA219B SOT23-8 DCN B219
(1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or visit the
INA219 product folder at www.ti.com.
ABSOLUTE MAXIMUM RATINGS(1)
Over operating free-air temperature range (unless otherwise noted). INA219 UNIT
Supply Voltage, VS6 V
Differential (VIN+)–(VIN–)(2) –26 to +26 V
Analog Inputs,
VIN+, VIN–Common-Mode -0.3 to +26 V
SDA GND –0.3 to +6 V
SCL GND –0.3 to VS+ 0.3 V
Input Current Into Any Pin 5 mA
Open-Drain Digital Output Current 10 mA
Operating Temperature –40 to +125 °C
Storage Temperature –65 to +150 °C
Junction Temperature +150 °C
Human Body Model 4000 V
ESD Ratings Charged-Device Model 750 V
Machine Model (MM) 200 V
(1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may
degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those specified is not implied.
(2) VIN+ and VIN–may have a differential voltage of –26V to +26V; however, the voltage at these pins must not exceed the range –0.3V to
+26V.
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INA219
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ELECTRICAL CHARACTERISTICS: VS= +3.3V
Boldface limits apply over the specified temperature range, TA=–25°C to +85°C.
At TA= +25°C, VIN+ = 12V, VSENSE = (VIN+ –VIN–) = 32mV, PGA = ÷1, and BRNG(1) = 1, unless otherwise noted.
INA219A INA219B
PARAMETER TEST CONDITIONS MIN TYP MAX MIN TYP MAX UNIT
INPUT
Full-Scale Current Sense (Input) Voltage Range PGA = ÷1 0 ±40 0 ±40 mV
PGA = ÷2 0 ±80 0 ±80 mV
PGA = ÷4 0 ±160 0 ±160 mV
PGA = ÷8 0 ±320 0 ±320 mV
Bus Voltage (Input Voltage) Range(2) BRNG = 1 0 32 0 32 V
BRNG = 0 0 16 0 16 V
Common-Mode Rejection CMRR VIN+ = 0V to 26V 100 120 100 120 dB
Offset Voltage, RTI(3) VOS PGA = ÷1±10 ±100 ±10 ±50(4) μV
PGA = ÷2±20 ±125 ±20 ±75 μV
PGA = ÷4±30 ±150 ±30 ±75 μV
PGA = ÷8±40 ±200 ±40 ±100 μV
vs Temperature 0.1 0.1 μV/°C
vs Power Supply PSRR VS= 3V to 5.5V 10 10 μV/V
Current Sense Gain Error ±40 ±40 m%
vs Temperature 1 1 m%/°C
Input Impedance Active Mode
VIN+ Pin 20 20 μA
VIN–Pin 20 || 320 20 || 320 μA || kΩ
Input Leakage(5) Power-Down Mode
VIN+ Pin 0.1 ±0.5 0.1 ±0.5 μA
VIN–Pin 0.1 ±0.5 0.1 ±0.5 μA
DC ACCURACY
ADC Basic Resolution 12 12 Bits
1 LSB Step Size
Shunt Voltage 10 10 μV
Bus Voltage 4 4 mV
Current Measurement Error ±0.2 ±0.5 ±0.2 ±0.3 %
over Temperature ±1±0.5 %
Bus Voltage Measurement Error ±0.2 ±0.5 ±0.2 ±0.5 %
over Temperature ±1±1 %
Differential Nonlinearity ±0.1 ±0.1 LSB
ADC TIMING
ADC Conversion Time 12-Bit 532 586 532 586 μs
11-Bit 276 304 276 304 μs
10-Bit 148 163 148 163 μs
9-Bit 84 93 84 93 μs
Minimum Convert Input Low Time 4 4 μs
(1) BRNG is bit 13 of the Configuration Register.
(2) This parameter only expresses the full-scale range of the ADC scaling. In no event should more than 26V be applied to this device.
(3) Referred-to-input (RTI).
(4) Shaded cells indicate improved specifications of the INA219B.
(5) Input leakage is positive (current flowing into the pin) for the conditions shown at the top of the table. Negative leakage currents can
occur under different input conditions.
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INA219
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www.ti.com
ELECTRICAL CHARACTERISTICS: VS= +3.3V (continued)
Boldface limits apply over the specified temperature range, TA=–25°C to +85°C.
At TA= +25°C, VIN+ = 12V, VSENSE = (VIN+ –VIN–) = 32mV, PGA = ÷1, and BRNG(1) = 1, unless otherwise noted.
INA219A INA219B
PARAMETER TEST CONDITIONS MIN TYP MAX MIN TYP MAX UNIT
SMBus
SMBus Timeout(6) 28 35 28 35 ms
DIGITAL INPUTS
(SDA as Input, SCL, A0, A1)
Input Capacitance 3 3 pF
Leakage Input Current 0 ≤VIN ≤VS0.1 1 0.1 1 μA
Input Logic Levels:
VIH 0.7 (VS) 6 0.7 (VS) 6 V
VIL –0.3 0.3 (VS)–0.3 0.3 (VS) V
Hysteresis 500 500 mV
OPEN-DRAIN DIGITAL OUTPUTS (SDA)
Logic '0'Output Level ISINK = 3mA 0.15 0.4 0.15 0.4 V
High-Level Output Leakage Current VOUT = VS0.1 1 0.1 1 μA
POWER SUPPLY
Operating Supply Range +3 +5.5 +3 +5.5 V
Quiescent Current 0.7 1 0.7 1 mA
Quiescent Current, Power-Down Mode 6 15 6 15 μA
Power-On Reset Threshold 2 2 V
TEMPERATURE RANGE
Specified Temperature Range –25 +85 –25 +85 °C
Operating Temperature Range –40 +125 –40 +125 °C
Thermal Resistance(7) θJA
SOT23-8 142 142 °C/W
SO-8 120 120 °C/W
(6) SMBus timeout in the INA219 resets the interface any time SCL or SDA is low for over 28ms.
(7) θJA value is based on JEDEC low-K board.
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Product Folder Link(s): INA219
1
2
3
4
8
7
6
5
A1
A0
SDA
SCL
VIN+
VIN-
GND
VS
1
2
3
4
8
7
6
5
VIN+
VIN-
GND
VS
A1
A0
SDA
SCL
INA219
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SBOS448F –AUGUST 2008–REVISED SEPTEMBER 2011
PIN CONFIGURATIONS
DCN PACKAGE D PACKAGE
SOT23-8 SO-8
(Top View) (Top View)
PIN DESCRIPTIONS: SOT23-8
SOT23-8
(DCN)
PIN NO NAME DESCRIPTION
1 VIN+ Positive differential shunt voltage. Connect to positive side of shunt resistor.
Negative differential shunt voltage. Connect to negative side of shunt resistor. Bus voltage is measured
2 VIN–from this pin to ground.
3 GND Ground.
4 VSPower supply, 3V to 5.5V.
5 SCL Serial bus clock line.
6 SDA Serial bus data line.
7 A0 Address pin. Table 2 shows pin settings and corresponding addresses.
8 A1 Address pin. Table 2 shows pin settings and corresponding addresses.
PIN DESCRIPTIONS: SO-8
SO-8
(D)
PIN NO NAME DESCRIPTION
1 A1 Address pin. Table 2 shows pin settings and corresponding addresses.
2 A0 Address pin. Table 2 shows pin settings and corresponding addresses.
3 SDA Serial bus data line.
4 SCL Serial bus clock line.
5 VSPower supply, 3V to 5.5V.
6 GND Ground.
Negative differential shunt voltage. Connect to negative side of shunt resistor. Bus voltage is measured
7 VIN–from this pin to ground.
8 VIN+ Positive differential shunt voltage. Connect to positive side of shunt resistor.
Copyright ©2008–2011, Texas Instruments Incorporated Submit Documentation Feedback 5
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0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
10 100 1k 10k 100k 1M
Gain(dB)
InputFrequency(Hz)
100
80
60
40
20
0
-20
-40
-60
-80
-100
-40 -25 025 50 75 100
Offset( V)m
Temperature( C)°
125
160mVRange
320mVRange
80mVRange 40mVRange
100
80
60
40
20
0
-20
-40
-60
-80
-100
-40 -25 025 50 75 100
GainError(m%)
Temperature( C)°
125
320mVRange 160mVRange
80mVRange 40mVRange
50
45
40
35
30
25
20
15
10
5
0
-40 -25 025 50 75 100
Offset(mV)
Temperature( C)°
125
32VRange 16VRange
20
15
10
5
0
-5
-10
-15
-20
-0.4 -0.3 -0.2 -0.1 0 0.1 0.2 0.3
INL( V)m
InputVoltage(V)
0.4
-40 -25 025 50 75 100 125
100
80
60
40
20
0
-20
-40
-60
-80
-100
GainError(m%)
Temperature( C)°
32V
16V
INA219
SBOS448F –AUGUST 2008–REVISED SEPTEMBER 2011
www.ti.com
TYPICAL CHARACTERISTICS
At TA= +25°C, VIN+ = 12V, VSENSE = (VIN+ –VIN–) = 32mV, PGA = ÷1, and BRNG = 1, unless otherwise noted.
FREQUENCY RESPONSE ADC SHUNT OFFSET vs TEMPERATURE
Figure 1. Figure 2.
ADC SHUNT GAIN ERROR vs TEMPERATURE ADC BUS VOLTAGE OFFSET vs TEMPERATURE
Figure 3. Figure 4.
ADC BUS GAIN ERROR vs TEMPERATURE INTEGRAL NONLINEARITY vs INPUT VOLTAGE
Figure 5. Figure 6.
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2.0
1.5
1.0
0.5
0
-0.5
-1.0
-1.5
0510 15 20 25
InputCurrents(mA)
V Voltage(V)
IN-
30
VS+ =5V
V 5V
S+ =
VS+ =3V
V 3V
S+ =
16
14
12
10
8
6
4
2
0
-40 -25 025 125
I ( A)m
Q
Temperature( C)°
V =5V
S
V =3V
S
50 75 100
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
1k 10k 100k 1M 10M
IQ(mA)
SCLFrequency(Hz)
V =5V
S
V =
S3V
300
250
200
150
100
50
0
1k 10k 100k 1M 10M
I ( A)
Qm
SCLFrequency(Hz)
V =5V
S
V =3V
S
INA219
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SBOS448F –AUGUST 2008–REVISED SEPTEMBER 2011
TYPICAL CHARACTERISTICS (continued)
At TA= +25°C, VIN+ = 12V, VSENSE = (VIN+ –VIN–) = 32mV, PGA = ÷1, and BRNG = 1, unless otherwise noted.
INPUT CURRENTS WITH LARGE DIFFERENTIAL
VOLTAGES
(VIN+ at 12V, Sweep of VIN–) ACTIVE IQvs TEMPERATURE
Figure 7. Figure 8.
SHUTDOWN IQvs TEMPERATURE ACTIVE IQvs I2C CLOCK FREQUENCY
Figure 9. Figure 10.
SHUTDOWN IQvs I2C CLOCK FREQUENCY
Figure 11.
Copyright ©2008–2011, Texas Instruments Incorporated Submit Documentation Feedback 7
Product Folder Link(s): INA219
ADC
´
´
ShuntVoltage
Channel
BusVoltage
Channel
PGA
(InConfigurationRegister)
ShuntVoltage(1)
DataRegisters
Full-ScaleCalibration(2)
Current(1)
BusVoltage(1)
Power(1)
NOTES:
(1)Read-only
(2)Read/write
INA219
SBOS448F –AUGUST 2008–REVISED SEPTEMBER 2011
www.ti.com
REGISTER BLOCK DIAGRAM
Figure 12. INA219 Register Block Diagram
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CBYPASS
0.1 F
(typical)
m
Supply Voltage
(INA219PowerSupplyRangeis
3Vto5.5V)
Data(SDA)
Clock(SCL)
´PowerRegister
CurrentRegister I C
Interface
2
VoltageRegister
VIN+
RF1 RF2
RPULLUP
3.3k
(typical)
W
RPULLUP
3.3k
(typical)
W
VIN-
ADC
PGA
INA219
GND
PowerBus
(0Vto26V) Load
Current
Shunt
CF
A0
A1
SDA
SCL
INA219
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SBOS448F –AUGUST 2008–REVISED SEPTEMBER 2011
APPLICATION INFORMATION
The INA219 is a digital current-shunt monitor with an The I2C interface is used throughout this data sheet
I2C and SMBus-compatible interface. It provides as the primary example, with SMBus protocol
digital current, voltage, and power readings specified only when a difference between the two
necessary for accurate decision-making in systems is being addressed. Two bidirectional lines,
precisely-controlled systems. Programmable registers SCL and SDA, connect the INA219 to the bus. Both
allow flexible configuration for measurement SCL and SDA are open-drain connections.
resolution, and continuous- The device that initiates the transfer is called a
versus-triggered operation. Detailed register master, and the devices controlled by the master are
information appears at the end of this data sheet, slaves. The bus must be controlled by a master
beginning with Table 4. See the Register Block device that generates the serial clock (SCL), controls
Diagram for a block diagram of the INA219. the bus access, and generates START and STOP
conditions.
INA219 TYPICAL APPLICATION To address a specific device, the master initiates a
Figure 13 shows a typical application circuit for the START condition by pulling the data signal line (SDA)
INA219. Use a 0.1μF ceramic capacitor for from a HIGH to a LOW logic level while SCL is HIGH.
power-supply bypassing, placed as closely as All slaves on the bus shift in the slave address byte
possible to the supply and ground pins. on the rising edge of SCL, with the last bit indicating
whether a read or write operation is intended. During
The input filter circuit consisting of RF1, RF2, and CFis the ninth clock pulse, the slave being addressed
not necessary in most applications. If the need for responds to the master by generating an
filtering is unknown, reserve board space for the Acknowledge and pulling SDA LOW.
components and install 0Ωresistors unless a filter is
needed. See the Filtering and Input Considerations Data transfer is then initiated and eight bits of data
section. are sent, followed by an Acknowledge bit. During
data transfer, SDA must remain stable while SCL is
The pull-up resistors shown on the SDA and SCL HIGH. Any change in SDA while SCL is HIGH is
lines are not needed if there are pull-up resistors on interpreted as a START or STOP condition.
these same lines elsewhere in the system. Resistor
values shown are typical: consult either the I2C or Once all data have been transferred, the master
SMBus specification to determine the acceptable generates a STOP condition, indicated by pulling
minimum or maximum values. SDA from LOW to HIGH while SCL is HIGH. The
INA219 includes a 28ms timeout on its interface to
BUS OVERVIEW prevent locking up an SMBus.
The INA219 offers compatibility with both I2C and
SMBus interfaces. The I2C and SMBus protocols are
essentially compatible with one another.
Figure 13. Typical Application Circuit
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INA219
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Serial Bus Address WRITING TO/READING FROM THE INA219
To communicate with the INA219, the master must Accessing a particular register on the INA219 is
first address slave devices via a slave address byte. accomplished by writing the appropriate value to the
The slave address byte consists of seven address register pointer. Refer to Table 4 for a complete list of
bits, and a direction bit indicating the intent of registers and corresponding addresses. The value for
executing a read or write operation. the register pointer as shown in Figure 17 is the first
byte transferred after the slave address byte with the
The INA219 has two address pins, A0 and A1. R/W bit LOW. Every write operation to the INA219
Table 2 describes the pin logic levels for each of the requires a value for the register pointer.
16 possible addresses. The state of pins A0 and A1
is sampled on every bus communication and should Writing to a register begins with the first byte
be set before any activity on the interface occurs. The transmitted by the master. This byte is the slave
address pins are read at the start of each address, with the R/W bit LOW. The INA219 then
communication event. acknowledges receipt of a valid address. The next
byte transmitted by the master is the address of the
Table 2. INA219 Address Pins and register to which data will be written. This register
Slave Addresses address value updates the register pointer to the
desired register. The next two bytes are written to the
A1 A0 SLAVE ADDRESS register addressed by the register pointer. The
GND GND 1000000 INA219 acknowledges receipt of each data byte. The
GND VS+ 1000001 master may terminate data transfer by generating a
GND SDA 1000010 START or STOP condition.
GND SCL 1000011 When reading from the INA219, the last value stored
VS+ GND 1000100 in the register pointer by a write operation determines
VS+ VS+ 1000101 which register is read during a read operation. To
change the register pointer for a read operation, a
VS+ SDA 1000110 new value must be written to the register pointer. This
VS+ SCL 1000111 write is accomplished by issuing a slave address byte
SDA GND 1001000 with the R/W bit LOW, followed by the register pointer
SDA VS+ 1001001 byte. No additional data are required. The master
SDA SDA 1001010 then generates a START condition and sends the
slave address byte with the R/W bit HIGH to initiate
SDA SCL 1001011 the read command. The next byte is transmitted by
SCL GND 1001100 the slave and is the most significant byte of the
SCL VS+ 1001101 register indicated by the register pointer. This byte is
SCL SDA 1001110 followed by an Acknowledge from the master; then
SCL SCL 1001111 the slave transmits the least significant byte. The
master acknowledges receipt of the data byte. The
master may terminate data transfer by generating a
Serial Interface Not-Acknowledge after receiving any data byte, or
The INA219 operates only as a slave device on the generating a START or STOP condition. If repeated
I2C bus and SMBus. Connections to the bus are reads from the same register are desired, it is not
made via the open-drain I/O lines SDA and SCL. The necessary to continually send the register pointer
SDA and SCL pins feature integrated spike bytes; the INA219 retains the register pointer value
suppression filters and Schmitt triggers to minimize until it is changed by the next write operation.
the effects of input spikes and bus noise. The INA219 Figure 14 and Figure 15 show read and write
supports the transmission protocol for fast (1kHz to operation timing diagrams, respectively. Note that
400kHz) and high-speed (1kHz to 3.4MHz) modes. register bytes are sent most-significant byte first,
All data bytes are transmitted most significant byte followed by the least significant byte. Figure 16
first. shows the timing diagram for the SMBus Alert
response operation. Figure 17 illustrates a typical
register pointer configuration.
10 Submit Documentation Feedback Copyright ©2008–2011, Texas Instruments Incorporated
Product Folder Link(s): INA219
Frame1Two-WireSlaveAddressByte(1) Frame2DataMSByte(2)
1
StartBy
Master
ACKBy
INA219
ACKBy
Master
From
INA219
1 9 1 9
SDA
SCL
0 0 A3 R/WD15 D14 D13 D12 D11 D10 D9 D8
A2 A1 A0
Frame3DataLSByte(2)
StopNoACKBy(3)
Master
From
INA219
19
D7 D6 D5 D4 D3 D2 D1 D0
NOTES:(1)ThevalueoftheSlaveAddressByteisdeterminedbythesettingsoftheA0andA1pins.
RefertoTable1.
(2)Readdataisfromthelastregisterpointerlocation.Ifanewregisterisdesired,theregister
pointermustbeupdated.SeeFigure19.
(3)ACKbyMastercanalsobesent.
Frame1Two-WireSlaveAddressByte(1) Frame2RegisterPointerByte
StartBy
Master
ACKBy
INA219
ACKBy
INA219
1 9 1
ACKBy
INA219
1
D15 D14 D13 D12 D11 D10 D9 D8
9
9
SDA
SCL
1 0 0 A3 A2 A1 A0 R/WP7 P6 P5 P4 P3 P2 P1 P0
NOTE(1):ThevalueoftheSlaveAddressByteisdeterminedbythesettingsoftheA0andA1pins.RefertoTable1.
Frame4DataLSByteFrame3DataMSByte
ACKBy
INA219
StopBy
Master
1
D7 D6 D5 D4 D3 D2 D1 D0
9
INA219
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SBOS448F –AUGUST 2008–REVISED SEPTEMBER 2011
Figure 15. Timing Diagram for Read Word Format
Figure 14. Timing Diagram for Write Word Format
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Product Folder Link(s): INA219
Frame1SMBusALERTResponseAddressByte Frame2SlaveAddressByte(1)
StartBy
Master
ACKBy
INA219
From
INA219
NACKBy
Master
StopBy
Master
1 9 1 9
SDA
SCL
ALERT
0 0 0 1 1 0 0 R/W1 0 0 A3 A2 A1 A0 0
NOTE(1):ThevalueoftheSlaveAddressByteisdeterminedbythesettingsoftheA0andA1pins.RefertoTable1.
Frame1Two-WireSlaveAddressByte(1) Frame2RegisterPointerByte
1
StartBy
Master
ACKBy
INA219
ACKBy
INA219
1 9 1 9
SDA
SCL
0 0 A3 A2 A1 A0 R/WP7 P6 P5 P4 P3 P2 P1 P0 Stop
¼
NOTE(1):ThevalueoftheSlaveAddressByteisdeterminedbythesettingsoftheA0andA1pins.RefertoTable1.
INA219
SBOS448F –AUGUST 2008–REVISED SEPTEMBER 2011
www.ti.com
Figure 16. Timing Diagram for SMBus ALERT
Figure 17. Typical Register Pointer Set
12 Submit Documentation Feedback Copyright ©2008–2011, Texas Instruments Incorporated
Product Folder Link(s): INA219
SCL
SDA
t(LOW) tRtFt(HDSTA)
t(HDSTA)
t(HDDAT)
t(BUF)
t(SUDAT)
t(HIGH) t(SUSTA) t(SUSTO)
P S S P
INA219
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SBOS448F –AUGUST 2008–REVISED SEPTEMBER 2011
High-Speed I2C Mode The master then generates a repeated start condition
When the bus is idle, both the SDA and SCL lines are (a repeated start condition has the same timing as
pulled high by the pull-up devices. The master the start condition). After this repeated start condition,
generates a start condition followed by a valid serial the protocol is the same as F/S mode, except that
byte containing High-Speed (HS) master code transmission speeds up to 3.4Mbps are allowed.
00001XXX. This transmission is made in fast Instead of using a stop condition, repeated start
(400kbps) or standard (100kbps) (F/S) mode at no conditions should be used to secure the bus in
more than 400kbps. The INA219 does not HS-mode. A stop condition ends the HS-mode and
acknowledge the HS master code, but does switches all the internal filters of the INA219 to
recognize it and switches its internal filters to support support the F/S mode.
3.4Mbps operation.
Figure 18. Bus Timing Diagram
Bus Timing Diagram Definitions
FAST MODE HIGH-SPEED MODE
PARAMETER MIN MAX MIN MAX UNITS
SCL Operating Frequency f(SCL) 0.001 0.4 0.001 3.4 MHz
Bus Free Time Between STOP and START t(BUF) 600 160 ns
Condition
Hold time after repeated START condition. t(HDSTA) 100 100 ns
After this period, the first clock is generated.
Repeated START Condition Setup Time t(SUSTA) 100 100 ns
STOP Condition Setup Time t(SUSTO) 100 100 ns
Data Hold Time t(HDDAT) 0 0 ns
Data Setup Time t(SUDAT) 100 10 ns
SCL Clock LOW Period t(LOW) 1300 160 ns
SCL Clock HIGH Period t(HIGH) 600 60 ns
Clock/Data Fall Time tF300 160 ns
Clock/Data Rise Time tR300 160 ns
Clock/Data Rise Time for SCLK ≤100kHz tR1000 ns
Copyright ©2008–2011, Texas Instruments Incorporated Submit Documentation Feedback 13
Product Folder Link(s): INA219
V =V GND-
BUS IN-
Rangeof0Vto26V
TypicalApplication12V
Data(SDA)
3.3VSupply
Clock(SCL)
´PowerRegister
CurrentRegister I C
Interface
2
VoltageRegister
VIN+ VIN-
ADC
PGA
INA219
GND
A0
A1
Current
Shunt
V =V V-
SHUNT IN+ IN-
Typically<50mV
Supply Load
-
+
INA219Power-SupplyVoltage
3Vto5.5V
VS
INA219
SBOS448F –AUGUST 2008–REVISED SEPTEMBER 2011
www.ti.com
Power-Up Conditions (Configuration Register, BADC bits). The Mode
control in the Configuration Register also permits
Power-up conditions apply to a software reset via the selecting modes to convert only voltage or current,
RST bit (bit 15) in the Configuration Register, or the either continuously or in response to an event
I2C bus General Call Reset. (triggered).
BASIC ADC FUNCTIONS All current and power calculations are performed in
the background and do not contribute to conversion
The two analog inputs to the INA219, VIN+ and VIN–,time; conversion times shown in the Electrical
connect to a shunt resistor in the bus of interest. The Characteristics table can be used to determine the
INA219 is typically powered by a separate supply actual conversion time.
from +3V to +5.5V. The bus being sensed can vary
from 0V to 26V. There are no special considerations Power-Down mode reduces the quiescent current
for power-supply sequencing (for example, a bus and turns off current into the INA219 inputs, avoiding
voltage can be present with the supply voltage off, any supply drain. Full recovery from Power-Down
and vice-versa). The INA219 senses the small drop requires 40μs. ADC Off mode (set by the
across the shunt for shunt voltage, and senses the Configuration Register, MODE bits) stops all
voltage with respect to ground from VIN–for the bus conversions.
voltage. Figure 19 illustrates this operation. Writing any of the triggered convert modes into the
When the INA219 is in the normal operating mode Configuration Register (even if the desired mode is
(that is, MODE bits of the Configuration Register are already programmed into the register) triggers a
set to '111'), it continuously converts the shunt single-shot conversion. Table 7 lists the triggered
voltage up to the number set in the shunt voltage convert mode settings.
averaging function (Configuration Register, SADC
bits). The device then converts the bus voltage up to
the number set in the bus voltage averaging
Figure 19. INA219 Configured for Shunt and Bus Voltage Measurement
14 Submit Documentation Feedback Copyright ©2008–2011, Texas Instruments Incorporated
Product Folder Link(s): INA219
Supply Load
R 10W
FILTER
R 10W
FILTER
0.1 Fto1 Fm m
CeramicCapacitor
Current
Shunt
Data(SDA)
3.3VSupply
Clock(SCL)
´PowerRegister
CurrentRegister I C
Interface
2
VoltageRegister
VIN+ VIN-
ADC
PGA
INA219
GND
A0
A1
SupplyVoltage
VS
INA219
www.ti.com
SBOS448F –AUGUST 2008–REVISED SEPTEMBER 2011
Compatibility with TI Hot Swap Controllers
Although the INA219 can be read at any time, and
the data from the last conversion remain available, The INA219 is designed for compatibility with hot
the Conversion Ready bit (Status Register, CNVR bit) swap controllers such the TI TPS2490. The TPS2490
is provided to help co-ordinate one-shot or triggered uses a high-side shunt with a limit at 50mV; the
conversions. The Conversion Ready bit is set after all INA219 full-scale range of 40mV enables the use of
conversions, averaging, and multiplication operations the same shunt for current sensing below this limit.
are complete. When sensing is required at (or through) the 50mV
sense point of the TPS2490, the PGA of the INA219
The Conversion Ready bit clears under these can be set to ÷2 to provide an 80mV full-scale range.
conditions:
1. Writing to the Configuration Register, except Filtering and Input Considerations
when configuring the MODE bits for Power Down
or ADC off (Disable) modes; Measuring current is often noisy, and such noise can
be difficult to define. The INA219 offers several
2. Reading the Status Register; or options for filtering by choosing resolution and
3. Triggering a single-shot conversion with the averaging in the Configuration Register. These
Convert pin. filtering options can be set independently for either
voltage or current measurement.
Power Measurement The internal ADC is based on a delta-sigma (ΔΣ)
Current and bus voltage are converted at different front-end with a 500kHz (±30%) typical sampling rate.
points in time, depending on the resolution and This architecture has good inherent noise rejection;
averaging mode settings. For instance, when however, transients that occur at or very close to the
configured for 12-bit and 128 sample averaging, up to sampling rate harmonics can cause problems.
68ms in time between sampling these two values is Because these signals are at 1MHz and higher, they
possible. Again, these calculations are performed in can be dealt with by incorporating filtering at the input
the background and do not add to the overall of the INA219. The high frequency enables the use of
conversion time. low-value series resistors on the filter for negligible
effects on measurement accuracy. In general, filtering
PGA Function the INA219 input is only necessary if there are
If larger full-scale shunt voltages are desired, the transients at exact harmonics of the 500kHz (±30%)
INA219 provides a PGA function that increases the sampling rate (>1MHz). Filter using the lowest
full-scale range up to 2, 4, or 8 times (320mV). possible series resistance and ceramic capacitor.
Additionally, the bus voltage measurement has two Recommended values are 0.1μF to 1.0μF. Figure 20
full-scale ranges: 16V or 32V. shows the INA219 with an additonal filter added at
the input.
Figure 20. INA219 with Input Filtering
Copyright ©2008–2011, Texas Instruments Incorporated Submit Documentation Feedback 15
Product Folder Link(s): INA219
INA219
SBOS448F –AUGUST 2008–REVISED SEPTEMBER 2011
www.ti.com
Simple Current Shunt Monitor Usage
Overload conditions are another consideration for the (No Programming Necessary)
INA219 inputs. The INA219 inputs are specified to
tolerate 26V across the inputs. A large differential The INA219 can be used without any programming if
scenario might be a short to ground on the load side it is only necessary to read a shunt voltage drop and
of the shunt. This type of event can result in full bus voltage with the default 12-bit resolution, 320mV
power-supply voltage across the shunt (as long the shunt full-scale range (PGA = ÷8), 32V bus full-scale
power supply or energy storage capacitors support it). range, and continuous conversion of shunt and bus
It must be remembered that removing a short to voltage.
ground can result in inductive kickbacks that could Without programming, current is measured by
exceed the 26V differential and common-mode rating reading the shunt voltage. The Current Register and
of the INA219. Inductive kickback voltages are best Power Register are only available if the Calibration
dealt with by zener-type transient-absorbing devices Register contains a programmed value.
(commonly called transzorbs) combined with
sufficient energy storage capacitance. Programming the INA219
In applications that do not have large energy storage The default power-up states of the registers are
electrolytics on one or both sides of the shunt, an shown in the INA219 register descriptions section of
input overstress condition may result from an this data sheet. These registers are volatile, and if
excessive dV/dt of the voltage applied to the input. A programmed to other than default values, must be
hard physical short is the most likely cause of this re-programmed at every device power-up. Detailed
event, particularly in applications with no large information on programming the Calibration Register
electrolytics present. This problem occurs because an specifically is given in the section, Programming the
excessive dV/dt can activate the ESD protection in INA219 Power Measurement Engine .
the INA219 in systems where large currents are
available. Testing has demonstrated that the addition
of 10Ωresistors in series with each input of the
INA219 sufficiently protects the inputs against dV/dt
failure up to the 26V rating of the INA219. These
resistors have no significant effect on accuracy.
16 Submit Documentation Feedback Copyright ©2008–2011, Texas Instruments Incorporated
Product Folder Link(s): INA219
MaxPossible_I= V
R
SHUNT_MAX
SHUNT
MaxPossible_I=0.64
Minimum_LSB= Max_Expected_I
32767
Minimum_LSB=18.311 10´-6
Maximum_LSB= Max_Expected_I
4096
Maximum_LSB=146.520 10´-6
Cal=trunc 0.04096
Current_LSB R´SHUNT
Cal=4096
INA219
www.ti.com
SBOS448F –AUGUST 2008–REVISED SEPTEMBER 2011
PROGRAMMING THE INA219 POWER Calibration Register can also be selected to provide
MEASUREMENT ENGINE values in the Current and Power Registers that either
provide direct decimal equivalents of the values being
Calibration Register and Scaling measured, or yield a round LSB number. After these
choices have been made, the Calibration Register
The Calibration Register makes it possible to set the also offers possibilities for end user system-level
scaling of the Current and Power Registers to calibration, where the value is adjusted slightly to
whatever values are most useful for a given cancel total system error.
application. One strategy may be to set the
Calibration Register such that the largest possible Below are two examples for configuring the INA219
number is generated in the Current Register or Power calibration. Both examples are written so the
Register at the expected full-scale point; this information directly relates to the calibration setup
approach yields the highest resolution. The found in the INA219EVM software.
Calibration Example 1: Calibrating the INA219 with no possibility for overflow. (Note that the numbers
used in this example are the same used with the INA219EVM software as shown in Figure 21.)
1. Establish the following parameters:
VBUS_MAX = 32
VSHUNT_MAX = 0.32
RSHUNT = 0.5
2. Using Equation 1, determine the maximum possible current .
(1)
3. Choose the desired maximum current value. This value is selected based on system expectations.
Max_Expected_I = 0.6
4. Calculate the possible range of current LSBs. To calculate this range, first compute a range of LSBs that is
appropriate for the design. Next, select an LSB within this range. Note that the results will have the most
resolution when the minimum LSB is selected. Typically, an LSB is selected to be the nearest round number
to the minimum LSB value.
(2)
(3)
Choose an LSB in the range: Minimum_LSB<Selected_LSB <Maximum_LSB
Current_LSB = 20 ×10–6
Note:
This value was selected to be a round number near the Minimum_LSB. This selection allows for
good resolution with a rounded LSB.
5. Compute the Calibration Register value using Equation 4:
(4)
Copyright ©2008–2011, Texas Instruments Incorporated Submit Documentation Feedback 17
Product Folder Link(s): INA219
Power_LSB=20Current_LSB
Power_LSB=400 10´-6
Max_Current=Current_LSB 32767´
Max_Current=0.65534
Max_ShuntVoltage=Max_Current_Before_Overflow R´SHUNT
Max_ShuntVoltage=0.32
MaximumPower=Max_Current_Before_Overflow V´BUS_MAX
MaximumPower=20.48
Corrected_Full_Scale_Cal=trunc Cal MeasShuntCurrent
INA219_Current
´
Corrected_Full_Scale_Cal=3548
INA219
SBOS448F –AUGUST 2008–REVISED SEPTEMBER 2011
www.ti.com
6. Calculate the Power LSB, using Equation 5.Equation 5 shows a general formula; because the bus voltage
measurement LSB is always 4mV, the power formula reduces to the calculated result.
(5)
7. Compute the maximum current and shunt voltage values (before overflow), as shown by Equation 6 and
Equation 7. Note that both Equation 6 and Equation 7 involve an If - then condition:
(6)
If Max_Current ≥Max Possible_I then
Max_Current_Before_Overflow = MaxPossible_I
ElseMax_Current_Before_Overflow = Max_Current
End If
(Note that Max_Current is greater than MaxPossible_I in this example.)
Max_Current_Before_Overflow = 0.64 (Note: This result is displayed by software as seen in Figure 21.)
(7)
If Max_ShuntVoltage ≥VSHUNT_MAX
Max_ShuntVoltage_Before_Overflow = VSHUNT_MAX
ElseMax_ShuntVoltage_Before_Overflow= Max_ShuntVoltage
End If
(Note that Max_ShuntVoltage is greater than VSHUNT_MAX in this example.)
Max_ShuntVoltage_Before_Overflow = 0.32 (Note: This result is displayed by software as seen in
Figure 21.)
8. Compute the maximum power with Equation 8.
(8)
9. (Optional second Calibration step.) Compute corrected full-scale calibration value based on measured
current.
INA219_Current = 0.63484
MeaShuntCurrent = 0.55
(9)
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Product Folder Link(s): INA219
Step1
Step2
Equ1
Step3
Step4
Equ2,3
Step5
Equ4
Step7
Equ6,7
Step5
Equ4
Step6
Equ4
Step7
Equ6,7
Step8
Equ8
Optional
Step9
Equ9
INA219
www.ti.com
SBOS448F –AUGUST 2008–REVISED SEPTEMBER 2011
Figure 21 illustrates how to perform the same the software example in Figure 21. Also note that
procedure discussed in this example using the Figure 21 illustrates which results correspond to
automated INA219EVM software. Note that the same which step (for example, the information entered in
numbers used in the nine-step example are used in Step 1 is enclosed in a box in Figure 21 and labeled).
Figure 21. INA219 Calibration Sofware Automatically Computes Calibration Steps 1-9
Copyright ©2008–2011, Texas Instruments Incorporated Submit Documentation Feedback 19
Product Folder Link(s): INA219
MaxPossible_I= V
R
SHUNT_MAX
SHUNT
MaxPossible_I=0.064
Minimum_LSB= Max_Expected_I
32767
Minimum_LSB=1.831 10´-6
Maximum_LSB= Max_Expected_I
4096
Maximum_LSB=14.652 10´-6
Cal=trunc 0.04096
Current_LSB R´SHUNT
Cal=4311
Power_LSB=20Current_LSB
Power_LSB=38 10´-6
INA219
SBOS448F –AUGUST 2008–REVISED SEPTEMBER 2011
www.ti.com
Calibration Example 2 (Overflow Possible) software. Note that the same numbers used in the
nine-step example are used in the software example
This design example uses the nine-step procedure for in Figure 22. Also note that Figure 22 illustrates which
calibrating the INA219 where overflow is possible. results correspond to which step (for example, the
Figure 22 illustrates how the same procedure is information entered in Step 1 is circled in Figure 22
performed using the automated INA219EVM and labeled).
1. Establish the following parameters:
VBUS_MAX = 32
VSHUNT_MAX = 0.32
RSHUNT = 5
2. Determine the maximum possible current using Equation 10:
(10)
3. Choose the desired maximum current value: Max_Expected_I, ≤MaxPossible_I. This value is selected
based on system expectations.
Max_Expected_I = 0.06
4. Calculate the possible range of current LSBs. This calculation is done by first computing a range of LSB's
that is appropriate for the design. Next, select an LSB withing this range. Note that the results will have the
most resolution when the minimum LSB is selected. Typically, an LSB is selected to be the nearest round
number to the minimum LSB.
(11)
(12)
Choose an LSB in the range: Minimum_LSB<Selected_LSB<Maximum_LSB
Current_LSB = 1.9 ×10–6
Note:
This value was selected to be a round number near the Minimum_LSB. This section allows for good
resolution with a rounded LSB.
5. Compute the calibration register using Equation 13:
(13)
6. Calculate the Power LSB using Equation 14.Equation 14 shows a general formula; because the bus voltage
measurement LSB is always 4mV, the power formula reduces to calculate the result.
(14)
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Product Folder Link(s): INA219
Max_Current=Current_LSB 32767´
Max_Current=0.06226
Max_ShuntVoltage=Max_Current_Before_Overflow R´SHUNT
Max_ShuntVoltage=0.3113
MaximumPower=Max_Current_Before_Overflow V´BUS_MAX
MaximumPower=1.992
Corrected_Full_Scale_Cal=trunc Cal MeasShuntCurrent
INA219_Current
´
Corrected_Full_Scale_Cal=3462
INA219
www.ti.com
SBOS448F –AUGUST 2008–REVISED SEPTEMBER 2011
7. Compute the maximum current and shunt voltage values (before overflow), as shown by Equation 15 and
Equation 16. Note that both Equation 15 and Equation 16 involve an If - then condition.
(15)
If Max_Current ≥Max Possible_I then
Max_Current_Before_Overflow = MaxPossible_I
ElseMax_Current_Before_Overflow = Max_Current
End If
(Note that Max_Current is less than MaxPossible_I in this example.)
Max_Current_Before_Overflow = 0.06226 (Note: This result is displayed by software as seen in Figure 22.)
(16)
If Max_ShuntVoltage ≥VSHUNT_MAX
Max_ShuntVoltage_Before_Overflow = VSHUNT_MAX
ElseMax_ShuntVoltage_Before_Overflow= Max_ShuntVoltage
End If
(Note that Max_ShuntVoltage is less than VSHUNT_MAX in this example.)
Max_ShuntVoltage_Before_Overflow = 0.3113 (Note: This result is displayed by software as seen in
Figure 22.)
8. Compute the maximum power with equation 8.
(17)
9. (Optional second calibration step.) Compute the corrected full-scale calibration value based on measured
current.
INA219_Current = 0.06226
MeaShuntCurrent = 0.05
(18)
Copyright ©2008–2011, Texas Instruments Incorporated Submit Documentation Feedback 21
Product Folder Link(s): INA219
Optional
Step9
Equ18
Step1
Step2
Equ10
Step3
Step4
Equ11,12
Step5
Equ13
Step7
Equ15,16
Step6
Equ14
Step8
Equ17
INA219
SBOS448F –AUGUST 2008–REVISED SEPTEMBER 2011
www.ti.com
Figure 22 illustrates how to perform the same Also note that Figure 22 illustrates which results
procedure discussed in this example using the correspond to which step (for example, the
automated INA219EVM software. Note that the same information entered in Step 1 is enclosed in a box in
numbers used in the nine-step example are used in Figure 22 and labeled).
the software example in Figure 22.
Figure 22. Calibration Software Automatically Computes Calibration Steps 1-9
22 Submit Documentation Feedback Copyright ©2008–2011, Texas Instruments Incorporated
Product Folder Link(s): INA219
R
2mW
SHUNT
10A
Load
+12V
VCM
GND
V
I
VIN+
VIN-
PowerRegister
I C
Interface
2
CurrentRegister
VoltageRegister
SDA
SCK
A0
A1
0.1 Fm10 Fm
+3.3Vto+5V
V (SupplyVoltage)
S
´
INA219
www.ti.com
SBOS448F –AUGUST 2008–REVISED SEPTEMBER 2011
CONFIGURE/MEASURE/CALCULATE shunt voltage. By knowing the value of the shunt
EXAMPLE resistor, the device can then calculate the amount of
current that created the measured shunt voltage drop.
In this example, the 10A load creates a differential The first step when calculating the calibration value is
voltage of 20mV across a 2mΩshunt resistor. The setting the current LSB. The Calibration Register
voltage present at the VIN–pin is equal to the value is based on a calculation that has its precision
common-mode voltage minus the differential drop capability limited by the size of the register and the
across the resistor. The bus voltage for the INA219 is Current Register LSB. The device can measure
internally measured at the VIN–pin to measure the bidirectional current; thus, the MSB of the Current
voltage level delivered to the load. For this example, Register is a sign bit that allows for the rest of the 15
the voltage at the VIN–pin is 11.98V. For this bits to be used for the Current Register value. It is
particular range (40mV full-scale), this small common when using the current value calculations to
difference is not a significant deviation from the 12V use a resolution between 12 bits and 15 bits.
common-mode voltage. However, at larger full-scale Calculating the current LSB for each of these
ranges, this deviation can be much larger. resolutions provides minimum and maximum values.
These values are calculated assuming the maximum
Note that the Bus Voltage Register bits are not current that will be expected to flow through the
right-aligned. In order to compute the value of the current shunt resistor, as shown in Equation 2 and
Bus Voltage Register contents using the LSB of 4mV, Equation 3. To simplify the mathematics, it is
the register must be shifted right by three bits. This common to choose a round number located between
shift puts the BD0 bit in the LSB position so that the these two points. For this example, the maximum
contents can be multiplied by the 4mV LSB value to current LSB is 3.66mA/bit and the minimum current
compute the bus voltage measured by the device. LSB would be 457.78µA/bit assuming a maximum
The shifted value of the bus voltage register contents expected current of 15A. For this example, a value of
is now equal to BB3h, a decimal equivalent of 2995. 1mA/bit was chosen for the current LSB. Setting the
This value of 2995 multiplied by the 4mV LSB results current LSB to this value allows for sufficient
in a value of 11.98V. precision while serving to simplify the math as well.
The Calibration Register (05h) is set in order to Using Equation 4 results in a Calibration Register
provide the device information about the current value of 20480, or 5000h.
shunt resistor that was used to create the measured
Figure 23. Example Circuit Configuration
Copyright ©2008–2011, Texas Instruments Incorporated Submit Documentation Feedback 23
Product Folder Link(s): INA219
INA219
SBOS448F –AUGUST 2008–REVISED SEPTEMBER 2011
www.ti.com
The Current Register (04h) is then calculated by this result by the power LSB that is 20 times the
multiplying the shunt voltage contents by the 1 ×10-3 current LSB, or 20 ×10-3, results in a power
Calibration Register and then dividing by 4096. For calculation of 5990 ×20mW/bit, which equals
this example, the shunt voltage of 2000 is multiplied 119.8W. This result matches what is expected for this
by the calibration register of 20480 and then divided register. A manual calculation for the power being
by 4096 to yield a Current Register of 2710h. delivered to the load would use 11.98V (12VCM –
20mV shunt drop) multiplied by the load current of
The Power Register (03h) is then be calculated by 10A to give a 119.8W result.
multiplying the Current Register of 10000 by the Bus
Voltage Register of 2995 and then dividing by 5000. Table 3 shows the steps for configuring, measuring,
For this example, the Power Register contents are and calculating the values for current and power for
1766h, or a decimal equivalent of 5990. Multiplying this device.
Table 3. Configure/Measure/Calculate Example(1)
STEP # REGISTER NAME ADDRESS CONTENTS ADJ DEC LSB VALUE
Step 1 Configuration 00h 019Fh
Step 2 Shunt 01h 07D0h 2000 10µV 20mV
Step 3 Bus 02h 5D98h 0BB3 2995 4mV 11.98V
Step 4 Calibration 05h 5000h 20480
Step 5 Current 04h 2710h 10000 1mA 10.0A
Step 6 Power 03h 1766h 5990 20mW 119.8W
(1) Conditions: load = 10A, VCM = 12V, RSHUNT = 2mΩ, VSHUNT FSR = 40mV, and VBUS = 16V.
24 Submit Documentation Feedback Copyright ©2008–2011, Texas Instruments Incorporated
Product Folder Link(s): INA219
INA219
www.ti.com
SBOS448F –AUGUST 2008–REVISED SEPTEMBER 2011
REGISTER INFORMATION
The INA219 uses a bank of registers for holding Register contents are updated 4μs after completion of
configuration settings, measurement results, the write command. Therefore, a 4μs delay is
maximum/minimum limits, and status information. required between completion of a write to a given
Table 4 summarizes the INA219 registers; Figure 12 register and a subsequent read of that register
illustrates registers. (without changing the pointer) when using SCL
frequencies in excess of 1MHz.
Table 4. Summary of Register Set
POINTER
ADDRESS POWER-ON RESET
HEX REGISTER NAME FUNCTION BINARY HEX TYPE(1)
All-register reset, settings for bus
00 Configuration Register voltage range, PGA Gain, ADC 00111001 10011111 399F R/W
resolution/averaging.
01 Shunt Voltage Shunt voltage measurement data. Shunt voltage —R
02 Bus Voltage Bus voltage measurement data. Bus voltage —R
03 Power(2) Power measurement data. 00000000 00000000 0000 R
Contains the value of the current flowing
04 Current(2) 00000000 00000000 0000 R
through the shunt resistor.
Sets full-scale range and LSB of current
05 Calibration and power measurements. Overall 00000000 00000000 0000 R/W
system calibration.
(1) Type: R= Read-Only, R/W = Read/Write.
(2) The Power Register and Current Register default to '0'because the Calibration Register defaults to '0', yielding a zero current value until
the Calibration Register is programmed.
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REGISTER DETAILS
All INA219 registers 16-bit registers are actually two 8-bit bytes via the I2C interface.
Configuration Register 00h (Read/Write)
BIT # D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
BIT RST —BRNG PG1 PG0 BADC4 BADC3 BADC2 BADC1 SADC4 SADC3 SADC2 SADC1 MODE3 MODE2 MODE1
NAME
POR 0 0 1 1 1 0 0 1 1 0 0 1 1 1 1 1
VALUE
Bit Descriptions
RST: Reset Bit
Bit 15 Setting this bit to '1' generates a system reset that is the same as power-on reset. Resets all registers to default
values; this bit self-clears.
BRNG: Bus Voltage Range
Bit 13 0 = 16V FSR
1 = 32V FSR (default value)
PG: PGA (Shunt Voltage Only)
Bits 11, 12 Sets PGA gain and range. Note that the PGA defaults to ÷8 (320mV range). Table 5 shows the gain and range for
the various product gain settings.
Table 5. PG Bit Settings(1)
PG1 PG0 GAIN RANGE
001 ±40mV
0 1 ÷2±80mV
1 0 ÷4±160mV
1 1 ÷8±320mV
(1) Shaded values are default.
BADC: BADC Bus ADC Resolution/Averaging
Bits 7–10 These bits adjust the Bus ADC resolution (9-, 10-, 11-, or 12-bit) or set the number of samples used when
averaging results for the Bus Voltage Register (02h).
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SADC: SADC Shunt ADC Resolution/Averaging
Bits 3–6 These bits adjust the Shunt ADC resolution (9-, 10-, 11-, or 12-bit) or set the number of samples used when
averaging results for the Shunt Voltage Register (01h).
BADC (Bus) and SADC (Shunt) ADC resolution/averaging and conversion time settings are shown in Table 6.
Table 6. ADC Settings(1)
ADC4 ADC3 ADC2 ADC1 MODE/SAMPLES CONVERSION TIME
0 X(2) 0 0 9-bit 84μs
0 X(2) 0 1 10-bit 148μs
0 X(2) 1 0 11-bit 276μs
0 X(2) 1 1 12-bit 532μs
1 0 0 0 12-bit 532μs
1 0 0 1 2 1.06ms
1 0 1 0 4 2.13ms
1 0 1 1 8 4.26ms
1 1 0 0 16 8.51ms
1 1 0 1 32 17.02ms
1 1 1 0 64 34.05ms
1 1 1 1 128 68.10ms
(1) Shaded values are default.
(2) X = Don't care.
MODE: Operating Mode
Bits 0–2 Selects continuous, triggered, or power-down mode of operation. These bits default to continuous shunt and bus
measurement mode. The mode settings are shown in Table 7.
Table 7. Mode Settings(1)
MODE3 MODE2 MODE1 MODE
0 0 0 Power-Down
0 0 1 Shunt Voltage, Triggered
0 1 0 Bus Voltage, Triggered
0 1 1 Shunt and Bus, Triggered
1 0 0 ADC Off (disabled)
1 0 1 Shunt Voltage, Continuous
1 1 0 Bus Voltage, Continuous
1 1 1 Shunt and Bus, Continuous
(1) Shaded values are default.
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DATA OUTPUT REGISTERS
Shunt Voltage Register 01h (Read-Only)
The Shunt Voltage Register stores the current shunt voltage reading, VSHUNT. Shunt Voltage Register bits are
shifted according to the PGA setting selected in the Configuration Register (00h). When multiple sign bits are
present, they will all be the same value. Negative numbers are represented in two's complement format.
Generate the two's complement of a negative number by complementing the absolute value binary number and
adding 1. Extend the sign, denoting a negative number by setting the MSB = '1'. Extend the sign to any
additional sign bits to form the 16-bit word.
Example: For a value of VSHUNT =–320mV:
1. Take the absolute value (include accuracy to 0.01mV)==>320.00
2. Translate this number to a whole decimal number ==>32000
3. Convert it to binary==>111 1101 0000 0000
4. Complement the binary result : 000 0010 1111 1111
5. Add 1 to the Complement to create the Two’s Complement formatted result ==>000 0011 0000 0000
6. Extend the sign and create the 16-bit word: 1000 0011 0000 0000 = 8300h (Remember to extend the sign to
all sign-bits, as necessary based on the PGA setting.)
At PGA = ÷8, full-scale range = ±320mV (decimal = 32000, positive value hex = 7D00, negative value hex =
8300), and LSB = 10μV.
BIT # D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
BIT SIGN SD14_8 SD13_8 SD12_8 SD11_8 SD10_8 SD9_8 SD8_8 SD7_8 SD6_8 SD5_8 SD4_8 SD3_8 SD2_8 SD1_8 SD0_8
NAME
POR 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
VALUE
At PGA = ÷4, full-scale range = ±160mV (decimal = 16000, positive value hex = 3E80, negative value hex =
C180), and LSB = 10μV.
BIT # D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
BIT SIGN SIGN SD13_4 SD12_4 SD11_4 SD10_4 SD9_4 SD8_4 SD7_4 SD6_4 SD5_4 SD4_4 SD3_4 SD2_4 SD1_4 SD0_4
NAME
POR 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
VALUE
At PGA = ÷2, full-scale range = ±80mV (decimal = 8000, positive value hex = 1F40, negative value hex = E0C0),
and LSB = 10μV.
BIT # D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
BIT SIGN SIGN SIGN SD12_2 SD11_2 SD10_2 SD9_2 SD8_2 SD7_2 SD6_2 SD5_2 SD4_2 SD3_2 SD2_2 SD1_2 SD0_2
NAME
POR 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
VALUE
At PGA = ÷1, full-scale range = ±40mV (decimal = 4000, positive value hex = 0FA0, negative value hex = F060),
and LSB = 10μV.
BIT # D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
BIT SIGN SIGN SIGN SIGN SD11_1 SD10_1 SD9_1 SD8_1 SD7_1 SD6_1 SD5_1 SD4_1 SD3_1 SD2_1 SD1_1 SD0_1
NAME
POR 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
VALUE
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Table 8. Shunt Voltage Register Format(1)
VSHUNT Decimal PGA = ÷8 PGA = ÷4 PGA = ÷2 PGA = ÷1
Reading (mV) Value (D15…..................D0) (D15…..................D0) (D15…..................D0) (D15…..................D0)
320.02 32002 0111 1101 0000 0000 0011 1110 1000 0000 0001 1111 0100 0000 0000 1111 1010 0000
320.01 32001 0111 1101 0000 0000 0011 1110 1000 0000 0001 1111 0100 0000 0000 1111 1010 0000
320.00 32000 0111 1101 0000 0000 0011 1110 1000 0000 0001 1111 0100 0000 0000 1111 1010 0000
319.99 31999 0111 1100 1111 1111 0011 1110 1000 0000 0001 1111 0100 0000 0000 1111 1010 0000
319.98 31998 0111 1100 1111 1110 0011 1110 1000 0000 0001 1111 0100 0000 0000 1111 1010 0000
160.02 16002 0011 1110 1000 0010 0011 1110 1000 0000 0001 1111 0100 0000 0000 1111 1010 0000
160.01 16001 0011 1110 1000 0001 0011 1110 1000 0000 0001 1111 0100 0000 0000 1111 1010 0000
160.00 16000 0011 1110 1000 0000 0011 1110 1000 0000 0001 1111 0100 0000 0000 1111 1010 0000
159.99 15999 0011 1110 0111 1111 0011 1110 0111 1111 0001 1111 0100 0000 0000 1111 1010 0000
159.98 15998 0011 1110 0111 1110 0011 1110 0111 1110 0001 1111 0100 0000 0000 1111 1010 0000
80.02 8002 0001 1111 0100 0010 0001 1111 0100 0010 0001 1111 0100 0000 0000 1111 1010 0000
80.01 8001 0001 1111 0100 0001 0001 1111 0100 0001 0001 1111 0100 0000 0000 1111 1010 0000
80.00 8000 0001 1111 0100 0000 0001 1111 0100 0000 0001 1111 0100 0000 0000 1111 1010 0000
79.99 7999 0001 1111 0011 1111 0001 1111 0011 1111 0001 1111 0011 1111 0000 1111 1010 0000
79.98 7998 0001 1111 0011 1110 0001 1111 0011 1110 0001 1111 0011 1110 0000 1111 1010 0000
40.02 4002 0000 1111 1010 0010 0000 1111 1010 0010 0000 1111 1010 0010 0000 1111 1010 0000
40.01 4001 0000 1111 1010 0001 0000 1111 1010 0001 0000 1111 1010 0001 0000 1111 1010 0000
40.00 4000 0000 1111 1010 0000 0000 1111 1010 0000 0000 1111 1010 0000 0000 1111 1010 0000
39.99 3999 0000 1111 1001 1111 0000 1111 1001 1111 0000 1111 1001 1111 0000 1111 1001 1111
39.98 3998 0000 1111 1001 1110 0000 1111 1001 1110 0000 1111 1001 1110 0000 1111 1001 1110
0.02 2 0000 0000 0000 0010 0000 0000 0000 0010 0000 0000 0000 0010 0000 0000 0000 0010
0.01 1 0000 0000 0000 0001 0000 0000 0000 0001 0000 0000 0000 0001 0000 0000 0000 0001
0 0 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000
–0.01 –1 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111 1111
–0.02 –2 1111 1111 1111 1110 1111 1111 1111 1110 1111 1111 1111 1110 1111 1111 1111 1110
–39.98 –3998 1111 0000 0110 0010 1111 0000 0110 0010 1111 0000 0110 0010 1111 0000 0110 0010
–39.99 –3999 1111 0000 0110 0001 1111 0000 0110 0001 1111 0000 0110 0001 1111 0000 0110 0001
–40.00 –4000 1111 0000 0110 0000 1111 0000 0110 0000 1111 0000 0110 0000 1111 0000 0110 0000
–40.01 –4001 1111 0000 0101 1111 1111 0000 0101 1111 1111 0000 0101 1111 1111 0000 0110 0000
–40.02 –4002 1111 0000 0101 1110 1111 0000 0101 1110 1111 0000 0101 1110 1111 0000 0110 0000
–79.98 –7998 1110 0000 1100 0010 1110 0000 1100 0010 1110 0000 1100 0010 1111 0000 0110 0000
–79.99 –7999 1110 0000 1100 0001 1110 0000 1100 0001 1110 0000 1100 0001 1111 0000 0110 0000
–80.00 –8000 1110 0000 1100 0000 1110 0000 1100 0000 1110 0000 1100 0000 1111 0000 0110 0000
–80.01 –8001 1110 0000 1011 1111 1110 0000 1011 1111 1110 0000 1100 0000 1111 0000 0110 0000
–80.02 –8002 1110 0000 1011 1110 1110 0000 1011 1110 1110 0000 1100 0000 1111 0000 0110 0000
–159.98 –15998 1100 0001 1000 0010 1100 0001 1000 0010 1110 0000 1100 0000 1111 0000 0110 0000
–159.99 –15999 1100 0001 1000 0001 1100 0001 1000 0001 1110 0000 1100 0000 1111 0000 0110 0000
–160.00 –16000 1100 0001 1000 0000 1100 0001 1000 0000 1110 0000 1100 0000 1111 0000 0110 0000
–160.01 –16001 1100 0001 0111 1111 1100 0001 1000 0000 1110 0000 1100 0000 1111 0000 0110 0000
–160.02 –16002 1100 0001 0111 1110 1100 0001 1000 0000 1110 0000 1100 0000 1111 0000 0110 0000
–319.98 –31998 1000 0011 0000 0010 1100 0001 1000 0000 1110 0000 1100 0000 1111 0000 0110 0000
–319.99 –31999 1000 0011 0000 0001 1100 0001 1000 0000 1110 0000 1100 0000 1111 0000 0110 0000
–320.00 –32000 1000 0011 0000 0000 1100 0001 1000 0000 1110 0000 1100 0000 1111 0000 0110 0000
–320.01 –32001 1000 0011 0000 0000 1100 0001 1000 0000 1110 0000 1100 0000 1111 0000 0110 0000
–320.02 –32002 1000 0011 0000 0000 1100 0001 1000 0000 1110 0000 1100 0000 1111 0000 0110 0000
(1) Out-of-range values are shown in grey shading.
Copyright ©2008–2011, Texas Instruments Incorporated Submit Documentation Feedback 29
Product Folder Link(s): INA219
Power= Current BusVoltage´
5000
Current= ShuntVoltage CalibrationRegister´
4096
INA219
SBOS448F –AUGUST 2008–REVISED SEPTEMBER 2011
www.ti.com
Bus Voltage Register 02h (Read-Only)
The Bus Voltage Register stores the most recent bus voltage reading, VBUS.
At full-scale range = 32V (decimal = 8000, hex = 1F40), and LSB = 4mV.
BIT # D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
BIT BD12 BD11 BD10 BD9 BD8 BD7 BD6 BD5 BD4 BD3 BD2 BD1 BD0 —CNVR OVF
NAME
POR 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
VALUE
At full-scale range = 16V (decimal = 4000, hex = 0FA0), and LSB = 4mV.
BIT # D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
BIT 0 BD11 BD10 BD9 BD8 BD7 BD6 BD5 BD4 BD3 BD2 BD1 BD0 —CNVR OVF
NAME
POR 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
VALUE
CNVR: Conversion Ready
Bit 1 Although the data from the last conversion can be read at any time, the INA219 Conversion Ready bit (CNVR)
indicates when data from a conversion is available in the data output registers. The CNVR bit is set after all
conversions, averaging, and multiplications are complete. CNVR will clear under the following conditions:
1.) Writing a new mode into the Operating Mode bits in the Configuration Register (except for Power-Down or
Disable)
2.) Reading the Power Register
OVF: Math Overflow Flag
Bit 0 The Math Overflow Flag (OVF) is set when the Power or Current calculations are out of range. It indicates that
current and power data may be meaningless.
Power Register 03h (Read-Only)
Full-scale range and LSB are set by the Calibration Register. See the Programming the INA219 Power
Measurement Engine section.
BIT # D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
BIT PD15 PD14 PD13 PD12 PD11 PD10 PD9 PD8 PD7 PD6 PD5 PD4 PD3 PD2 PD1 PD0
NAME
POR 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
VALUE
The Power Register records power in watts by multiplying the values of the current with the value of the bus
voltage according to the equation:
Current Register 04h (Read-Only)
Full-scale range and LSB depend on the value entered in the Calibration Register. See the Programming the
INA219 Power Measurement Engine section. Negative values are stored in two's complement format.
BIT # D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
BIT CSIGN CD14 CD13 CD12 CD11 CD10 CD9 CD8 CD7 CD6 CD5 CD4 CD3 CD2 CD1 CD0
NAME
POR 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
VALUE
The value of the Current Register is calculated by multiplying the value in the Shunt Voltage Register with the
value in the Calibration Register according to the equation:
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SBOS448F –AUGUST 2008–REVISED SEPTEMBER 2011
CALIBRATION REGISTER
Calibration Register 05h (Read/Write)
Current and power calibration are set by bits D15 to D1 of the Calibration Register. Note that bit D0 is not used in
the calculation. This register sets the current that corresponds to a full-scale drop across the shunt. Full-scale
range and the LSB of the current and power measurement depend on the value entered in this register. See the
Programming the INA219 Power Measurement Engine section. This register is suitable for use in overall system
calibration. Note that the '0' POR values are all default.
BIT # D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0(1)
BIT FS15 FS14 FS13 FS12 FS11 FS10 FS9 FS8 FS7 FS6 FS5 FS4 FS3 FS2 FS1 FS0
NAME
POR 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
VALUE
(1) D0 is a void bit and will always be '0'. It is not possible to write a '1'to D0. CALIBRATION is the value stored in D15:D1.
space REVISION HISTORY
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision E (September 2010) to Revision F Page
•Changed values in text. ...................................................................................................................................................... 24
•Changed step 5 and step 6 values in Table 3 .................................................................................................................... 24
Changes from Revision D (September 2010) to Revision E Page
•Updated Packaging Information table ................................................................................................................................... 2
Copyright ©2008–2011, Texas Instruments Incorporated Submit Documentation Feedback 31
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PACKAGE OPTION ADDENDUM
www.ti.com 19-Apr-2013
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish MSL Peak Temp
(3)
Op Temp (°C) Top-Side Markings
(4)
Samples
INA219AID ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -25 to 85 I219A
INA219AIDCNR ACTIVE SOT-23 DCN 8 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 A219
INA219AIDCNRG4 ACTIVE SOT-23 DCN 8 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 A219
INA219AIDCNT ACTIVE SOT-23 DCN 8 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 A219
INA219AIDCNTG4 ACTIVE SOT-23 DCN 8 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 A219
INA219AIDR ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 I219A
INA219BID ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 I219B
INA219BIDCNR ACTIVE SOT-23 DCN 8 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 B219
INA219BIDCNT ACTIVE SOT-23 DCN 8 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 125 B219
INA219BIDR ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 125 I219B
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
PACKAGE OPTION ADDENDUM
www.ti.com 19-Apr-2013
Addendum-Page 2
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a
continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
INA219AIDCNR SOT-23 DCN 8 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
INA219AIDCNT SOT-23 DCN 8 250 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
INA219BIDCNR SOT-23 DCN 8 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
INA219BIDCNT SOT-23 DCN 8 250 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
PACKAGE MATERIALS INFORMATION
www.ti.com 21-Sep-2011
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
INA219AIDCNR SOT-23 DCN 8 3000 195.0 200.0 45.0
INA219AIDCNT SOT-23 DCN 8 250 195.0 200.0 45.0
INA219BIDCNR SOT-23 DCN 8 3000 195.0 200.0 45.0
INA219BIDCNT SOT-23 DCN 8 250 195.0 200.0 45.0
PACKAGE MATERIALS INFORMATION
www.ti.com 21-Sep-2011
Pack Materials-Page 2
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