1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com
LR645
Features
Accepts inputs from 15 to 450V
Output currents up to 3.0mA continuous, 30mA peak
Supply current typically 50µA
Line regulation typically 0.1mV/V
Output can be trimmed from 8.0 to 12V
Output current can be increased to 150mA with
external FET
Applications
Off-line SMPS startup circuits (pulse loads)
Low power off-line regulators
Regulators for noisy inputs
General Description
The Supertex LR645 is a high input voltage, low output
current linear regulator. It has a 3-terminal fixed output voltage
version available in TO-92, TO-220 and SOT-89 packages,
as well as an adjustable voltage version available in an 8-
lead SOIC package. The 3-terminal version functions like any
other low voltage 3-terminal regulator except it allows the use
of much higher input voltages. When used in a SMPS start-
up circuit, it eliminates the need for large power resistors. In
this application, current is drawn from the high voltage line
only during start-up. Only leakage current flows after start-up,
thereby reducing the continuous power dissipation to a few
milliwatts.
The adjustable voltage version allows trimming of the output
voltage from 8.0 to 12V. This version can also be connected
to an external depletion mode MOSFET for increased output
current. When used in conjunction with Supertex depletion
mode MOSFET DN2540N5, an output current of up to 150mA
is achieved.
High Input Voltage SMPS Start-up / Linear Regulator
Caution!
The LR645 does NOT provide galvanic isolation.
When operated from an AC line, potentially lethal
voltages can be present on the IC. Adequate means
of protecting the end user from such voltages must be
provided by the circuit developer.
Ordering Information
Device Package Options
8-Lead SOIC TO-92 TO-220 TO-243AA (SOT-89)
LR645 LR645LG-G LR645N3-G LR645N5-G LR645N8-G
-G indicates package is RoHS compliant (‘Green’)
Absolute Maximum Ratings
Parameter Value
Input voltage 450V
Output voltage 15.5V
Operating and storage temperature -55°C to +150OC
Soldering temperature* 300OC
Absolute Maximum Ratings are those values beyond which damage to the device
may occur. Functional operation under these conditions is not implied. Continuous
operation of the device at the absolute rating level may affect device reliability. All
voltages are referenced to device ground.
* Distance of 1.6mm from case for 10 seconds.
Pin Configurations
+VIN
VOUT
NC
GND
NC
TRIM
GATE
NC
GND
VIN
VOUT
+VIN
VOUT
GND
GND
VIN
VOUT
GND
GND
TO-92 (N3)
TO-220 (N5)
8-Lead SOIC (LG)
TO-243AA (SOT-89) (N8)
2
LR645
1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com
Thermal Characteristics
Package
Power Dissipation
@TA = 25OC
(W)
θjc
(OC/W)
θja
(OC/W)
8-Lead SOIC 0.31 156 400*
TO-92 0.74 125 170
TO-220 1.8 8.3 70
TO-243AA (SOT-89) 1.6 15 78*
* Mounted on FR5 board; 25mm x 25mm x 1.57mm
Significant PD increase possible on ceramic substrate
Sym Parameter Min Typ Max Units Conditions
VOUT
Output voltage 9.3 10 10.7 V No load
Output voltage over temperature19.0 10 11.5 V TJ = - 40 to +125°C, No load
ΔVOUT
Line regulation - 40 200 mV VIN = 15 to 400V, No load
Load regulation - 150 400 mV VIN = 50V, IOUT = 0 to 3.0mA
VIN Operating input voltage range 15 - 450 V ---
IINQ Input quiescent current - 50 150 µA No Load
IOFF VIN off-state leakage current - 0.1 10 µA VAUX ≥ VOUT +1V applied to VOUT pin
IAUX Input current to VOUT - - 200 µA VAUX ≥ VOUT +1V applied to VOUT pin
ΔVOUT/ΔVIN Ripple rejection ratio150 60 - dB 120Hz, No Load
enNoise voltage1- 25 - µV 0.01 to 100KHz
IPEAK Output peak current2- 30 - mA COUT = 10µF, VIN = 400V
VAUX External voltage applied to VOUT - - 13.2 V ---
8-lead, adjustable output voltage version only:
Test conditions unless otherwise specified: TA = 25°C; VIN = 15 to 450V, COUT = 0.01µF
VOUT Output regulation trim range18 - 12 V No load
ΔVOUT
Load regulation at 8V trim1- 200 400 mV VIN = 15V, IOUT = 0 to 1.0mA
Load regulation at 12V trim1- 100 400 mV VIN = 50V, IOUT = 0 to 3.0mA
Notes:
Guaranteed by design, not tested in production.
Pulse test duration <1.0msec, duty cycle <2%
1.
2.
Electrical Characteristics
(Test conditions unless otherwise specified: TA = 25°C; VIN = 15 to 450V, COUT = 0.01µF)
Package Markings
YY = Year Sealed
WW = Week Sealed
L = Lot Number
= “Green” Packaging
YYWW
LR645
LLLL
8-Lead SOIC (LG)
TO-243AA (SOT-89) (N8)
L = Lot Number
YY = Year Sealed
WW = Week Sealed
= “Green” Packaging
Top Marking
LR645N5
LLLLLLLLL
YYWW
TO-220 (N5)
L R
6 4 5
YWLL
Y = Last Digit of Year Sealed
W = Code for Week Sealed
L = Lot Number
= “Green” Packaging
TO-92 (N3)
LR6W W = Code for Week Sealed
= “Green” Packaging
3
LR645
1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com
LR645: SMPS Start-Up Circuit
One of the main applications for the LR645 is a start-up
circuit for off-line switch-mode power supplies (SMPS), as
shown in Figure1. A minimum output capacitance of 0.01µF
is recommended for stability. The wide operating input volt-
age range of the LR645 allows the SMPS to operate and
start-up from rectified AC or a DC voltage of 15 to 450V with-
out adjustment.
During start-up, the LR645 powers the VCC line of the PWM
IC with a nominal output voltage of 10V. The auxiliary voltage
connected through a diode to the VOUT pin of the LR645 will
start to increase. When the auxiliary voltage becomes larger
than the output voltage the LR645 turns OFF its internal high
voltage input line and output voltage, allowing the auxiliary
voltage to power the VCC line of the PWM IC. The input
current drawn by the LR645 from the high voltage line after
start-up will therefore only be leakage current of the internal
MOSFET switch, which is typically 0.1µA.
The 3-terminal version shown in Figure 1 has load regula-
tion guaranteed from 0 to 3.0mA at a fixed nominal output
voltage of 10V. Applications requiring higher output current
and/or a different output voltage can use the 8 pin adjustable
version.
Figure 1: SMPS Start-Up Circuit
+
15V
to
450V
+
5.0V
VAUX = 12V
COUT
CIN
VCC
PWM IC
LR6
GND
VIN
LR645 Block Diagram
VOUT
GND
GATE
VIN
TRIM
+
LR645
4
LR645
1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com
Figure 2: High Current SMPS Start-Up Circuit
R2
R1
+
15V
to
400V
+
5.0V
DN2540
COUT
CIN
VCC
VAUX = 12V
Note: When used with the DN25, +VIN is not connected on the LR6.
PWM IC
LR645
VOUT
GND
GATE
TRIM
LR645: High Current SMPS Start-Up Circuit
The 8 lead version of the LR645 has connections for an ex-
ternal depletion-mode MOSFET for higher output current and
external resistors for adjustable output voltage. As shown in
Figure 2, the output current is increased to 150mA by using
the Supertex 400V depletion-mode MOSFET DN2540. The
maximum operating input voltage will be limited by the drain-
to-source breakdown voltage of the external MOSFET, but
cannot exceed the 450V rating of the LR645.
The output voltage can be adjusted from 8 to 12V with 2 ex-
ternal resistors, R1 and R2. The ratio of R2/R1 determines
the output voltage. R2 is connected between the VOUT and
TRIM pins. R1 is connected between TRIM and GND pins.
Figure 5 is a curve showing output voltage versus resistor
ratio R2/R1. The optimum range for R1 + R2 is 200KΩ to
300KΩ. This minimizes loading and optimizes accuracy of
the output voltage. Figure 5 uses an R1 + R2 of 250KΩ.
LR645: Off Line Linear Regulator
Circuits requiring low voltages to operate logic and analog
circuits benefit from the LR645. The conventional use of
step down transformers can be eliminated, thereby saving
space and cost. Some examples of these applications are:
proximity controlled light switches, street lamp controls, and
low voltage power supplies for appliances such as washing
machines, dishwashers, and refrigerators.
The wide operating input voltage range of 15 to 450V as well
as the ripple rejection ratio of 50dB minimum allows the use
of a small, high voltage input capacitor. The input AC line can
be either full-wave or half-wave rectified. A minimum output
capacitance of 0.01µF is recommended for output stability.
Figure 3 shows the LR645 as a pre-regulator to a precision-
regulator for high precision regulation. Higher output cur-
rent is also possible by using an external depletion-mode
MOSFET DN2540N5 as shown in Figure 4.
Power Dissipation Considerations
The LR645 is a true linear regulator. Its power dissipation is-
therefore a function of input voltage and output load current.
Forexample, if the LR645 is providing a continuous load cur-
rent of 3mAat 10V while its input voltage is 400V, total dis-
sipation in the LR645 will be:
PDISS= (VIN - VOUT) x (IOUT + IMAX QUIESCENT)
= (400V - 10V) x (3.0mA + 150µA)
= 1.23 Watts
The 1.23 watts is for continuous operation. This is within the
dissipation capabilities of the TO-220 and SOT-89 packag-
es. See the thermal characteristics chart on page 2 for derat-
ings. For SMPS start-up applications, the output current is
usually required only during start-up. This duration depends
upon the auxiliary supply output capacitor and COUT, but is
typically a few hundred milliseconds. All package types of
the LR645 have been characterized for use with a COUT of at
least 10µF, and an AC line of 277V.
5.000V
± 0.002V
@
0 to 3m
A
A
C Line
24V
to
277V
COUT
0.1µF
CIN
1.0µF
LR6
Max
875
ACSA
Figure 3: Cascading for Precision
5
LR645
1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com
A
Figure 4: High Current Regulation
Figure 5: Typical Output Voltage vs Resistor Ratio
12
10
8
2.5 3.0 4.03.5
Resistor Ratio (R2/R1)
e (V)g
a
tloV tuptu
O
R1 + R2 = 250KΩ
6
LR645
1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com
8-Lead SOIC (Narrow Body) Package Outline (LG/TG)
4.90x3.90mm body, 1.75mm height (max), 1.27mm pitch
1
8
Seating
Plane
Gauge
Plane
L
L1
L2
E
E1
D
eb
AA2
A1
Seating
Plane
A
A
Top View
Side View
View B
View B
θ1
θ
Note 1
(Index Area
D/2 x E1/2)
View A-A
h
h
Note 1
Symbol A A1 A2 b D E E1 e h L L1 L2 θ θ1
Dimension
(mm)
MIN 1.35* 0.10 1.25 0.31 4.80* 5.80* 3.80*
1.27
BSC
0.25 0.40
1.04
REF
0.25
BSC
0O5O
NOM - - - - 4.90 6.00 3.90 - - - -
MAX 1.75 0.25 1.65* 0.51 5.00* 6.20* 4.00* 0.50 1.27 8O15O
JEDEC Registration MS-012, Variation AA, Issue E, Sept. 2005.
* This dimension is not specified in the original JEDEC drawing. The value listed is for reference only.
Drawings are not to scale.
Supertex Doc. #: DSPD-8SOLGTG, Version H101708.
Note:
This chamfer feature is optional. A Pin 1 identifier must be located in the index area indicated. The Pin 1 identifier can be: a molded mark/identifier;
an embedded metal marker; or a printed indicator.
1.
7
LR645
1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com
3-Lead TO-92 Package Outline (N3)
Symbol A b c D E E1 e e1 L
Dimensions
(inches)
MIN .170 .014.014.175 .125 .080 .095 .045 .500
NOM - - - - - - - - -
MAX .210 .022.022.205 .165 .105 .105 .055 .610*
JEDEC Registration TO-92.
* This dimension is not specified in the original JEDEC drawing. The value listed is for reference only.
† This dimension is a non-JEDEC dimension.
Drawings not to scale.
Supertex Doc.#: DSPD-3TO92N3, Version D080408.
Seating Plane
1
2
3
Front View Side View
Bottom View
E1 E
D
e1
L
e
c
1 2 3
b
A
8
LR645
1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com
3-Lead TO-220 Package Outline (N5)
Symbol A A1 A2 b b2 c D D1 D2 E E1 E2 e H1 L L1 Q ΦP
Dimen-
sion
(inches)
MIN .140 .020 .080 .015 .045 .012.560 .326.474.380 .270 0.20*
.100
BSC
.230 .500 .200* .100 .139
NOM - - - .027 .057 - - - - - - - - - - - -
MAX .190 .055 .120.040 .070 .024 .650 .361.507 .420 .350 .030 .270 .580 .250 .135 .161
JEDEC Registration TO-220, Variation AB, Issue K, April 2002.
* This dimension is not specified in the original JEDEC drawing. The value listed is for reference only.
† This dimension is a non-JEDEC dimension.
Drawings not to scale.
Supertex Doc. #: DSPD-3TO220N5, Version B090308.
L
A2
A
e
View
B
1 2 3
D
D1
Q
4
E2
EΦP
Seating
Plane
A1
A
A
Chamfer
Optional
H1
E
D2
Thermal
Pad
Front View Side View View A - A
L1
b
b2
123
E1
View B
c
Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives an
adequate “product liability indemnification insurance agreement.” Supertex inc. does not assume responsibility for use of devices described, and limits its liability to the
replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and specifications
are subject to change without notice. For the latest product specifications refer to the Supertex inc. website: http//www.supertex.com.
©2008 All rights reserved. Unauthorized use or reproduction is prohibited.
1235 Bordeaux Drive, Sunnyvale, CA 94089
Tel: 408-222-8888
www.supertex.com
9
LR645
(The package drawings in this data sheet may not reflect the most current specifications. For the latest package outline
information go to http://www.supertex.com/packaging.html.)
Doc.# DSFP-LR645
A103008
3-Lead TO-243AA (SOT-89) Package Outline (N8)
Symbol A b b1 C D D1 E E1 e e1 H L
Dimensions
(mm)
MIN 1.40 0.44 0.36 0.35 4.40 1.62 2.29 2.13
1.50
BSC
3.00
BSC
3.94 0.89
NOM - - - - - - - - - -
MAX 1.60 0.56 0.48 0.44 4.60 1.83 2.60 2.29 4.25 1.20
JEDEC Registration TO-243, Variation AA, Issue C, July 1986.
Drawings not to scale.
Supertex Doc. #: DSPD-3TO243AAN8, Version D070908.
bb1