Contents
1. Status Information ....................................................................................................................... 7
2. Device Details ............................................................................................................................ 8
3. Device Diagram .......................................................................................................................... 9
4. Package Information ................................................................................................................... 10
4.1. Package Information .......................................................................................................... 10
4.2. Device Terminal Functions .................................................................................................. 11
4.3. Package Dimensions .......................................................................................................... 15
4.4. PCB Design and Assembly Considerations ............................................................................. 16
4.4.1. 51 Ball 3.21 x 3.49 x 0.6mm (max.), 0.4mm pitch WLCSP Package ..................................... 16
5. Bluetooth RF Interface Description ................................................................................................ 17
5.1. Bluetooth Radio Ports ......................................................................................................... 17
5.1.1. RF_N and RF_P ........................................................................................................ 17
5.2. Bluetooth Receiver ............................................................................................................. 18
5.2.1. Low Noise Amplifier ................................................................................................... 18
5.2.2. RSSI Analogue to Digital Converter .............................................................................. 18
5.3. Bluetooth Transmitter ......................................................................................................... 18
5.3.1. IQ Modulator ............................................................................................................ 18
5.3.2. Power Amplifier ........................................................................................................ 18
5.4. Bluetooth Radio Synthesiser ................................................................................................ 18
6. Clock Generation ....................................................................................................................... 19
6.1. Clock Input and Generation ................................................................................................. 19
6.1.1. Input Frequencies and PS Key Settings ......................................................................... 19
6.2. Crystal Oscillator (XTAL_IN, XTAL_OUT) ............................................................................... 20
6.2.1. Load Capacitance ..................................................................................................... 20
6.2.2. Frequency Trim ........................................................................................................ 21
6.2.3. Transconductance Driver Model ................................................................................... 21
6.2.4. Negative Resistance Model ......................................................................................... 22
6.2.5. Crystal PS Key Settings .............................................................................................. 22
6.3. 32kHz External Reference Clock ........................................................................................... 22
6.3.1. Clock Start Up Delay .................................................................................................. 22
7. Microcontroller, Memory and Baseband Logic .................................................................................. 24
7.1. AuriStream CODEC ........................................................................................................... 24
7.1.1. AuriStream CODEC Requirements ............................................................................... 24
7.1.2. AuriStream Hierarchy ................................................................................................. 25
7.2. Memory Management Unit ................................................................................................... 26
7.3. Burst Mode Controller ......................................................................................................... 26
7.4. Physical Layer Hardware Engine DSP ................................................................................... 26
7.5. System RAM .................................................................................................................... 26
7.6. ROM ............................................................................................................................... 26
7.7. Microcontroller .................................................................................................................. 26
7.8. TCXO Enable OR Function .................................................................................................. 26
7.9. WLAN Coexistence Interface ............................................................................................... 27
7.10. Configurable I/O Parallel Ports ............................................................................................ 27
7.11. TX-RX ........................................................................................................................... 27
8. Serial Peripheral Interface (SPI) .................................................................................................... 28
8.1. Serial Peripheral Interface (SPI) ............................................................................................ 28
8.1.1. Instruction Cycle ....................................................................................................... 28
8.1.2. Writing to the Device .................................................................................................. 29
8.1.3. Reading from the Device ............................................................................................ 29
8.1.4. Multi-Slave Operation ................................................................................................. 29
9. Host Interfaces .......................................................................................................................... 30
9.1. Host Selection ................................................................................................................... 30
9.2. UART Interface ................................................................................................................. 30
9.2.1. UART Configuration While Reset is Active ...................................................................... 32
9.3. CSR Serial Peripheral Interface (CSPI) .................................................................................. 33
9.3.1. CSPI Read/Write Cycles ............................................................................................. 33
9.3.2. CSPI Register Write Cycle .......................................................................................... 33
9.3.3. CSPI Register Read Cycle .......................................................................................... 34
9.3.4. CSPI Burst Write Cycle .............................................................................................. 34
9.3.5. CSPI Burst Read Cycle .............................................................................................. 34
Contents
CS-113960-DSP4
Advance Information
© CSR plc 2007 Page 2 of 70
BlueCore™6-ROM (WLCSP) Product Data Sheet