LM6142, LM6144 www.ti.com SNOS726D - JUNE 2000 - REVISED MARCH 2013 LM6142/LM6144 17 MHz Rail-to-Rail Input-Output Operational Amplifiers Check for Samples: LM6142, LM6144 FEATURES DESCRIPTION 1 At VS = 5V. Typ Unless Noted. 2 * * * * * * * * * Rail-to-rail Input CMVR -0.25V to 5.25V Rail-to-Rail Output Swing 0.005V to 4.995V Wide Gain-Bandwidth: 17MHz at 50kHz (typ) Slew Rate: - Small Signal, 5V/s - Large Signal, 30V/s Low Supply Current 650A/Amplifier Wide Supply Range 1.8V to 24V CMRR 107dB Gain 108dB with RL = 10k PSRR 87dB APPLICATIONS * * * * * Battery Operated Instrumentation Depth Sounders/Fish Finders Barcode Scanners Wireless Communications Rail-to-Rail in-out Instrumentation Amps Using patent pending new circuit topologies, the LM6142/LM6144 provides new levels of performance in applications where low voltage supplies or power limitations previously made compromise necessary. Operating on supplies of 1.8V to over 24V, the LM6142/LM6144 is an excellent choice for battery operated systems, portable instrumentation and others. The greater than rail-to-rail input voltage range eliminates concern over exceeding the commonmode voltage range. The rail-to-rail output swing provides the maximum possible dynamic range at the output. This is particularly important when operating on low supply voltages. High gain-bandwidth with 650A/Amplifier supply current opens new battery powered applications where previous higher power consumption reduced battery life to unacceptable levels. The ability to drive large capacitive loads without oscillating functionally removes this common problem. Connection Diagrams Figure 1. 8-Pin CDIP Top View Figure 2. 8-Pin PDIP/SOIC Top View Figure 3. 14-Pin PDIP/SOIC Top View 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright (c) 2000-2013, Texas Instruments Incorporated LM6142, LM6144 SNOS726D - JUNE 2000 - REVISED MARCH 2013 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) (2) ESD Tolerance (3) 2500V Differential Input Voltage 15V (V+) + 0.3V, (V-) - 0.3V Voltage at Input/Output Pin Supply Voltage (V+ - V-) 35V Current at Input Pin 10mA Current at Output Pin (4) 25mA Current at Power Supply Pin 50mA Lead Temperature (soldering, 10 sec) 260C -65C to +150C Storage Temp. Range Junction Temperature (1) (2) (3) (4) (5) (5) 150C Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics. If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and specifications. Human body model, 1.5k in series with 100pF. Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 150C. The maximum power dissipation is a function of TJ(MAX), JA, and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) - TA)/JA. All numbers apply for packages soldered directly into a PC board. Operating Ratings (1) 1.8V V+ 24V Supply Voltage -40C TA +85C Temperature Range LM6142, LM6144 Thermal Resistance (JA) P Package, 8-Pin PDIP 115C/W D Package, 8-Pin SOIC 193C/W NFF Package, 14-Pin PDIP 81C/W D Package, 14-Pin SOIC (1) 126C/W Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics. 5.0V DC Electrical Characteristics (1) Unless otherwise specified, all limits guaranteed for TA = 25C, V+ = 5.0V, V- = 0V, VCM = VO = V+/2 and RL > 1 M to V+/2. Boldface limits apply at the temperature extremes. Typ (2) LM6144AI LM6142AI Limit (3) LM6144BI LM6142BI Limit (3) Units Input Offset Voltage 0.3 1.0 2.5 mV 2.2 3.3 TCVOS Input Offset Voltage Average Drift 3 IB Input Bias Current Symbol Parameter VOS Conditions 0V VCM 5V 170 250 180 280 526 (1) (2) (3) 2 max V/C 300 nA max 526 Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that TJ = TA. No guarantee of parametric performance is indicated in the electrical tables under conditions of the internal self heating where TJ > TA. Typical values represent the most likely parametric norm. All limits are guaranteed by testing or statistical analysis. Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM6142 LM6144 LM6142, LM6144 www.ti.com SNOS726D - JUNE 2000 - REVISED MARCH 2013 5.0V DC Electrical Characteristics(1) (continued) Unless otherwise specified, all limits guaranteed for TA = 25C, V+ = 5.0V, V- = 0V, VCM = VO = V+/2 and RL > 1 M to V+/2. Boldface limits apply at the temperature extremes. Symbol Parameter IOS Input Offset Current RIN Input Resistance, CM CMRR Common Mode Rejection Ratio Conditions Power Supply Rejection Ratio 0V VCM 4V 5V V+ 24V LM6144BI LM6142BI Limit (3) 3 30 30 nA 80 80 max 107 Input Common-Mode Voltage Range AV Large Signal Voltage Gain RL = 10k Output Swing RL = 100k M 84 78 78 82 66 66 79 64 64 87 80 80 78 78 0 0 5.25 5.0 5.0 270 100 80 V/mV 70 33 25 min 0.005 4.995 RL = 10k 4.90 ISC Output Short Circuit Current LM6142 Sourcing 13 V 0.01 0.01 V 0.013 max 4.98 4.98 V 4.93 4.93 0.02 0.06 dB min 0.013 min V max 4.97 RL = 2k Units 84 -0.25 VCM VO LM6144AI LM6142AI Limit (3) 126 0V VCM 5V PSRR Typ (2) V min 0.1 0.1 V 0.133 0.133 max 4.86 4.86 V 4.80 4.80 min 10 8 mA 4.9 4 min 35 35 mA 10 10 mA 5.3 5.3 min 35 35 mA 6 6 mA 3 3 min 35 35 max Sinking 24 max ISC Output Short Circuit Current LM6144 Sourcing 8 mA max Sinking 22 8 8 mA 4 4 min 35 35 mA max IS Supply Current Per Amplifier 650 800 800 A 880 880 max Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM6142 LM6144 3 LM6142, LM6144 SNOS726D - JUNE 2000 - REVISED MARCH 2013 www.ti.com 5.0V AC Electrical Characteristics (1) Unless Otherwise Specified, All Limits Guaranteed for TA = 25C, V+ = 5.0V, V- = 0V, VCM = VO = V+/2 and RL > 1 M to V+/2. Boldface limits apply at the temperature extremes. Symbol Parameter Conditions SR Slew Rate 8 VPP @ V+ 12V Typ (2) LM6144AI LM6142AI Limit (3) LM6144BI LM6142BI Limit (3) 25 15 13 13 11 min 10 10 MHz 6 6 RS > 1 k f = 50 kHz V/s GBW Gain-Bandwidth Product m Phase Margin 38 Deg Amp-to-Amp Isolation 130 dB 16 nV Hz 0.22 pA Hz 0.003 % en Input-Referred Voltage Noise f = 1 kHz in Input-Referred Current Noise f = 1 kHz T.H.D. Total Harmonic Distortion f = 10 kHz, RL = 10 k, (1) 17 Units min Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that TJ = TA. No guarantee of parametric performance is indicated in the electrical tables under conditions of the internal self heating where TJ > TA. Typical values represent the most likely parametric norm. All limits are guaranteed by testing or statistical analysis. (2) (3) 2.7V DC Electrical Characteristics (1) Unless Otherwise Specified, All Limits Guaranteed for TA = 25C, V+ = 2.7V, V- = 0V, VCM = VO = V+/2 and RL > 1 M to V+/2. Boldface limits apply at the temperature extreme Symbol VOS Parameter Conditions Input Offset Voltage IB Input Bias Current LM6144AI LM6142AI Limit (3) LM6144BI LM6142BI Limit (3) 0.4 1.8 2.5 mV 4.3 5 max 250 300 nA 526 526 max 30 30 nA 80 80 max 150 IOS Input Offset Current RIN Input Resistance CMRR Common Mode Rejection Ratio PSRR Power Supply Rejection Ratio VCM Input Common-Mode Voltage Range AV Large Signal Voltage Gain RL = 10k Output Swing RL = 100k VO Typ (2) 4 128 M 0V VCM 1.8V 90 0V VCM 2.7V 76 dB min 3V V+ 5V 79 -0.25 0 0 V min 2.95 2.7 2.7 V max 55 (2) (3) 4 V/mV min 0.019 2.67 (1) Units 0.08 0.08 V 0.112 0.112 max 2.66 2.66 V 2.25 2.25 min Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that TJ = TA. No guarantee of parametric performance is indicated in the electrical tables under conditions of the internal self heating where TJ > TA. Typical values represent the most likely parametric norm. All limits are guaranteed by testing or statistical analysis. Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM6142 LM6144 LM6142, LM6144 www.ti.com SNOS726D - JUNE 2000 - REVISED MARCH 2013 2.7V DC Electrical Characteristics(1) (continued) Unless Otherwise Specified, All Limits Guaranteed for TA = 25C, V+ = 2.7V, V- = 0V, VCM = VO = V+/2 and RL > 1 M to V+/2. Boldface limits apply at the temperature extreme Symbol IS Parameter Supply Current Conditions Per Amplifier Typ (2) LM6144AI LM6142AI Limit (3) LM6144BI LM6142BI Limit (3) 510 800 800 A 880 880 max Units 2.7V AC Electrical Characteristics (1) Unless Otherwise Specified, All Limits Guaranteed for TA = 25C, V+ = 2.7V, V- = 0V, VCM = VO = V+/2 and RL > 1 M to V+/2. Boldface limits apply at the temperature extreme Symbol Parameter Conditions GBW Gain-Bandwidth Product f = 50 kHz m Gm (1) (2) (3) Typ (2) LM6144AI LM6142AI Limit (3) LM6144BI LM6142BI Limit (3) Units 9 MHz Phase Margin 36 Deg Gain Margin 6 dB Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that TJ = TA. No guarantee of parametric performance is indicated in the electrical tables under conditions of the internal self heating where TJ > TA. Typical values represent the most likely parametric norm. All limits are guaranteed by testing or statistical analysis. 24V Electrical Characteristics (1) Unless Otherwise Specified, All Limits Guaranteed for TA = 25C, V+ = 24V, V- = 0V, VCM = VO = V+/2 and RL > 1 M to V+/2. Boldface limits apply at the temperature extreme Typ (2) LM6144AI LM6142AI Limit (3) LM6144BI LM6142BI Limit (3) Units Input Offset Voltage 1.3 2 3.8 mV 4.8 4.8 max IB Input Bias Current 174 nA max IOS Input Offset Current 5 nA max RIN Input Resistance 288 M CMRR Common Mode Rejection Ratio 0V VCM 23V 114 0V VCM 24V 100 dB min PSRR Power Supply Rejection Ratio 0V VCM 24V 87 VCM Input Common-Mode Voltage Range AV Large Signal Voltage Gain RL = 10k 500 VO Output Swing RL = 10 k 0.07 Symbol Parameter VOS Conditions -0.25 0 0 V min 24.25 24 24 V max 23.85 (1) (2) (3) V/mV min 0.15 0.15 V 0.185 0.185 max 23.81 23.81 V 23.62 23.62 min Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that TJ = TA. No guarantee of parametric performance is indicated in the electrical tables under conditions of the internal self heating where TJ > TA. Typical values represent the most likely parametric norm. All limits are guaranteed by testing or statistical analysis. Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM6142 LM6144 5 LM6142, LM6144 SNOS726D - JUNE 2000 - REVISED MARCH 2013 www.ti.com 24V Electrical Characteristics(1) (continued) Unless Otherwise Specified, All Limits Guaranteed for TA = 25C, V+ = 24V, V- = 0V, VCM = VO = V+/2 and RL > 1 M to V+/2. Boldface limits apply at the temperature extreme Symbol Parameter Conditions Typ (2) LM6144AI LM6142AI Limit (3) LM6144BI LM6142BI Limit (3) IS Supply Current Per Amplifier 750 1100 1100 A 1150 1150 max GBW 6 Gain-Bandwidth Product f = 50 kHz 18 Submit Documentation Feedback Units MHz Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM6142 LM6144 LM6142, LM6144 www.ti.com SNOS726D - JUNE 2000 - REVISED MARCH 2013 Typical Performance Characteristics TA = 25C, RL = 10 k Unless Otherwise Specified Supply Current vs. Supply Voltage Offset Voltage vs. Supply Voltage Figure 4. Figure 5. Bias Current vs. Supply Voltage Offset Voltage vs. VCM Figure 6. Figure 7. Offset Voltage vs. VCM Offset Voltage vs. VCM Figure 8. Figure 9. Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM6142 LM6144 7 LM6142, LM6144 SNOS726D - JUNE 2000 - REVISED MARCH 2013 www.ti.com Typical Performance Characteristics (continued) TA = 25C, RL = 10 k Unless Otherwise Specified 8 Bias Current vs. VCM Bias Current vs. VCM Figure 10. Figure 11. Bias Current vs. VCM Open-Loop Transfer Function Figure 12. Figure 13. Open-Loop Transfer Function Open-Loop Transfer Function Figure 14. Figure 15. Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM6142 LM6144 LM6142, LM6144 www.ti.com SNOS726D - JUNE 2000 - REVISED MARCH 2013 Typical Performance Characteristics (continued) TA = 25C, RL = 10 k Unless Otherwise Specified Output Voltage vs. Source Current Output Voltage vs. Source Current Figure 16. Figure 17. Output Voltage vs. Source Current Output Voltage vs. Sink Current Figure 18. Figure 19. Output Voltage vs. Sink Current Output Voltage vs. Sink Current Figure 20. Figure 21. Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM6142 LM6144 9 LM6142, LM6144 SNOS726D - JUNE 2000 - REVISED MARCH 2013 www.ti.com Typical Performance Characteristics (continued) TA = 25C, RL = 10 k Unless Otherwise Specified 10 Gain and Phase vs. Load Gain and Phase vs. Load Figure 22. Figure 23. Distortion + Noise vs. Frequency GBW vs. Supply Figure 24. Figure 25. Open Loop Gain vs. Load, 3V Supply Open Loop Gain vs. Load, 5V Supply Figure 26. Figure 27. Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM6142 LM6144 LM6142, LM6144 www.ti.com SNOS726D - JUNE 2000 - REVISED MARCH 2013 Typical Performance Characteristics (continued) TA = 25C, RL = 10 k Unless Otherwise Specified Open Loop Gain vs. Load, 24V Supply Unity Gain Frequency vs. VS Figure 28. Figure 29. CMRR vs. Frequency Crosstalk vs. Frequency Figure 30. Figure 31. PSRR vs. Frequency Noise Voltage vs. Frequency Figure 32. Figure 33. Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM6142 LM6144 11 LM6142, LM6144 SNOS726D - JUNE 2000 - REVISED MARCH 2013 www.ti.com Typical Performance Characteristics (continued) TA = 25C, RL = 10 k Unless Otherwise Specified 12 Noise Current vs. Frequency NF vs. RSource Figure 34. Figure 35. Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM6142 LM6144 LM6142, LM6144 www.ti.com SNOS726D - JUNE 2000 - REVISED MARCH 2013 LM6142/LM6144 APPLICATION IDEAS The LM6142 brings a new level of ease of use to op amp system design. With greater than rail-to-rail input voltage range concern over exceeding the common-mode voltage range is eliminated. Rail-to-rail output swing provides the maximum possible dynamic range at the output. This is particularly important when operating on low supply voltages. The high gain-bandwidth with low supply current opens new battery powered applications, where high power consumption, previously reduced battery life to unacceptable levels. To take advantage of these features, some ideas should be kept in mind. ENHANCED SLEW RATE Unlike most bipolar op amps, the unique phase reversal prevention/speed-up circuit in the input stage causes the slew rate to be very much a function of the input signal amplitude. Figure 36 shows how excess input signal, is routed around the input collector-base junctions, directly to the current mirrors. The LM6142/LM6144 input stage converts the input voltage change to a current change. This current change drives the current mirrors through the collectors of Q1-Q2, Q3-Q4 when the input levels are normal. Figure 36. If the input signal exceeds the slew rate of the input stage, the differential input voltage rises above two diode drops. This excess signal bypasses the normal input transistors, (Q1-Q4), and is routed in correct phase through the two additional transistors, (Q5, Q6), directly into the current mirrors. This rerouting of excess signal allows the slew-rate to increase by a factor of 10 to 1 or more. (See Figure 37.) As the overdrive increases, the op amp reacts better than a conventional op amp. Large fast pulses will raise the slew- rate to around 30V to 60V/s. Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM6142 LM6144 13 LM6142, LM6144 SNOS726D - JUNE 2000 - REVISED MARCH 2013 www.ti.com Figure 37. Slew Rate vs. VIN VS = 5V This effect is most noticeable at higher supply voltages and lower gains where incoming signals are likely to be large. This new input circuit also eliminates the phase reversal seen in many op amps when they are overdriven. This speed-up action adds stability to the system when driving large capacitive loads. DRIVING CAPACITIVE LOADS Capacitive loads decrease the phase margin of all op amps. This is caused by the output resistance of the amplifier and the load capacitance forming an R-C phase lag network. This can lead to overshoot, ringing and oscillation. Slew rate limiting can also cause additional lag. Most op amps with a fixed maximum slew-rate will lag further and further behind when driving capacitive loads even though the differential input voltage raises. With the LM6142, the lag causes the slew rate to raise. The increased slew-rate keeps the output following the input much better. This effectively reduces phase lag. After the output has caught up with the input, the differential input voltage drops down and the amplifier settles rapidly. These features allow the LM6142 to drive capacitive loads as large as 1000pF at unity gain and not oscillate. The scope photos (Figure 38 and Figure 39) above show the LM6142 driving a l000pF load. In Figure 38, the upper trace is with no capacitive load and the lower trace is with a 1000pF load. Here we are operating on 12V supplies with a 20 VPP pulse. Excellent response is obtained with a Cf of l0pF. In Figure 39, the supplies have been reduced to 2.5V, the pulse is 4 VPP and Cf is 39pF. The best value for the compensation capacitor is best established after the board layout is finished because the value is dependent on board stray capacity, the value of the feedback resistor, the closed loop gain and, to some extent, the supply voltage. Another effect that is common to all op amps is the phase shift caused by the feedback resistor and the input capacitance. This phase shift also reduces phase margin. This effect is taken care of at the same time as the effect of the capacitive load when the capacitor is placed across the feedback resistor. The circuit shown in Figure 40 was used for these scope photos. Figure 38. 14 Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM6142 LM6144 LM6142, LM6144 www.ti.com SNOS726D - JUNE 2000 - REVISED MARCH 2013 Figure 39. Figure 40. Typical Applications FISH FINDER/ DEPTH SOUNDER. The LM6142/LM6144 is an excellent choice for battery operated fish finders. The low supply current, high gainbandwidth and full rail to rail output swing of the LM6142 provides an ideal combination for use in this and similar applications. ANALOG TO DIGITAL CONVERTER BUFFER The high capacitive load driving ability, rail-to-rail input and output range with the excellent CMR of 82 dB, make the LM6142/LM6144 a good choice for buffering the inputs of A to D converters. 3 OP AMP INSTRUMENTATION AMP WITH RAIL-TO-RAIL INPUT AND OUTPUT Using the LM6144, a 3 op amp instrumentation amplifier with rail-to-rail inputs and rail to rail output can be made. These features make these instrumentation amplifiers ideal for single supply systems. Some manufacturers use a precision voltage divider array of 5 resistors to divide the common-mode voltage to get an input range of rail-to-rail or greater. The problem with this method is that it also divides the signal, so to even get unity gain, the amplifier must be run at high closed loop gains. This raises the noise and drift by the internal gain factor and lowers the input impedance. Any mismatch in these precision resistors reduces the CMR as well. Using the LM6144, all of these problems are eliminated. In this example, amplifiers A and B act as buffers to the differential stage (Figure 41). These buffers assure that the input impedance is over 100M and they eliminate the requirement for precision matched resistors in the input stage. They also assure that the difference amp is driven from a voltage source. This is necessary to maintain the CMR set by the matching of R1-R2 with R3-R4. Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM6142 LM6144 15 LM6142, LM6144 SNOS726D - JUNE 2000 - REVISED MARCH 2013 www.ti.com Figure 41. The gain is set by the ratio of R2/R1 and R3 should equal R1 and R4 equal R2. Making R4 slightly smaller than R2 and adding a trim pot equal to twice the difference between R2 and R4 will allow the CMR to be adjusted for optimum. With both rail to rail input and output ranges, the inputs and outputs are only limited by the supply voltages. Remember that even with rail-to-rail output, the output can not swing past the supplies so the combined common mode voltage plus the signal should not be greater than the supplies or limiting will occur. SPICE MACROMODEL A SPICE macromodel of this and many other Texas Instruments op amps is http://www.ti.com/ww/en/analog/webench/index.shtml?DCMP=hpa_sva_webench&HQS=webench-bb. 16 Submit Documentation Feedback available Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM6142 LM6144 LM6142, LM6144 www.ti.com SNOS726D - JUNE 2000 - REVISED MARCH 2013 REVISION HISTORY Changes from Revision C (March 2013) to Revision D * Page Changed layout of National Data Sheet to TI format .......................................................................................................... 16 Submit Documentation Feedback Copyright (c) 2000-2013, Texas Instruments Incorporated Product Folder Links: LM6142 LM6144 17 PACKAGE OPTION ADDENDUM www.ti.com 22-Feb-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (C) Device Marking (4/5) LM6142AIM NRND SOIC D 8 95 TBD Call TI Call TI -40 to 85 LM614 2AIM LM6142AIM/NOPB ACTIVE SOIC D 8 95 Green (RoHS & no Sb/Br) SN Level-1-260C-UNLIM -40 to 85 LM614 2AIM LM6142AIMX NRND SOIC D 8 2500 TBD Call TI Call TI -40 to 85 LM614 2AIM LM6142AIMX/NOPB ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) SN Level-1-260C-UNLIM -40 to 85 LM614 2AIM LM6142BIM NRND SOIC D 8 95 TBD Call TI Call TI -40 to 85 LM614 2BIM LM6142BIM/NOPB ACTIVE SOIC D 8 95 Green (RoHS & no Sb/Br) SN Level-1-260C-UNLIM -40 to 85 LM614 2BIM LM6142BIMX NRND SOIC D 8 2500 TBD Call TI Call TI -40 to 85 LM614 2BIM LM6142BIMX/NOPB ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) SN Level-1-260C-UNLIM -40 to 85 LM614 2BIM LM6142BIN/NOPB ACTIVE PDIP P 8 40 Green (RoHS & no Sb/Br) Call TI | SN Level-1-NA-UNLIM -40 to 85 LM6142 BIN LM6144AIM NRND SOIC D 14 55 TBD Call TI Call TI -40 to 85 LM6144 AIM LM6144AIM/NOPB ACTIVE SOIC D 14 55 Green (RoHS & no Sb/Br) SN Level-1-260C-UNLIM -40 to 85 LM6144 AIM LM6144AIMX/NOPB ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) SN Level-1-260C-UNLIM -40 to 85 LM6144 AIM LM6144BIM NRND SOIC D 14 55 TBD Call TI Call TI -40 to 85 LM6144 BIM LM6144BIM/NOPB ACTIVE SOIC D 14 55 Green (RoHS & no Sb/Br) SN Level-1-260C-UNLIM -40 to 85 LM6144 BIM LM6144BIMX NRND SOIC D 14 2500 TBD Call TI Call TI -40 to 85 LM6144 BIM LM6144BIMX/NOPB ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) SN Level-1-260C-UNLIM -40 to 85 LM6144 BIM LM6144BIN/NOPB ACTIVE PDIP NFF 14 25 Green (RoHS & no Sb/Br) SN Level-1-NA-UNLIM -40 to 85 LM6144BIN Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 22-Feb-2020 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. 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Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 29-Sep-2019 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant LM6142AIMX SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LM6142AIMX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LM6142BIMX SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LM6142BIMX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LM6144AIMX/NOPB SOIC D 14 2500 330.0 16.4 6.5 9.35 2.3 8.0 16.0 Q1 LM6144BIMX SOIC D 14 2500 330.0 16.4 6.5 9.35 2.3 8.0 16.0 Q1 LM6144BIMX/NOPB SOIC D 14 2500 330.0 16.4 6.5 9.35 2.3 8.0 16.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 29-Sep-2019 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM6142AIMX SOIC D 8 2500 367.0 367.0 35.0 LM6142AIMX/NOPB SOIC D 8 2500 367.0 367.0 35.0 LM6142BIMX SOIC D 8 2500 367.0 367.0 35.0 LM6142BIMX/NOPB SOIC D 8 2500 367.0 367.0 35.0 LM6144AIMX/NOPB SOIC D 14 2500 367.0 367.0 35.0 LM6144BIMX SOIC D 14 2500 367.0 367.0 35.0 LM6144BIMX/NOPB SOIC D 14 2500 367.0 367.0 35.0 Pack Materials-Page 2 PACKAGE OUTLINE D0008A SOIC - 1.75 mm max height SCALE 2.800 SMALL OUTLINE INTEGRATED CIRCUIT C SEATING PLANE .228-.244 TYP [5.80-6.19] A .004 [0.1] C PIN 1 ID AREA 6X .050 [1.27] 8 1 2X .150 [3.81] .189-.197 [4.81-5.00] NOTE 3 4X (0 -15 ) 4 5 B 8X .012-.020 [0.31-0.51] .010 [0.25] C A B .150-.157 [3.81-3.98] NOTE 4 .069 MAX [1.75] .005-.010 TYP [0.13-0.25] 4X (0 -15 ) SEE DETAIL A .010 [0.25] .004-.010 [0.11-0.25] 0 -8 .016-.050 [0.41-1.27] DETAIL A (.041) [1.04] TYPICAL 4214825/C 02/2019 NOTES: 1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed .006 [0.15] per side. 4. This dimension does not include interlead flash. 5. Reference JEDEC registration MS-012, variation AA. www.ti.com EXAMPLE BOARD LAYOUT D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM SEE DETAILS 1 8 8X (.024) [0.6] 6X (.050 ) [1.27] SYMM 5 4 (R.002 ) TYP [0.05] (.213) [5.4] LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:8X METAL SOLDER MASK OPENING EXPOSED METAL .0028 MAX [0.07] ALL AROUND SOLDER MASK OPENING METAL UNDER SOLDER MASK EXPOSED METAL .0028 MIN [0.07] ALL AROUND SOLDER MASK DEFINED NON SOLDER MASK DEFINED SOLDER MASK DETAILS 4214825/C 02/2019 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com EXAMPLE STENCIL DESIGN D0008A SOIC - 1.75 mm max height SMALL OUTLINE INTEGRATED CIRCUIT 8X (.061 ) [1.55] SYMM 1 8 8X (.024) [0.6] 6X (.050 ) [1.27] SYMM 5 4 (R.002 ) TYP [0.05] (.213) [5.4] SOLDER PASTE EXAMPLE BASED ON .005 INCH [0.125 MM] THICK STENCIL SCALE:8X 4214825/C 02/2019 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. 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