LMZ22003
June 15, 2011
3A SIMPLE SWITCHER® Power Module with 20V Maximum
Input Voltage
Easy To Use 7 Pin Package
30116886
TO-PMOD 7 Pin Package
10.16 x 13.77 x 4.57 mm (0.4 x 0.542 x 0.18 in)
θJA = 12°C/W, θJC = 1.9°C/W (Note 6)
RoHS Compliant
Electrical Specifications
■18W maximum total output power
■Up to 3A output current
■Input voltage range 6V to 20V
■Output voltage range 0.8V to 6V
■Efficiency up to 92%
Key Features
■Integrated shielded inductor
■Simple PCB layout
■Frequency synchronization input (650 kHz to 950 kHz)
■Flexible startup sequencing using external soft-start,
tracking and precision enable
■Protection against inrush currents and faults such as input
UVLO and output short circuit
■– 40°C to 125°C junction temperature range
■Single exposed pad and standard pinout for easy
mounting and manufacturing
■Fast transient response for powering FPGAs and ASICs
■Fully enabled for Webench® Power Designer
■Pin compatible with LMZ23605/LMZ23603/LMZ22005
Applications
■Point of load conversions from 12V input rail
■Time critical projects
■Space constrained / high thermal requirement applications
■Negative output voltage applications See AN-2027
Performance Benefits
■High efficiency reduces system heat generation
■Complies with EN55022 Class B (Note 5)
■Low component count, only 5 external components
■Low output voltage ripple
■Uses PCB as heat sink, no airflow required
System Performance
Efficiency VIN = 12V VOUT = 5.0V
0123
0
10
20
30
40
50
60
70
80
90
100
0
1
2
3
4
EFFICIENCY (%)
OUTPUT CURRENT (A)
DISSIPATION (W)
30116803
Thermal Derating Curve
VIN = 12V VOUT = 5.0V
30 40 50 60 70 80 90 100 110 120 130
0
1
2
3
4
MAXIMUM OUTPUT CURRENT (A)
AMBIENT TEMPERATURE (°C)
θJA=12°C/W
30116889
Radiated EMI (EN 55022)
of Demo Board (See AN-2125)
0 200 400 600 800 1000
0
5
10
15
20
25
30
35
40
45
50
AMPLITUDE (dBuV/m)
FREQUENCY (MHz)
Class A Limit
Class B Limit
Horiz Peak
Horiz Quasi-peak
30116895
© 2011 National Semiconductor Corporation 301168 www.national.com
LMZ22003 3A SIMPLE SWITCHER® Power Module with 20V Maximum Input Voltage
Simplified Application Schematic
30116801
Connection Diagram
30116802
Top View
7-Lead TO-PMOD
Ordering Information
Order Number Package Type NSC Package Drawing Supplied As
LMZ22003TZ TO-PMOD-7 TZA07A 45 Units in a Rail
LMZ22003TZE TO-PMOD-7 TZA07A 250 Units on Tape and Reel
LMZ22003TZX TO-PMOD-7 TZA07A 500 Units on Tape and Reel
Pin Descriptions
Pin Name Description
1 VIN Supply input — Nominal operating range is 6V to 20V . A small amount of internal capacitance is contained within
the package assembly. Additional external input capacitance is required between this pin and exposed pad (PGND).
2 SYNC Sync Input — Apply a CMOS logic level square wave whose frequency is between 650 kHz and 950 kHz to
synchronize the PWM operating frequency to an external frequency source. When not using synchronization connect
to ground. The module free running PWM frequency is 812 kHz (Typ).
3 EN Enable — Input to the precision enable comparator. Rising threshold is 1.279V typical. Once the module is enabled,
a 21 uA source current is internally activated to facilitate programmable hysteresis.
4 AGND Analog Ground — Reference point for all stated voltages. Must be externally connected to PGND (EP).
5 FB Feedback — Internally connected to the regulation amplifier, over-voltage comparators. The regulation reference
point is 0.796V at this input pin. Connect the feedback resistor divider between the output and AGND to set the output
voltage.
6 SS/
TRK
Soft-Start/Track — To extend the 1.6 mSec internal soft-start connect an external soft start capacitor. For tracking
connect to an external resistive divider connected to a higher priority supply rail. See applications section
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LMZ22003
Pin Name Description
7 VOUT Output Voltage — Output from the internal inductor. Connect the output capacitor between this pin and exposed pad.
EP PGND Exposed Pad / Power Ground Electrical path for the power circuits within the module. — NOT Internally connected
to AGND / pin 4. Used to dissipate heat from the package during operation. Must be electrically connected to pin 4
external to the package.
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LMZ22003
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
VIN to PGND -0.3V to 24V
EN, SYNC to AGND -0.3V to 5.5V
SS/TRK, FB to AGND -0.3V to 2.5V
AGND to PGND -0.3V to 0.3V
Junction Temperature 150°C
Storage Temperature Range -65°C to 150°C
ESD Susceptibility (Note 2) ± 2 kV
For soldering specifications:
see product folder at www.national.com and
www.national.com/ms/MS/MS-SOLDERING.pdf
Operating Ratings (Note 1)
VIN 6V to 20V
EN, SYNC 0V to 5.0V
Operation Junction Temperature −40°C to 125°C
Electrical Characteristics Limits in standard type are for TJ = 25°C only; limits in boldface type apply over the
junction temperature (TJ) range of -40°C to +125°C. Minimum and Maximum limits are guaranteed through test, design or statistical
correlation. Typical values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only.
Unless otherwise stated the following conditions apply: VIN = 12V, Vout = 3.3V
Symbol Parameter Conditions Min
(Note 3)
Typ
(Note 4)
Max
(Note 3)Units
SYSTEM PARAMETERS
Enable Control
VEN EN threshold trip point VEN rising 1.10 1.279 1.458 V
VEN-HYS EN input hysteresis current VEN > 1.279V –21 µA
Soft-Start
ISS SS source current VSS = 0V 40 50 60 µA
tSS Internal soft-start interval 1.6 msec
Current Limit
ICL Current limit threshold d.c. average 3.4 A
Internal Switching Oscillator
fosc Free-running oscillator
frequency
Sync input connected to ground. 711 812 914 kHz
fsync Synchronization range 650 950 kHz
VIL-sync Synchronization logic zero
amplitude
Relative to AGND 0.4 V
VIH-sync Synchronization logic one
amplitude
Relative to AGND. 1.5 V
Sync d.c. Synchronization duty cycle
range
15 50 85 %
Dmax Maximum Duty Factor 83 %
Regulation and Over-Voltage Comparator
VFB In-regulation feedback voltage VSS >+ 0.8V
IO = 3A
0.776 0.796 0.816 V
VFB-OV Feedback over-voltage
protection threshold
0.86 V
IFB Feedback input bias current 5 nA
IQNon Switching Input Current VFB= 0.86V 2.6 mA
ISD Shut Down Quiescent Current VEN= 0V 70 μA
Thermal Characteristics
TSD Thermal Shutdown Rising 165 °C
TSD-HYST Thermal shutdown hysteresis Falling 15 °C
θJA Junction to Ambient(Note 6)4 layer Evaluation Printed Circuit Board,
60 vias, No air flow
12.0 °C/W
2 layer JEDEC Printed Circuit Board, No
air flow
21.5 °C/W
θJC Junction to Case No air flow 1.9 °C/W
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LMZ22003
Symbol Parameter Conditions Min
(Note 3)
Typ
(Note 4)
Max
(Note 3)Units
PERFORMANCE PARAMETERS(Note 7)
ΔVOOutput voltage ripple Cout = 220uF w/ 7 milliohm ESR +
100uF X7R + 2 x 0.047uF BW@ 20 MHz
9 mV PP
ΔVO/ΔVIN Line regulation VIN = 12V to 20V, IO= .001A ±0.02 %
ΔVO/ΔIOUT Load regulation VIN = 12V, IO= 0.001A to 3A 1 mV/A
ηPeak efficiency VIN = 12V VO = 3.3V IO = 1A 86 %
ηFull load efficiency VIN = 12V VO = 3.3V IO = 3A 85 %
Note 1: Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of the
device is intended to be functional. For guaranteed specifications and test conditions, see the Electrical Characteristics.
Note 2: The human body model is a 100pF capacitor discharged through a 1.5 kΩ resistor into each pin. Test method is per JESD-22-114.
Note 3: Min and Max limits are 100% production tested at 25°C. Limits over the operating temperature range are guaranteed through correlation using Statistical
Quality Control (SQC) methods. Limits are used to calculate National’s Average Outgoing Quality Level (AOQL).
Note 4: Typical numbers are at 25°C and represent the most likely parametric norm.
Note 5: EN 55022:2006, +A1:2007, FCC Part 15 Subpart B: 2007. See AN-2125 and layout for information on device under test. Vin = 12V, Vo = 3.3V, Io = 3A
Note 6: Theta JA measured on a 3.5” x 3.5” four layer board, with three ounce copper on outer layers and two ounce copper on inner layers, sixty 10 mil thermal
vias, no air flow, and 1W power dissipation. Refer to application note layout diagrams.
Note 7: Refer to BOM in Table 1.
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LMZ22003
Typical Performance Characteristics
Unless otherwise specified, the following conditions apply: VIN = 12V; Cin = 2 x 10μF + 1μF X7R Ceramic; CO = 220μF Specialty
Polymer + 10 uF Ceramic; TAmbient = 25° C for waveforms. Efficiency and dissipation plots marked with * have cycle skipping at
light loads resulting is slightly higher Output ripple – See applications section.
Efficiency 6.0V Output @ 25°C Ambient
0123
40
50
60
70
80
90
100
EFFICIENCY (%)
OUTPUT CURRENT (A)
10 Vin
12 Vin
20 Vin
30116887
Dissipation 6.0V Output @ 25°C Ambient
0123
0
1
2
3
DISSIPATION (W)
OUTPUT CURRENT (A)
20 Vin
12 Vin
10 Vin
30116888
Efficiency 5.0V Output @ 25°C Ambient
0123
40
50
60
70
80
90
100
EFFICIENCY (%)
OUTPUT CURRENT (A)
9 VIn
12 Vin
20 Vin
30116852
Dissipation 5.0V Output @ 25°C Ambient
0123
0
1
2
3
DISSIPATION (W)
OUTPUT CURRENT (A)
20 Vin
12 Vin
9 Vin
30116853
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LMZ22003
Efficiency 3.3V Output @ 25°C Ambient
0123
40
50
60
70
80
90
100
EFFICIENCY (%)
OUTPUT CURRENT (A)
6 Vin
9 Vin
12 Vin
20 Vin
30116854
Dissipation 3.3V Output @ 25°C Ambient
0123
0
1
2
3
DISSIPATION (W)
OUTPUT CURRENT (A)
20 Vin
12 Vin
9 Vin
6 Vin
30116855
Efficiency 2.5V Output @ 25°C Ambient
0123
30
40
50
60
70
80
90
EFFICIENCY (%)
OUTPUT CURRENT (A)
6 Vin
9 Vin
12 Vin
20 Vin
30116856
Dissipation 2.5V Output @ 25°C Ambient
0123
0
1
2
3
DISSIPATION (W)
OUTPUT CURRENT (A)
20 Vin
12 Vin
9 Vin
6 Vin
30116857
Efficiency 1.8V Output @ 25°C Ambient
0123
30
40
50
60
70
80
90
EFFICIENCY (%)
OUTPUT CURRENT (A)
6 Vin
9 Vin
12 Vin
20 Vin
30116858
Dissipation 1.8V Output @ 25°C Ambient
0123
0
1
2
3
DISSIPATION (W)
OUTPUT CURRENT (A)
20 Vin
12 Vin
9 Vin
6 Vin
30116859
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LMZ22003
Efficiency 1.5V Output @ 25°C Ambient
0123
25
35
45
55
65
75
85
EFFICIENCY (%)
OUTPUT CURRENT (A)
6 Vin
9 Vin
12 Vin
20 Vin
30116860
Dissipation 1.5V Output @ 25°C Ambient
0123
0
1
2
3
DISSIPATION (W)
OUTPUT CURRENT (A)
20 Vin
12 Vin
9 Vin
6 Vin
30116861
Efficiency 1.2V Output @ 25°C Ambient
0123
20
30
40
50
60
70
80
EFFICIENCY (%)
OUTPUT CURRENT (A)
6 Vin
9 Vin
12 Vin
20 Vin
30116862
Dissipation 1.2V Output @ 25°C Ambient
0123
0
1
2
3
DISSIPATION (W)
OUTPUT CURRENT (A)
20 Vin
12 Vin
9 Vin
6 Vin
30116863
Efficiency 1.0V Output @ 25°C Ambient
0123
20
30
40
50
60
70
80
EFFICIENCY (%)
OUTPUT CURRENT (A)
6 Vin
9 Vin
12 Vin
20 Vin
30116864
Dissipation 1.0V Output @ 25°C Ambient
0123
0
1
2
3
DISSIPATION (W)
OUTPUT CURRENT (A)
20 Vin
12 Vin
9 VIn
6 Vin
30116865
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LMZ22003
Efficiency 0.8V Output @ 25°C Ambient
0123
10
20
30
40
50
60
70
EFFICIENCY (%)
OUTPUT CURRENT (A)
6 Vin
9 Vin
12 Vin
20 Vin*
30116890
Dissipation 0.8V Output @ 25°C Ambient
0123
0
1
2
3
DISSIPATION (W)
OUTPUT CURRENT (A)
20 Vin*
12 Vin
9 Vin
6 Vin
30116891
Efficiency 6.0V Output @ 85°C Ambient
0123
40
50
60
70
80
90
100
EFFICIENCY (%)
OUTPUT CURRENT (A)
10 Vin
12 Vin
20 Vin
30116826
Dissipation 6.0V Output @ 85°C Ambient
0123
0
1
2
3
DISSIPATION (W)
OUTPUT CURRENT (A)
20 Vin
12 Vin
10 Vin
30116827
Efficiency 5.0V Output @ 85°C Ambient
0123
40
50
60
70
80
90
100
EFFICIENCY (%)
OUTPUT CURRENT (A)
9 Vin
12 Vin
20 Vin
30116828
Dissipation 5.0V Output @ 85°C Ambient
0123
0
1
2
3
DISSIPATION (W)
OUTPUT CURRENT (A)
20 Vin
12 Vin
9 Vin
30116829
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LMZ22003
Efficiency 3.3V Output @ 85°C Ambient
0123
30
40
50
60
70
80
90
EFFICIENCY (%)
OUTPUT CURRENT (A)
6 Vin
9 Vin
12 Vin
20 Vin
30116830
Dissipation 3.3V Output @ 85°C Ambient
0123
0
1
2
3
DISSIPATION (W)
OUTPUT CURRENT (A)
20 Vin
12 Vin
9 Vin
6 Vin
30116831
Efficiency 2.5V Output @ 85°C Ambient
0123
30
40
50
60
70
80
90
EFFICIENCY (%)
OUTPUT CURRENT (A)
6 Vin
9 Vin
12 Vin
20 Vin
30116832
Dissipation 2.5V Output @ 85°C Ambient
0123
0
1
2
3
DISSIPATION (W)
OUTPUT CURRENT (A)
20 Vin
12 Vin
9 Vin
6 Vin
30116833
Efficiency 1.8V Output @ 85°C Ambient
0123
30
40
50
60
70
80
90
EFFICIENCY (%)
OUTPUT CURRENT (A)
6 Vin
9 Vin
12 Vin
20 Vin
30116834
Dissipation 1.8V Output @ 85°C Ambient
0123
0
1
2
3
DISSIPATION (W)
OUTPUT CURRENT (A)
20 Vin
12 Vin
9 Vin
6 Vin
30116835
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LMZ22003
Efficiency 1.5V Output @ 85°C Ambient
0123
20
30
40
50
60
70
80
EFFICIENCY (%)
OUTPUT CURRENT (A)
6 Vin
9 Vin
12 Vin
20 Vin
30116836
Dissipation 1.5V Output @ 85°C Ambient
0123
0
1
2
3
DISSIPATION (W)
OUTPUT CURRENT (A)
20 Vin
12 Vin
9 Vin
6 Vin
30116837
Efficiency 1.2V Output @ 85°C Ambient
0123
20
30
40
50
60
70
80
EFFICIENCY (%)
OUTPUT CURRENT (A)
6 Vin
9 Vin
12 Vin
20 Vin
30116838
Dissipation 1.2V Output @ 85°C Ambient
0123
0
1
2
3
DISSIPATION (W)
OUTPUT CURRENT (A)
20 Vin
12 Vin
9 Vin
6 Vin
30116839
Efficiency 1.0V Output @ 85°C Ambient
0123
15
25
35
45
55
65
75
EFFICIENCY (%)
OUTPUT CURRENT (A)
6 Vin
9 Vin
12 Vin
20 Vin
30116840
Dissipation 1.0V Output @ 85°C Ambient
0123
0
1
2
3
DISSIPATION (W)
OUTPUT CURRENT (A)
20 Vin
12 Vin
9 Vin
6 Vin
30116841
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LMZ22003
Efficiency 0.8V Output @ 85°C Ambient
0123
20
30
40
50
60
70
EFFICIENCY (%)
OUTPUT CURRENT (A)
6 Vin
9 Vin
12 Vin
20 Vin*
30116892
Dissipation 0.8V Output @ 85°C Ambient
0123
0
1
2
3
DISSIPATION (W)
OUTPUT CURRENT (A)
20 Vin*
12 Vin
9 Vin
6 Vin
30116893
Thermal Derating VIN = 12V, VOUT = 5.0V
30 40 50 60 70 80 90 100 110 120 130
0
1
2
3
4
MAXIMUM OUTPUT CURRENT (A)
AMBIENT TEMPERATURE (°C)
θJA=12°C/W
30116889
Thermal Derating VIN= 12V, VOUT = 3.3V
30 40 50 60 70 80 90 100 110 120 130
0
1
2
3
4
MAXIMUM OUTPUT CURRENT (A)
TEMPERATURE (°C)
θJA = 12 °C/W
30116894
Normalized Line and Load Regulation VOUT = 3.3V
0123
0.998
0.999
1.000
1.001
1.002
NORMALLIZED OUTPUT VOLTAGE (V/V)
OUTPUT CURRENT (A)
9 Vin
12 Vin
20 Vin
30116842
Output Ripple
12VIN 3.3VO @ 3A, BW = 20 MHz
30116805
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LMZ22003
Output Ripple
12VIN 3.3VO@ 3A BW = 250 MHz
30116806
Transient Response
12VIN 3.3VO0.5 to 3A Step
30116808
Short Circuit Current vs Input Voltage
0 4 8 12 16 20
0
1
2
3
4
5
6
7
8
9
CURRENT (A)
INPUT VOLTAGE (V)
Output Current
Input Current
30116818
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LMZ22003
Block Diagram
30116810
General Description
The LMZ22003 SIMPLE SWITCHER© power module is an
easy-to-use step-down DC-DC solution capable of driving up
to 3A load. The LMZ22003 is available in an innovative pack-
age that enhances thermal performance and allows for hand
or machine soldering.
The LMZ22003 can accept an input voltage rail between 6V
and 20V and deliver an adjustable and highly accurate output
voltage as low as 0.8V. The LMZ22003 only requires two ex-
ternal resistors and three external capacitors to complete the
power solution. The LMZ22003 is a reliable and robust design
with the following protection features: thermal shutdown, pro-
grammable input under-voltage lockout, output over-voltage
protection, short-circuit protection, output current limit, and
allows startup into a pre-biased output. The sync input allows
synchronization over the 650 to 950 kHz switching frequency
range.
Design Steps for the LMZ22003
Application
The LMZ22003 is fully supported by Webench® which offers:
component selection, electrical and thermal simulations. Ad-
ditionally there are both evaluation and demonstration boards
that may be used as a starting point for design. The following
list of steps can be used to manually design the LMZ22003
application.
All references to values refer to the typical applications
schematic figure 4.
• Select minimum operating VIN with enable divider resistors
• Program VO with resistor divider selection
• Select CO
• Select CIN
• Determine module power dissipation
• Layout PCB for required thermal performance
ENABLE DIVIDER, RENT, RENB AND RENHSELECTION
Internal to the module is a 2 mega ohm pull-up resistor con-
nected from VIN to Enable. For applications not requiring
precision under voltage lock out (UVLO), the Enable input
may be left open circuit and the internal resistor will always
enable the module. In such case, the internal UVLO occurs
typically at 4.3V (VINrising).
In applications with separate supervisory circuits Enable can
be directly interfaced to a logic source. In the case of se-
quencing supplies, the divider is connected to a rail that
becomes active earlier in the power-up cycle than the
LMZ22003 output rail.
Enable provides a precise 1.279V threshold to allow direct
logic drive or connection to a voltage divider from a higher
enable voltage such as VIN. Additionally there is 21 μA(typ) of
switched offset current allowing programmable hysteresis.
See Figure 1.
The function of the enable divider is to allow the designer to
choose an input voltage below which the circuit will be dis-
abled. This implements the feature of programmable UVLO.
The two resistors should be chosen based on the following
ratio:
RENT / RENB = (VIN UVLO / 1.279V) – 1 (1)
The LMZ22003 typical application shows 12.7kΩ for RENB and
42.2kΩ for RENT resulting in a rising UVLO of 5.46V. Note that
this divider presents 8.33V to the input when the divider is
raised to 20V which would exceed the recommended 5.5V
limit for Enable. A midpoint 5.1V Zener clamp is applied to
allow the application to cover the full 6V to 20V range of op-
eration. The zener clamp is not required if the target applica-
tion prohibits the maximum Enable input voltage from being
exceeded.
Additional enable voltage hysteresis can be added with the
inclusion of RENH. It is possible to select values for RENT and
RENB such that RENH is a value of zero allowing it to be omitted
from the design.
Rising threshold can be calculated as follows:
VEN(rising) = 1.279 ( 1 + (RENT|| 2 meg)/ RENB)
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LMZ22003
Whereas the falling threshold level can be calculated using:
VEN(falling) = VEN(rising) – 21 µA ( RENT|| 2 meg || RENTB +
RENH )
Enable Input Detail
30116809
FIGURE 1.
OUTPUT VOLTAGE SELECTION
Output voltage is determined by a divider of two resistors
connected between VO and ground. The midpoint of the di-
vider is connected to the FB input.
The regulated output voltage determined by the external di-
vider resistors RFBT and RFBB is:
VO = 0.796V * (1 + RFBT / RFBB) (2)
Rearranging terms; the ratio of the feedback resistors for a
desired output voltage is:
RFBT / RFBB = (VO / 0.796V) - 1 (3)
These resistors should generally be chosen from values in the
range of 1.0 kΩ to 10.0 kΩ.
For VO = 0.8V the FB pin can be connected to the output di-
rectly and RFBB can be set to 8.06kΩ to provide minimum
output load.
A table of values for RFBT , and RFBB, is included in the sim-
plified applications schematic on page 2.
SOFT-START CAPACITOR SELECTION
Programmable soft-start permits the regulator to slowly ramp
to its steady state operating point after being enabled, thereby
reducing current inrush from the input supply and slowing the
output voltage rise-time.
Upon turn-on, after all UVLO conditions have been passed,
an internal 1.6mSec circuit slowly ramps the SS/TRK input to
implement internal soft start. If 2 mSec is an adequate turn–
on time then the Css capacitor can be left unpopulated.
Longer soft-start periods are achieved by adding an external
capacitor to this input.
Soft start duration is given by the formula:
tSS = VREF * CSS / Iss = 0.796V * CSS / 50uA (4)
This equation can be rearranged as follows:
CSS = tSS * 50μA / 0.796V (5)
Using a 0.22μF capacitor results in 3.5 msec typical soft-start
duration; and 0.47μF results in 7.5 msec typical. 0.47 μF is a
recommended initial value.
As the soft-start input exceeds 0.796V the output of the power
stage will be in regulation and the 50 μA current is deactivat-
ed. Note that the following conditions will reset the soft-start
capacitor by discharging the SS input to ground with an in-
ternal current sink.
• The Enable input being pulled low
• Thermal shutdown condition
• Internal Vcc UVLO (Approx 4.3V input to VIN)
TRACKING SUPPLY DIVIDER OPTION
The tracking function allows the module to be connected as
a slave supply to a primary voltage rail (often the 3.3V system
rail) where the slave module output voltage is lower than that
of the master. Proper configuration allows the slave rail to
power up coincident with the master rail such that the voltage
difference between the rails during ramp-up is small (i.e.
<0.15V typ). The values for the tracking resistive divider
should be selected such that the effect of the internal 50uA
current source is minimized. In most cases the ratio of the
tracking divider resistors is the same as the ratio of the output
voltage setting divider. Proper operation in tracking mode dic-
tates the soft-start time of the slave rail be shorter than the
master rail; a condition that is easy satisfy since the CSS cap
is replaced by RTKB. The tracking function is only supported
for the power up interval of the master supply; once the SS/
TRK rises past 0.8V the input is no longer enabled and the 50
uA internal current source is switched off.
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LMZ22003
Tracking Option Input Detail
30116815
FIGURE 2.
CO SELECTION
None of the required CO output capacitance is contained with-
in the module. A minimum value of 200 μF is required based
on the values of internal compensation in the error amplifier.
Low ESR tantalum, organic semiconductor or specialty poly-
mer capacitor types are recommended for obtaining lowest
ripple. The output capacitor CO may consist of several ca-
pacitors in parallel placed in close proximity to the module.
The output capacitor assembly must also meet the worst case
minimum ripple current rating of 0.5 * ILR P-P, as calculated in
equation (14) below. Beyond that, additional capacitance will
reduce output ripple so long as the ESR is low enough to per-
mit it. Loop response verification is also valuable to confirm
closed loop behavior.
For applications with dynamic load steps; the following equa-
tion provides a good first pass approximation of CO for load
transient requirements. Where VO-Tran is 100 mV on a 3.3V
output design.
CO≥IO-Tran/((*VO-Tran– ESR * IO–Tran) * ( F*SW/ VO))(6)
Solving:
CO≥ 2.5A / ((0.1V – .007*2.5A) * ( 800000 Hz/ 3.3V) ≥
125μF (7)
Note that the stability requirement for 200 µF minimum output
capacitance will take precedence.
One recommended output capacitor combination is a 220uF,
7 milliohm ESR specialty polymer cap in parallel with a 100
uF 6.3V X5R ceramic. This combination provides excellent
performance that may exceed the requirements of certain ap-
plications. Additionally some small ceramic capacitors can be
used for high frequency EMI suppression.
CIN SELECTION
The LMZ22003 module contains a small amount of internal
ceramic input capacitance. Additional input capacitance is re-
quired external to the module to handle the input ripple current
of the application. The input capacitor can be several capac-
itors in parallel. This input capacitance should be located in
very close proximity to the module. Input capacitor selection
is generally directed to satisfy the input ripple current require-
ments rather than by capacitance value. Input ripple current
rating is dictated by the equation:
I(CIN(RMS)) ≊ 1 /2 * IO * SQRT (D / 1-D) (8)
where D ≊ VO / VIN
(As a point of reference, the worst case ripple current will oc-
cur when the module is presented with full load current and
when VIN = 2 * VO).
Recommended minimum input capacitance is 22uF X7R (or
X5R) ceramic with a voltage rating at least 25% higher than
the maximum applied input voltage for the application. It is
also recommended that attention be paid to the voltage and
temperature derating of the capacitor selected. It should be
noted that ripple current rating of ceramic capacitors may be
missing from the capacitor data sheet and you may have to
contact the capacitor manufacturer for this parameter.
If the system design requires a certain minimum value of
peak-to-peak input ripple voltage (ΔVIN) be maintained then
the following equation may be used.
CIN ≥ IO * D * (1–D) / fSW-CCM * ΔVIN(9)
If ΔVIN is 1% of VIN for a 12V input to 3.3V output application
this equals 120 mV and fSW = 812 kHz.
CIN≥ 3A * 3.3V/12V * (1– 3.3V/12V) / (812000 * 0.120 V)
≥ 6.14μF
Additional bulk capacitance with higher ESR may be required
to damp any resonant effects of the input capacitance and
parasitic inductance of the incoming supply lines. The
LMZ22003 typical applications schematic and evaluation
board include a 150 μF 50V aluminum capacitor for this func-
tion. There are many situations where this capacitor is not
necessary.
POWER DISSIPATION AND BOARD THERMAL
REQUIREMENTS
When calculating module dissipation use the maximum input
voltage and the average output current for the application.
Many common operating conditions are provided in the char-
acteristic curves such that less common applications can be
derived through interpolation. In all designs, the junction tem-
perature must be kept below the rated maximum of 125°C.
For the design case of VIN = 12V, VO = 3.3V, IO = 3A, and
TAMB(MAX) = 85°C, the module must see a thermal resistance
from case to ambient of less than:
θCA< (TJ-MAX – TA-MAX) / PIC-LOSS - θJC (10)
Given the typical thermal resistance from junction to case to
be 1.9 °C/W. Use the 85°C power dissipation curves in the
Typical Performance Characteristics section to estimate the
PIC-LOSS for the application being designed. In this application
it is 2W.
θCA = (125 – 85) / 2W – 1.9 = 18.1(11)
To reach θCA = 18.1, the PCB is required to dissipate heat
effectively. With no airflow and no external heat-sink, a good
estimate of the required board area covered by 2 oz. copper
on both the top and bottom metal layers is:
Board_Area_cm2 = 500°C x cm2/W / θCA (12)
As a result, approximately 28 square cm of 2 oz copper on
top and bottom layers is required for the PCB design. The
PCB copper heat sink must be connected to the exposed pad.
Approximately sixty, 10mil (254 μm) thermal vias spaced 39
mils (1.0 mm) apart connect the top copper to the bottom
copper. For an example of a high thermal performance PCB
layout for SIMPLE SWITCHER© power modules, refer to
AN-2085, AN-2125, AN-2020 and AN-2026.
PC BOARD LAYOUT GUIDELINES
PC board layout is an important part of DC-DC converter de-
sign. Poor board layout can disrupt the performance of a DC-
www.national.com 16
LMZ22003
DC converter and surrounding circuitry by contributing to EMI,
ground bounce and resistive voltage drop in the traces. These
can send erroneous signals to the DC-DC converter resulting
in poor regulation or instability. Good layout can be imple-
mented by following a few simple design rules. A good ex-
ample layout is shown in Figure 5.
30116811
FIGURE 3.
1. Minimize area of switched current loops.
From an EMI reduction standpoint, it is imperative to minimize
the high di/dt paths during PC board layout as shown in the
figure above. The high current loops that do not overlap have
high di/dt content that will cause observable high frequency
noise on the output pin if the input capacitor (Cin1) is placed
at a distance away from the LMZ22003. Therefore place
CIN1 as close as possible to the LMZ22003 VIN and PGND
exposed pad. This will minimize the high di/dt area and reduce
radiated EMI. Additionally, grounding for both the input and
output capacitor should consist of a localized top side plane
that connects to the PGND exposed pad (EP).
2. Have a single point ground.
The ground connections for the feedback, soft-start, and en-
able components should be routed to the AGND pin of the
device. This prevents any switched or load currents from
flowing in the analog ground traces. If not properly handled,
poor grounding can result in degraded load regulation or er-
ratic output voltage ripple behavior. Additionally provide the
single point ground connection from pin 4 (AGND) to EP/
PGND.
3. Minimize trace length to the FB pin.
Both feedback resistors, RFBT and RFBB should be located
close to the FB pin. Since the FB node is high impedance,
maintain the copper area as small as possible. The traces
from RFBT, RFBB should be routed away from the body of the
LMZ22003 to minimize possible noise pickup.
4. Make input and output bus connections as wide as
possible.
This reduces any voltage drops on the input or output of the
converter and maximizes efficiency. To optimize voltage ac-
curacy at the load, ensure that a separate feedback voltage
sense trace is made to the load. Doing so will correct for volt-
age drops and provide optimum output accuracy.
5. Provide adequate device heat-sinking.
Use an array of heat-sinking vias to connect the exposed pad
to the ground plane on the bottom PCB layer. If the PCB has
a plurality of copper layers, these thermal vias can also be
employed to make connection to inner layer heat-spreading
ground planes. For best results use a 6 x 10 via array with
minimum via diameter of 10mils (254 μm) thermal vias spaced
39mils (1.0 mm). Ensure enough copper area is used for heat-
sinking to keep the junction temperature below 125°C.
Additional Features
SYNCHRONIZATION INPUT
The PWM switching frequency can be synchronized to an ex-
ternal frequency source. If this feature is not used, connect
this input either directly to ground, or connect to ground
through a resistor of 1.5 kΩ ohm or less. The allowed syn-
chronization frequency range is 650kHz to 950 kHz. The
typical input threshold is 1.4V transition level. Ideally the input
clock should overdrive the threshold by a factor of 2, so direct
drive from 3.3V logic via a 1.5kΩ Thevenin source resistance
is recommended. Note that applying a sustained “logic 1” cor-
responds to zero Hz PWM frequency and will cause the
module to stop switching.
OUTPUT OVER-VOLTAGE PROTECTION
If the voltage at FB is greater than a 0.86V internal reference,
the output of the error amplifier is pulled toward ground, caus-
ing VO to fall.
CURRENT LIMIT
The LMZ22003 is protected by both low side (LS) and high
side (HS) current limit circuitry. The LS current limit detection
is carried out during the off-time by monitoring the current
through the LS synchronous MOSFET. Referring to the Func-
tional Block Diagram, when the top MOSFET is turned off, the
inductor current flows through the load, the PGND pin and the
internal synchronous MOSFET. If this current exceeds the
low side current limit value, the current limit comparator dis-
ables the start of the next switching period. Switching cycles
are prohibited until current drops below the limit. It should also
be noted that d.c. current limit is dependent on both duty cycle
as illustrated in the graph in the typical performance section.
The HS current limit monitors the current of top side MOSFET.
Once HS current limit is detected, the HS MOSFET is shutoff
immediately, until the next cycle. Exceeding HS current limit
causes VO to fall. Typical behavior of exceeding LS current
limit is that fSW drops to 1/2 of the operating frequency.
THERMAL PROTECTION
The junction temperature of the LMZ22003 should not be al-
lowed to exceed its maximum ratings. Thermal protection is
implemented by an internal Thermal Shutdown circuit which
activates at 165 °C (typ) causing the device to enter a low
power standby state. In this state the main MOSFET remains
off causing VO to fall, and additionally the CSS capacitor is
discharged to ground. Thermal protection helps prevent
catastrophic failures for accidental device overheating. When
the junction temperature falls back below 150 °C (typ Hyst =
15°C) the SS pin is released, VO rises smoothly, and normal
operation resumes.
Applications requiring maximum output current especially
those at high input voltage may require additional derating at
elevated temperatures.
PRE-BIASED STARTUP
The LMZ22003 will properly start up into a pre-biased output.
This startup situation is common in multiple rail logic applica-
tions where current paths may exist between different power
rails during the startup sequence. The following scope cap-
ture shows proper behavior in this mode. Trace one is Enable
going high. Trace two is 1.5V pre-bias rising to 3.3V. Rise-
time determined by CSS, trace three.
17 www.national.com
LMZ22003
Pre-Biased Startup
30116825
DISCONTINUOUS CONDUCTION AND CONTINUOUS
CONDUCTION MODES
At light load the regulator will operate in discontinuous con-
duction mode (DCM). With load currents above the critical
conduction point, it will operate in continuous conduction
mode (CCM). In CCM, current flows through the inductor
through the entire switching cycle and never falls to zero dur-
ing the off-time. When operating in DCM, inductor current is
maintained to an average value equaling Iout. Inductor cur-
rent exhibits normal behavior for the emulated current mode
control method used. Output voltage ripple typically increases
during this mode of operation.
Following is a comparison pair of waveforms of the showing
both CCM (upper) and DCM operating modes.
CCM and DCM Operating Modes
VIN = 12V, VO = 3.3V, IO = 3A/0.3A 2 μsec/div
30116812
The approximate formula for determining the DCM/CCM
boundary is as follows:
IDCB≊VO*(VIN–VO)/(2*3.3 μH*fSW(CCM)*VIN) (13)
The inductor internal to the module is 3.3 μH. This value was
chosen as a good balance between low and high input voltage
applications. The main parameter affected by the inductor is
the amplitude of the inductor ripple current (ILR). ILR can be
calculated with:
ILR P-P=VO*(VIN- VO)/(3.3µH*fSW*VIN) (14)
Where VIN is the maximum input voltage and fSW is typically
812 kHz.
If the output current IO is determined by assuming that IO =
IL, the higher and lower peak of ILR can be determined.
www.national.com 18
LMZ22003
Typical Application Schematic Diagram
30116807
FIGURE 4.
TABLE 1. Typical Application Bill of Materials
Ref Des Description Case Size Manufacturer Manufacturer P/N
U1 SIMPLE SWITCHER ® TO-PMOD-7 National Semiconductor LMZ22003TZ
Cin1,5 0.047 µF, 50V, X7R 1206 Yageo America CC1206KRX7R9BB473
Cin2,3 10 µF, 50V, X7R 1210 Taiyo Yuden UMK325BJ106MM-T
Cin6 (OPT) CAP, AL, 150µF, 50V Radial G Panasonic EEE-FK1H151P
CO1,6 0.047 µF, 50V, X7R 1206 Yageo America CC1206KRX7R9BB473
CO2 (OPT) 100 µF, 6.3V, X7R 1210 TDK C3225X5R0J107M
CO5220 μF, 6.3V, SP-Cap (7343) Panasonic EEF-UE0J221LR
RFBT 3.32 kΩ0805 Panasonic ERJ-6ENF3321V
RFBB 1.07 kΩ0805 Panasonic ERJ-6ENF1071V
RSN(OPT) 1.50 kΩ0805 Vishay Dale CRCW08051K50FKEA
RENT 42.2 kΩ0805 Panasonic ERJ-6ENF4222V
RENB 12.7 kΩ0805 Panasonic ERJ-6ENF1272V
RFRA(OPT) 23.7Ω 0805 Vishay Dale CRCW080523R7FKEA
RENH 100 Ω 0805 Vishay Dale CRCW0805100RFKEA
CSS 0.47 μF, ±10%, X7R, 16V 0805 AVX 0805YC474KAT2A
D1(OPT) 5.1V, 0.5W SOD-123 Diodes Inc. MMSZ5231BS-7-F
Table 1
19 www.national.com
LMZ22003
30116816
FIGURE 5. Top View Evaluation Board – See AN–2085
30116817
FIGURE 6. Top View Demonstration Board – See AN–2125
www.national.com 20
LMZ22003
Physical Dimensions inches (millimeters) unless otherwise noted
7-Lead TZA Package
NS Package Number TZA07A
21 www.national.com
LMZ22003
Notes
LMZ22003 3A SIMPLE SWITCHER® Power Module with 20V Maximum Input Voltage
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