W588AXXX Data Sheet
8-BIT MCU WITH VOICE SYNTHESIZER
(PowerSpeechTM Series)
Publication Release Date: April 18, 2005
- 1 - Revision A6
Table of Contents-
1. GENERAL DESCRIPTION ......................................................................................................... 2
2. FEATURES ................................................................................................................................. 2
3. PIN DESCRIPTION..................................................................................................................... 3
4. BLOCK DIAGRAM ...................................................................................................................... 4
5. ELECTRICAL CHARACTERISTICS........................................................................................... 4
5.1 Absolute Maximum Ratings .......................................................................................... 4
5.2 D.C. Characteristics ...................................................................................................... 5
5.3 A.C. Characteristics....................................................................................................... 6
6. APPLICATION CIRCUITS .......................................................................................................... 7
6.1 PWM Output.................................................................................................................. 7
6.2 DAC Output ................................................................................................................... 7
7. REVISION HISTORY .................................................................................................................. 8
W588AXXX
- 2 -
1. GENERAL DESCRIPTION
The W588Axxx is a 8-bit microcontroller-based speech synthesizer with PWM mode output to drive
speaker directly. It is suitable for multi-tasking toy application.
The W588Axxx family contains several items with different playback duration as shown below:
Item W588A003 W588A006 W588A009 W588A012 W588A015
*Duration 4 sec. 7 sec. 12 sec. 16 sec. 19 sec.
Item W588A020 W588A025 W588S030 W588A040 W588A050
Duration 25 sec. 29 sec. 32 sec. 50 sec. 58 sec.
Item W588A060 W588A080 W588A100 W588A120
Duration 66 sec. 100 sec. 118 sec. 133 sec.
Note: *: The duration time is based on 5-bit MDPCM at 6KHz sampling rate. The firmware library and program code have been
excluded from user’s ROM space for the duration estimation.
2. FEATURES
Wide Operating voltage: 2.4 ~ 5.5 volt
System clock
4 MHz at 2.4 ~ 5.5 volt
8 MHz at 3.6 ~ 5.5 volt
F/W speech synthesis
5-bit MDPCM, 4-bit ADPCM, or 8-bit PCM algorithm can be used
Programmable sample rate
Provides DAC and/or PWM output to drive speaker (W588A003/006 only PWM)
Built-in 1~2 timer (Timer0/1) for speech synthesis, tone melody and IR application
Provide power management to save current consumption:
4 ~ 8 MHz system clock, with Ring type oscillator
Stop mode for stopping all IC operations
Provides 4 I/O and 4 Out in W588A003~A006 and 8I/O in W588A009~A120
Provides IR carrier generation
Provides watch dog timer (WDT)
Provides low-voltage-reset (LVR)
Shared ROM for voice and program storage
Support PowerScriptTM for developing codes in easy way
Full-fledged development system
Source-level ICE debugger (Assembly and PowerScriptTM format)
Event synchronization mechanism
Compatible with W566B/C, W567S, W588S system
User-friendly GUI environment
W588AXXX
Publication Release Date: April 18, 2005
- 3 - Revision A6
3. PIN DESCRIPTION
NAME I/O DESCRIPTION
VSS,
VSS1_SPK,
VSS2_SPK
- Negative power supply for Up, peripherals and PWM.
PWM+/DAC O PWM driver positive output / DAC output.
PWM- O PWM driver negative output
VDD,
VDD1_SPK - Positive power supply for uP and peripherals.
/RESET I Active low reset pin, to reset whole device.
TEST I Test pin, internally pulled low.
*OP0[3:0] O Output port. The pins of OP0 are Inverter-type output.
BP0[7:4]
**BP0[0:3] I/O
I/O multiplexed port.
As output port, the pins can be set as open–drain type or CMOS type.
As input port, the pins can be set with pull-high resistor or not.
Interrupt will be generated to release IC from STOP mode upon
triggering.
When BP0[7] is used as output pin, it can be the IR transmission
carrier output for IR applications.
OSC I Connect ROSC to VSS to generate the master clock
*: Only for W588A003~A006
**: Only for W588A009~A120
W588AXXX
- 4 -
4. BLOCK DIAGRAM
5. ELECTRICAL CHARACTERISTICS
5.1 Absolute Maximum Ratings
PARAMETER SYMBOL CONDITIONS RATED VALUE UNIT
Power Supply VDD VSS - -0.3 to +7.0 V
Input Voltage VIN All Inputs VSS -0.3 to VDD +0.3 V
Storage Temp. TSTG - -55 to +150 °C
Operating Temp. TOPR - 0 to +70
°C
Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability
of the device.
OP00~0
RESET
PWM
OSC
RAM
ROM
Divider
IO Port Interrupt
Logic Timer
65C02 Decoder
BP04~0
OSC
SPK
SPK
Voice
Channel
OP00~0
RESET
PWM
OSC
RAM
ROM
Divider
IO Port Interrupt
Logic Timer
Decoder
BP04~0
OSC
SPK
SPK
Voice
Channel
W588AXXX
Publication Release Date: April 18, 2005
- 5 - Revision A6
5.2 D.C. Characteristics
(VDD VSS = 4.5 V, Ta = 25° C, No Load unless otherwise specified)
PARAMETER SYM. CONDITIONS MIN. TYP. MAX. UNIT
FSYS = 4M Hz 2.4 -- 5.5
Operating Voltage VDD FSYS = 8M Hz 3.6 -- 5.5 V
Operating Current IOP1 No load, Fosc = 4 MHz - 3 5 mA
Standby Current (STOP) IDD1 No load - 1 2 µA
Input Low Voltage VIL All input pins VSS - 0.3VDD V
Input High Voltage VIH All input pins 0.7VDD - VDD V
Input Current (BP0) IIN VIN = 0V -15 - -45 µA
IOL V
DD = 3V, VOUT = 0.4V 8 - - mA
Output Current (BP0) IOH V
DD = 3V, VOUT = 2.6V -4 - - mA
IOL V
DD = 3V, VOUT = 0.4V 4 - - mA
Output Current (OP0) IOH V
DD = 3V, VOUT = 2.6V -4 - - mA
IOL1 +200 - - mA
Output Current
SPK+ / SPK- IOH1
RL = 8 Ohm,
Connection:
[SPK+]----[RL]----[SPK-] -200 - - mA
DAC full scale current
IDAC VDD=4.5V, RL = 100 -2.4
-4.0
-3.0
-5.0
-3.6
-6.0
mA
Operation Current of Low
Voltage Reset ILVR VDD = 4.5V 60 uA
All input pins except
RESETB
450 -- -- K
Pull-low Resistor RIN
RESERB 100 -- --
K
W588AXXX
- 6 -
5.3 A.C. Characteristics
(VDDVSS = 4.5 V, Ta= 25°C, No Load unless otherwise specified)
PARAMETER SYM. CONDITIONS MIN. TYP. MAX. UNIT
Main-clock Frequency FM ROSC = 300 Kohm
ROSC = 150 Kohm
3.6
7.2
4
8
4.4
8.8 MHz
Main-clock Wake-up Delay WDm Ring type, CPU clock = 4
MHz - 3 5 mS
Frequency Deviation by
Voltage Drop
Main Oscillator, Ring
F
F
MIN
MINMAX
F
F-F - 3 7.5 %
Cycle Time Tcyc CPU clock = 4 MHz 250 - DC nS
Reset Signal Width TRST FM is enabled 4 - - Clocks
of FM
W588AXXX
Publication Release Date: April 18, 2005
- 7 - Revision A6
6. APPLICATION CIRCUITS
6.1 PWM Output
W588Axxx
ROSC
OSC
VDD
VSS/
VSS1_SPK/
VSS2_SPK
/RESET
PWM+
BP04
|
BP07
OP00
|
OP03
Speaker
VDD1_SPK
0.1uF
PWM-
W588A PWM Type
0.1uF4.7uF
10
Reset
Switch
6.2 DAC Output
W588Axxx
ROSC
OSC
VDD
VSS/
VSS1_SPK/
VSS2_SPK
/RESET
SPK+
0.1uF4.7uF
BP00
|
BP07
Speaker
8050
VCC
Rs
VDD1_SPK
0.1uF
SPK-
W588A DAC Type
10
Reset
Switch
VCC
Notes:
1. The typical value of Rosc is 150 K for 8MHz and 300 K for 4MHz and should be connected to GND (VSS).
2. Please refer to design guide to get typical Rosc value for each part number.
3. In PCB layout, VSS1_SPK, VSS2_SPK should be connected to VSS; VDD1_SPK should be connected to VDD.
4. The Rs value is suggested in 270 ~ 1K to limit too large DAC output current flowing into transistor.
5. The capacitor, 0.1uF, shunts between VDD and GND is necessary to filter power noise.
6. The capacitor, 4.7uF, shunts between VDD and GND is optional as power stability.
7. The 10 that between VDD and GND is to limit huge current flow into chip as driving too heavy loading.
8. The above application circuits are for reference only. No warranty for mass production.
W588AXXX
- 8 -
7. REVISION HISTORY
VERSION DATE PAGE DESCRIPTION
A1 Oct. 23, 2002 - Preliminary release.
A2 April 8, 2004 -
Change the name Low-Voltage-Detect
(LVD) to Low-Voltage-Reset (LVR).
Add Pull High Resistance as 450K ohm in
D.C. Characteristics.
A3 May 11, 2004 - Change the pin description name
Change application circuit diagram
A4 May 31, 2004 - Add the operation current of Low-Voltage-
Reset
A5 June 29, 2004 -
Modify provides 4 I/O and 4 Out in
W588A003~A006 and 8I/O in
W588A009~A120
A6 APRIL 18, 2005 8 ADD IMPORTANT NOTICE
Important Notice
Winbond products are not designed, intended, authorized or warranted for use as components
in systems or equipment intended for surgical implantation, atomic energy control
instruments, airplane or spaceship instruments, transportation instruments, traffic signal
instruments, combustion control instruments, or for other applications intended to support or
sustain life. Further more, Winbond products are not intended for applications wherein failure
of Winbond products could result or lead to a situation wherein personal injury, death or
severe property or environmental damage could occur.
Winbond customers using or selling these products for use in such applications do so at their
own risk and agree to fully indemnify Winbond for any damages resulting from such improper
use or sales.
Headquarters
No. 4, Creation Rd. III,
Science-Based Industrial Park,
Hsinchu, Taiwan
TEL: 886-3-5770066
FAX: 886-3-5665577
http://www.winbond.com.tw/
Taipei Office
TEL: 886-2-8177-7168
FAX: 886-2-8751-3579
Winbond Electronics Corporation America
2727 North First Street, San Jose,
CA 95134, U.S.A.
TEL: 1-408-9436666
FAX: 1-408-5441798
Winbond Electronics (H.K.) Ltd.
No. 378 Kwun Tong Rd.,
Kowloon, Hong Kong
FAX: 852-27552064
Unit 9-15, 22F, Millennium City,
TEL: 852-27513100
Please note that all data and specifications are subject to change without notice.
All the trade marks of products and companies mentioned in this data sheet belong to their respective owners.
Winbond Electronics (Shanghai) Ltd.
200336 China
FAX: 86-21-62365998
27F, 2299 Yan An W. Rd. Shanghai,
TEL: 86-21-62365999
Winbond Electronics Corporation Japan
Shinyokohama Kohoku-ku,
Yokohama, 222-0033
FAX: 81-45-4781800
7F Daini-ueno BLDG, 3-7-18
TEL: 81-45-4781881
9F, No.480, Rueiguang Rd.,
Neihu District, Taipei, 114,
Taiwan, R.O.C.