54ABT240
Octal Buffer/Line Driver with TRI-STATE®Outputs
General Description
The ’ABT240 is an inverting octal buffer and line driver de-
signed to be employed as a memory address driver, clock
driver and bus oriented transmitter or receiver which pro-
vides improved PC board density.
Features
nOutput sink capability of 48 mA, source capability of
24 mA
nGuaranteed latchup protection
nHigh impedance glitch free bus loading during entire
power up and power down cycle
nNondestructive hot insertion capability
nStandard Microcircuit Drawing (SMD)5962-9318801
Ordering Code
Military Package
Number Package Description
54ABT240J-QML J20A 20-Lead Ceramic Dual-In-Line
54ABT240W-QML W20A 20-Lead Cerpack
54ABT240E-QML E20A 20-Lead Ceramic Leadless Chip Carrier, Type C
Connection Diagrams
Pin Names Description
OE
1
,OE
2
TRI-STATE Output
Enable Inputs
I
0
–I
7
Inputs
O
0
–O
7
Outputs
TRI-STATE®is a registered trademark of National Semiconductor Corporation.
Pin Assignment
for DIP and Flatpak
DS100202-1
Pin Assignment
for LCC
DS100202-2
July 1998
54ABT240 Octal Buffer/Line Driver with TRI-STATE Outputs
© 1998 National Semiconductor Corporation DS100202 www.national.com
Truth Tables
Inputs Outputs
(Pins 12, 14, 16, 18)
OE
1
I
n
LL H
LH L
HX Z
Inputs Outputs
(Pins 3, 5, 7, 9)
OE
2
I
n
LL H
LH L
HX Z
H
=
HIGH Voltage Level
L=LOW Voltage Level
X=Immaterial
Z=High Impedance
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Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Storage Temperature −65˚C to +150˚C
Ambient Temperature under Bias −55˚C to +125˚C
Junction Temperature under Bias
Ceramic −55˚C to +175˚C
V
CC
Pin Potential to
Ground Pin −0.5V to +7.0V
Input Voltage (Note 2) −0.5V to +7.0V
Input Current (Note 2) −30 mA to +5.0 mA
Voltage Applied to Any Output
in the Disabled or
Power-Off State −0.5V to 5.5V
in the HIGH State −0.5V to V
CC
Current Applied to Output
in LOW State (Max) twice the rated I
OL
(mA)
DC Latchup Source Current
(Across Comm Operating
Range) −150 mA
Over Voltage Latchup (I/O) 10V
Recommended Operating
Conditions
Free Air Ambient Temperature
Military −55˚C to +125˚C
Supply Voltage
Military +4.5V to +5.5V
Minimum Input Edge Rate (V/t)
Data Input 50 mV/ns
Enable Input 20 mV/ns
Note 1: Absolute maximum ratings are values beyond which the device may
be damaged or have its useful life impaired. Functional operation under these
conditions is not implied.
Note 2: Either voltage limit or current limit is sufficient to protect inputs.
DC Electrical Characteristics
Symbol Parameter ABT240 Units VCC Conditions
Min Typ Max
VIH Input HIGH Voltage 2.0 V Recognized HIGH Signal
VIL Input LOW Voltage 0.8 V Recognized LOW Signal
VCD Input Clamp Diode Voltage −1.2 V Min IIN =−18 mA
VOH Output HIGH Voltage 54ABT 2.5 V Min IOH =−3 mA
54ABT 2.0 V Min IOH =−24 mA
VOL Output LOW Voltage 54ABT 0.55 V Min IOL =48 mA
IIH Input HIGH Current 5 µA Max VIN =2.7V (Note 4)
5V
IN =VCC
IBVI Input HIGH Current Breakdown Test 7 µA Max VIN =7.0V
IIL Input LOW Current −5 µA Max VIN =0.5V (Note 4)
−5 VIN =0.0V
VID Input Leakage Test 4.75 V 0.0 IID =1.9 µA
All Other Pins Grounded
IOZH Output Leakage Current 50 µA 0 5.5V VOUT =2.7V; OEn=2.0V
IOZL Output Leakage Current −50 µA 0 5.5V VOUT =0.5V; OEn=2.0V
IOS Output Short-Circuit Current −100 −275 mA Max VOUT =0.0V
ICEX Output High Leakage Current 50 µA Max VOUT =VCC
IZZ Bus Drainage Test 100 µA 0.0 VOUT =5.5V; All Others GND
ICCH Power Supply Current 50 µA Max All Outputs HIGH
ICCL Power Supply Current 30 mA Max All Outputs LOW
ICCZ Power Supply Current 50 µA Max OEn=VCC;
All Others at VCC or Ground
ICCT Additional ICC/Input Outputs Enabled 1.5 mA Max VI=VCC 2.1V
Outputs TRI-STATE 1.5 mA Enable Input VI=VCC 2.1V
Outputs TRI-STATE 50 µA Data Input VI=VCC 2.1V
All Others at VCC or Ground
ICCD Dynamic ICC No Load mA/ Max Outputs Open
(Note 4) 0.1 MHz OEn=GND, (Note 3)
One Bit Toggling, 50%Duty Cycle
Note 3: For 8 bits toggling, ICCD <0.8 mA/MHz.
Note 4: Guaranteed, but not tested.
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AC Electrical Characteristics
Symbol Parameter 54ABT Units Fig.
No.
T
A
=−55˚C to +125˚C
V
CC
=4.5V–5.5V
C
L
=50 pF
Min Max
t
PLH
Propagation Delay 0.8 5.5 ns
Figure 5
t
PHL
Data to Outputs 1.0 5.5
t
PZH
Output Enable 0.8 7.5 ns
Figure 4
t
PZL
Time 0.8 7.7
t
PHZ
Output Disable 1.0 7.5 ns
Figure 4
t
PLZ
Time 1.0 7.2
Capacitance
Symbol Parameter Typ Units Conditions
T
A
=25˚C
C
IN
Input Capacitance 5.0 pF V
CC
=0V
C
OUT
(Note 5) Output Capacitance 9.0 pF V
CC
=5.0V
Note 5: COUT is measured at frequency f =1 MHz, per MIL-STD-883B, Method 3012.
AC Loading
DS100202-3
*Includes jig and probe capacitance
FIGURE 1. Standard AC Test Load
DS100202-4
FIGURE 2. Test Input Signal Levels
Amplitude Rep. Rate t
W
t
r
t
f
3.0V 1 MHz 500 ns 2.5 ns 2.5 ns
FIGURE 3. Test Input Signal Requirements
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AC Waveforms
DS100202-6
FIGURE 4. TRI-STATE Output HIGH
and LOW Enable and Disable Times
DS100202-7
FIGURE 5. Propagation Delay Waveforms for
Inverting and Non-Inverting Functions
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6
Physical Dimensions inches (millimeters) unless otherwise noted
20-Terminal Ceramic Chip Carrier (L)
NS Package Number E20A
20-Lead Ceramic Dual-In-Line Package (D)
NS Package Number J20A
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
LIFE SUPPORT POLICY
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DE-
VICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMI-
CONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or sys-
tems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, and whose fail-
ure to perform when properly used in accordance
with instructions for use provided in the labeling, can
be reasonably expected to result in a significant injury
to the user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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Tel: 81-3-5620-6175
Fax: 81-3-5620-6179
20-Lead Ceramic Flatpak (F)
NS Package Number W20A
54ABT240 Octal Buffer/Line Driver with TRI-STATE Outputs
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.