SN54F241, SN74F241
OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SDFS090 – MARCH 1987 – REVISED OCTOBER 1993
Copyright 1993, Texas Instruments Incorporated
2–1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
•3-State Outputs Drive Bus Lines or Buffer
Memory Address Registers
•Package Options Include Plastic
Small-Outline Packages, Ceramic Chip
Carriers, and Plastic and Ceramic DIPs
description
These octal buffers and line drivers are designed
specifically to improve both the performance and
density of 3-state memory address drivers, clock
drivers, and bus-oriented receivers and
transmitters. Taken together with the ′F240 and
′F244, these devices provide the choice of
selected combinations of inverting and
noninverting outputs, symmetrical OE (active-low
output-enable) inputs, and complementary OE
and OE inputs.
The SN54F241 is characterized for operation over
the full military temperature range of –55°C to
125°C. The SN74F241 is characterized for
operation from 0°C to 70°C.
FUNCTION TABLES
INPUTS OUTPUT
1OE 1A 1Y
H X Z
LHH
LLL
INPUTS OUTPUT
2OE 2A 2Y
H H H
HLL
LXZ
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
1OE
1A1
2Y4
1A2
2Y3
1A3
2Y2
1A4
2Y1
GND
VCC
2OE
1Y1
2A4
1Y2
2A3
1Y3
2A2
1Y4
2A1
SN54F241 ...J PACKAGE
SN74F241 . . . DW OR N PACKAGE
(TOP VIEW)
3 2 1 20 19
910111213
4
5
6
7
8
18
17
16
15
14
1Y1
2A4
1Y2
2A3
1Y3
1A2
2Y3
1A3
2Y2
1A4
SN54F241 . . . FK PACKAGE
(TOP VIEW)
2Y4
1A1
1OE
1Y4
2A2 2OE
2Y1
GND
2A1 VCC
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
SN54F241, SN74F241
OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SDFS090 – MARCH 1987 – REVISED OCTOBER 1993
2–2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic symbol†logic diagram (positive logic)
†This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
2
1A1 4
1A2 6
1A3 8
1A4
EN
1
1Y1
18
1Y2
16
1Y3
14
1Y4
12
11
2A1 13
2A2 15
2A3 17
2A4
EN
19
2OE
2Y1
9
2Y2
7
2Y3
5
2Y4
3
1OE 1
2
4
6
8
19
11
13
15
17 3
5
7
9
12
14
16
18
1A1
1A2
1A3
1A4
1Y1
2OE
2A1
2A2
2A3
2A4
2Y1
1Y2
1Y3
1Y4
2Y2
2Y3
2Y4
1OE
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)‡
Supply voltage range, VCC –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, VI (see Note 1) –1.2 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input current range –30 mA to 5 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage range applied to any output in the disabled or power-off state –0.5 V to 5.5 V. . . . . . . . . . . . . . . . . . .
Voltage range applied to any output in the high state –0.5 V to VCC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Current into any output in the low state: SN54F241 96 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SN74F241 128 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range: SN54F241 –55°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SN74F241 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
‡Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may af fect device reliability.
NOTE 1: The input voltage ratings may be exceeded provided the input current ratings are observed.
SN54F241, SN74F241
OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SDFS090 – MARCH 1987 – REVISED OCTOBER 1993
2–3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
recommended operating conditions
SN54F241 SN74F241
UNIT
MIN NOM MAX MIN NOM MAX
UNIT
VCC Supply voltage 4.5 5 5.5 4.5 5 5.5 V
VIH High-level input voltage 2 2 V
VIL Low-level input voltage 0.8 0.8 V
IIK Input clamp current –18 –18 mA
IOH High-level output current –12 –15 mA
IOL Low-level output current 48 64 mA
TAOperating free-air temperature –55 125 0 70 °C
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
SN54F241 SN74F241
UNIT
PARAMETER
TEST
CONDITIONS
MIN TYP†MAX MIN TYP†MAX
UNIT
VIK VCC = 4.5 V, II = –18 mA –1.2 –1.2 V
IOH = – 3 mA 2.4 3.3 2.4 3.3
VOH
VCC = 4.5 V IOH = – 12 mA 2 3.2
V
V
OH IOH = – 15 mA 2 3.1
V
VCC = 4.75 V, IOH = – 3 mA 2.7
VOL
VCC =45V
IOL = 48 mA 0.38 0.55
V
V
OL
V
CC =
4
.
5
V
IOL = 64 mA 0.42 0.55
V
IOZH VCC = 5.5 V, VO = 2.7 V 50 50 µA
IOZL VCC = 5.5 V, VO = 0.5 V –50 –50 µA
IIVCC = 5.5 V, VI = 7 V 0.1 0.1 mA
IIH VCC = 5.5 V, VI = 2.7 V 20 20 µA
IIL
OE or OE
VCC =55V
VI=05V
–1 –1
mA
I
IL Any A
V
CC =
5
.
5
V
,
V
I =
0
.
5
V
– 1.6 – 1.6
mA
IOS‡VCC = 5.5 V, VO = 0 –100 –225 –100 –225 mA
Outputs high 40 60 40 60
ICC VCC = 5.5 V Outputs low 60 90 60 90 mA
Outputs disabled 60 90 60 90
†All typical values are at VCC = 5 V, TA = 25°C.
‡Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second.
SN54F241, SN74F241
OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SDFS090 – MARCH 1987 – REVISED OCTOBER 1993
2–4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
switching characteristics (see Note 2)
PARAMETER FROM
(
INPUT
)
TO
(
OUTPUT
)
VCC = 5 V,
CL = 50 pF,
RL = 500 Ω,
TA = 25°C
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
RL = 500Ω,
TA = MIN to MAX†UNIT
(INPUT)
(OUTPUT)
′F241 SN54F241 SN74F241
MIN TYP MAX MIN MAX MIN MAX
tPLH
Any A
Y
1.7 3.6 5.2 1.2 6.5 1.7 6.2
ns
tPHL
An
y
A
Y
1.7 3.6 5.2 1.2 7 1.7 6.5
ns
tPZH
OE or OE
Y
1.2 3.9 5.7 1.2 7 1.2 6.7
ns
tPZL
OE
or
OE
Y
1.2 5 7 1.2 8.5 1.2 8
ns
tPHZ
OE or OE
Y
1.2 4.1 6 1.2 7 1.2 7
ns
tPLZ
OE
or
OE
Y
1.2 4.1 6 1.2 7.5 1.2 7
ns
†For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
NOTE 2: Load circuits and waveforms are shown in Section 1.
PACKAGE OPTION ADDENDUM
www.ti.com 4-Feb-2021
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead finish/
Ball material
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
5962-8687401RA ACTIVE CDIP J 20 1 Non-RoHS
& Green SNPB N / A for Pkg Type -55 to 125 5962-8687401RA
SNJ54F241J
JM38510/33202BRA ACTIVE CDIP J 20 1 Non-RoHS
& Green SNPB N / A for Pkg Type -55 to 125 JM38510/
33202BRA
JM38510/33202BSA ACTIVE CFP W 20 1 Non-RoHS
& Green SNPB N / A for Pkg Type -55 to 125 JM38510/
33202BSA
M38510/33202BRA ACTIVE CDIP J 20 1 Non-RoHS
& Green SNPB N / A for Pkg Type -55 to 125 JM38510/
33202BRA
M38510/33202BSA ACTIVE CFP W 20 1 Non-RoHS
& Green SNPB N / A for Pkg Type -55 to 125 JM38510/
33202BSA
SN54F241J ACTIVE CDIP J 20 1 Non-RoHS
& Green SNPB N / A for Pkg Type -55 to 125 SN54F241J
SN74F241DW ACTIVE SOIC DW 20 25 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 F241
SN74F241N ACTIVE PDIP N 20 20 RoHS &
Non-Green NIPDAU N / A for Pkg Type 0 to 70 SN74F241N
SN74F241NSR ACTIVE SO NS 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 74F241
SNJ54F241J ACTIVE CDIP J 20 1 Non-RoHS
& Green SNPB N / A for Pkg Type -55 to 125 5962-8687401RA
SNJ54F241J
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
PACKAGE OPTION ADDENDUM
www.ti.com 4-Feb-2021
Addendum-Page 2
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN54F241, SN74F241 :
•Catalog: SN74F241
•Military: SN54F241
NOTE: Qualified Version Definitions:
•Catalog - TI's standard catalog product
•Military - QML certified for Military and Defense Applications
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
SN74F241NSR SO NS 20 2000 330.0 24.4 8.4 13.0 2.5 12.0 24.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 6-May-2017
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
SN74F241NSR SO NS 20 2000 367.0 367.0 45.0
PACKAGE MATERIALS INFORMATION
www.ti.com 6-May-2017
Pack Materials-Page 2
www.ti.com
PACKAGE OUTLINE
C
TYP
10.63
9.97
2.65 MAX
18X 1.27
20X 0.51
0.31
2X
11.43
TYP
0.33
0.10
0 - 8
0.3
0.1
0.25
GAGE PLANE
1.27
0.40
A
NOTE 3
13.0
12.6
B7.6
7.4
4220724/A 05/2016
SOIC - 2.65 mm max heightDW0020A
SOIC
NOTES:
1. All linear dimensions are in millimeters. Dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.43 mm per side.
5. Reference JEDEC registration MS-013.
120
0.25 C A B
11
10
PIN 1 ID
AREA
NOTE 4
SEATING PLANE
0.1 C
SEE DETAIL A
DETAIL A
TYPICAL
SCALE 1.200
www.ti.com
EXAMPLE BOARD LAYOUT
(9.3)
0.07 MAX
ALL AROUND
0.07 MIN
ALL AROUND
20X (2)
20X (0.6)
18X (1.27)
(R )
TYP
0.05
4220724/A 05/2016
SOIC - 2.65 mm max heightDW0020A
SOIC
SYMM
SYMM
LAND PATTERN EXAMPLE
SCALE:6X
1
10 11
20
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
METAL
SOLDER MASK
OPENING
NON SOLDER MASK
DEFINED
SOLDER MASK DETAILS
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
SOLDER MASK
DEFINED
www.ti.com
EXAMPLE STENCIL DESIGN
(9.3)
18X (1.27)
20X (0.6)
20X (2)
4220724/A 05/2016
SOIC - 2.65 mm max heightDW0020A
SOIC
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
SYMM
SYMM
1
10 11
20
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:6X
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