dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X, and PIC24EPXXXGP/MC20X 16-bit Microcontrollers and Digital Signal Controllers (up to 256 KB Flash and 32 KB SRAM) with High-Speed PWM, Op amps, and Advanced Analog Operating Conditions Timers/Output Compare/Input Capture * 3.0V to 3.6V, -40C to +85C, DC to 70 MIPS * 3.0V to 3.6V, -40C to +125C, DC to 60 MIPS * 12 general purpose timers: - Five 16-bit and up to two 32-bit timers/counters - Four OC modules configurable as timers/counters - PTG module with two configurable timers/counters - 32-bit Quadrature Encoder Interface (QEI) module configurable as a timer/counter * Four IC modules * Peripheral Pin Select (PPS) to allow function remap * Peripheral Trigger Generator (PTG) for scheduling complex sequences Core: 16-bit dsPIC33E/PIC24E CPU * * * * * Code-efficient (C and Assembly) architecture Two 40-bit wide accumulators Single-cycle (MAC/MPY) with dual data fetch Single-cycle mixed-sign MUL plus hardware divide 32-bit multiply support Clock Management * * * * * Communication Interfaces 0.9% internal oscillator Programmable PLLs and oscillator clock sources Fail-Safe Clock Monitor (FSCM) Independent Watchdog Timer (WDT) Fast wake-up and start-up Power Management * * * * Low-power management modes (Sleep, Idle, Doze) Integrated Power-on Reset and Brown-out Reset 0.6 mA/MHz dynamic current (typical) 30 A IPD current (typical) * Two UART modules (17.5 Mbps) - With support for LIN 2.0 protocols and IrDA(R) * Two 4-wire SPI modules (15 Mbps) * ECANTM module (1 Mbaud) CAN 2.0B support * Two I2CTM modules (up to 1 Mbaud) with SMBus support * PPS to allow function remap * Programmable Cyclic Redundancy Check (CRC) Direct Memory Access (DMA) * 4-channel DMA with user-selectable priority arbitration * UART, SPI, ADC, ECAN, IC, OC, and Timers High-Speed PWM * * * * Up to three PWM pairs with independent timing Dead time for rising and falling edges 7.14 ns PWM resolution PWM support for: - DC/DC, AC/DC, Inverters, PFC, Lighting - BLDC, PMSM, ACIM, SRM * Programmable Fault inputs * Flexible trigger configurations for ADC conversions Input/Output * Sink/Source 15 mA or 10 mA, pin-specific for standard VOH/VOL, up to 22 or 14 mA, respectively for non-standard VOH1 * 5V-tolerant pins * Selectable open drain, pull-ups, and pull-downs * Up to 5 mA overvoltage clamp current * External interrupts on all I/O pins Advanced Analog Features * ADC module: - Configurable as 10-bit, 1.1 Msps with four S&H or 12-bit, 500 ksps with one S&H - Six analog inputs on 28-pin devices and up to 16 analog inputs on 64-pin devices * Flexible and independent ADC trigger sources * Up to three Op amp/Comparators with direct connection to the ADC module: - Additional dedicated comparator - Programmable references with 32 voltage points * Charge Time Measurement Unit (CTMU): - Supports mTouchTM capacitive touch sensing - Provides high-resolution time measurement (1 ns) - On-chip temperature measurement Qualification and Class B Support * AEC-Q100 REVG (Grade 1 -40C to +125C) planned * AEC-Q100 REVG (Grade 0 -40C to +150C) planned * Class B Safety Library, IEC 60730 Debugger Development Support * * * * In-circuit and in-application programming Two program and two complex data breakpoints IEEE 1149.2-compatible (JTAG) boundary scan Trace and run-time watch Packages Type SPDIP SOIC SSOP Pin Count 28 28 28 I/O Pins 21 21 21 Contact Lead/Pitch .100'' 1.27 0.65 Dimensions 1.365x.240x.120'' 17.9x7.50x2.05 10.50x7.80x2 Note: All dimensions are in millimeters (mm) unless specified. (c) 2011 Microchip Technology Inc. QFN-S 28 21 0.65 6x6x0.9 Preliminary QFN 44 64 35 53 0.65 0.50 8x8x0.9 9x9x.9 VTLA 36 25 TQFP 44 35 44 35 0.50 5x5x0.5 6x6x0.5 64 53 0.50 10x10x1 DS70657D-page 1 dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X, AND PIC24EPXXXGP/MC20X dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X, AND PIC24EPXXXGP/MC20X PRODUCT FAMILIES The device names, pin counts, memory sizes, and peripheral availability of each device are listed in Table 1 (General Purpose Families) and Table 2 (Motor Control Families). Their pinout diagrams appear on the following pages. 8 PIC24EP32GP204 512 32 4 PIC24EP64GP204 1024 64 8 PIC24EP128GP204 1024 128 16 PIC24EP256GP204 1024 256 32 PIC24EP64GP206 1024 64 8 PIC24EP128GP206 1024 128 16 PIC24EP256GP206 1024 256 32 dsPIC33EP32GP502 512 32 4 dsPIC33EP64GP502 1024 64 8 dsPIC33EP128GP502 1024 128 16 dsPIC33EP256GP502 1024 256 32 dsPIC33EP32GP503 512 32 4 dsPIC33EP64GP503 1024 64 8 dsPIC33EP32GP504 512 32 4 dsPIC33EP64GP504 1024 64 8 dsPIC33EP128GP504 1024 128 16 dsPIC33EP256GP504 1024 256 32 dsPIC33EP64GP506 1024 64 8 dsPIC33EP128GP506 1024 128 16 dsPIC33EP256GP506 1024 256 32 Note 1: 2: 3: -- 3 2 1 6 5 4 4 2 2 -- 3 2 1 8 3/4 5 4 4 2 2 -- 3 2 1 9 5 4 4 2 2 -- 3 2 1 16 5 4 4 2 2 1 3 2 1 6 5 4 4 2 2 1 3 2 1 8 3/4 5 4 4 2 2 1 3 2 1 9 5 4 4 2 2 1 3 2 1 16 Op amps/Comparators 2 Packages 64 2 Pins 1024 4 I/O Pins 4 PIC24EP64GP203 4 PTG 32 5 CTMU 512 10-bit/12-bit ADC (Channels) 32 PIC24EP32GP203 CRC Generator 16 256 I2CTM 128 1024 External Interrupts(3) 1024 PIC24EP256GP202 ECANTM Technology PIC24EP128GP202 SPI(2) 4 8 UART 32 64 Output Compare 512 1024 Input Capture PIC24EP32GP202 PIC24EP64GP202 16-bit/32-bit Timers Remappable Peripherals RAM (Kbyte) Device Program Flash Memory (Kbytes) dsPIC33EPXXXGP50X and PIC24EPXXXGP20X GENERAL PURPOSE FAMILIES Page Erase Size (Instructions) TABLE 1: 2/3(1) Yes Yes 21 28 SPDIP, SOIC, SSOP, QFN-S Yes Yes 25 36 VTLA 3/4 Yes Yes 35 44 VTLA, TQFP, QFN 3/4 Yes Yes 53 64 TQFP, QFN 2/3(1) Yes Yes 21 28 SPDIP, SOIC, SSOP, QFN-S Yes Yes 25 36 VTLA 3/4 Yes Yes 35 44 VTLA, TQFP, QFN 3/4 Yes Yes 53 64 TQFP, QFN On 28-pin devices, Comparator 4 does not have external connections. Refer to Section 25.0 "Op amp/Comparator Module" for details. Only SPI2 is remappable. INT0 is not remappable. DS70657D-page 2 Preliminary (c) 2011 Microchip Technology Inc. dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X, AND PIC24EPXXXGP/MC20X 8 PIC24EP32MC204 512 32 4 PIC24EP64MC204 1024 64 8 PIC24EP128MC204 1024 128 16 PIC24EP256MC204 1024 256 32 PIC24EP64MC206 1024 64 8 PIC24EP128MC206 1024 128 16 PIC24EP256MC206 1024 256 32 dsPIC33EP32MC202 512 32 4 dsPIC33EP64MC202 1024 64 8 dsPIC33EP128MC202 1024 128 16 dsPIC33EP256MC202 1024 256 32 dsPIC33EP32MC203 512 32 4 dsPIC33EP64MC203 1024 64 8 dsPIC33EP32MC204 512 32 4 dsPIC33EP64MC204 1024 64 8 dsPIC33EP128MC204 1024 128 16 dsPIC33EP256MC204 1024 256 32 dsPIC33EP64MC206 1024 64 8 dsPIC33EP128MC206 1024 128 16 dsPIC33EP256MC206 1024 256 32 dsPIC33EP32MC502 512 32 4 dsPIC33EP64MC502 1024 64 8 dsPIC33EP128MC502 1024 128 16 dsPIC33EP256MC502 1024 256 32 dsPIC33EP32MC503 512 32 4 dsPIC33EP64MC503 1024 64 8 dsPIC33EP32MC504 512 32 4 dsPIC33EP64MC504 1024 64 8 dsPIC33EP128MC504 1024 128 16 dsPIC33EP256MC504 1024 256 32 dsPIC33EP64MC506 1024 64 8 dsPIC33EP128MC506 1024 128 16 dsPIC33EP256MC506 1024 256 32 Note 1: 2: 3: 4: 1 2 2 -- 3 2 1 6 5 4 4 6 1 2 2 -- 3 2 1 8 3/4 5 4 4 6 1 2 2 -- 3 2 1 9 5 4 4 6 1 2 2 -- 3 2 1 16 5 4 4 6 1 2 2 -- 3 2 1 6 5 4 4 6 1 2 2 -- 3 2 1 8 3/4 5 4 4 6 1 2 2 -- 3 2 1 9 5 4 4 6 1 2 2 -- 3 2 1 16 5 4 4 6 1 2 2 1 3 2 1 6 5 4 4 6 1 2 2 1 3 2 1 8 Op amps/Comparators 6 2/3(1) Yes Yes 21 28 SPDIP, SOIC, SSOP, QFN-S Yes Yes 25 36 VTLA 3/4 Yes Yes 35 44 VTLA, TQFP, QFN 3/4 Yes Yes 53 64 TQFP, QFN 2/3(1) Yes Yes 21 28 SPDIP, SOIC, SSOP, QFN-S Yes Yes 25 36 VTLA 3/4 Yes Yes 35 44 VTLA, TQFP, QFN 3/4 Yes Yes 53 64 TQFP, QFN 2/3(1) Yes Yes 21 28 SPDIP, SOIC, SSOP, QFN-S 25 36 3/4 CTMU Packages 64 4 Pins 1024 4 I/O Pins 4 PIC24EP64MC203 5 PTG 32 10-bit/12-bit ADC (Channels) 512 CRC Generator 32 PIC24EP32MC203 I2CTM 16 256 External Interrupts(3) 128 1024 ECANTM Technology 1024 PIC24EP256MC202 SPI(2) PIC24EP128MC202 UART 8 Quadrature Encoder Interface 4 64 Motor Control PWM(4) (Channels) 32 1024 Output Compare 512 PIC24EP64MC202 Input Capture PIC24EP32MC202 16-bit/32-bit Timers Remappable Peripherals RAM (Kbytes) Device Program Flash Memory (Kbytes) dsPIC33EPXXXMC20X/50X and PIC24EPXXXMC20X MOTOR CONTROL FAMILIES Page Erase Size (Instructions) TABLE 2: Yes Yes 5 4 4 6 1 2 2 1 3 2 1 9 3/4 Yes Yes 35 44 5 4 4 6 1 2 2 1 3 2 1 16 3/4 Yes Yes 53 64 VTLA VTLA, TQFP, QFN TQFP, QFN On 28-pin devices, Comparator 4 does not have external connections. Refer to Section 25.0 "Op amp/Comparator Module" for details. Only SPI2 is remappable. INT0 is not remappable. Only the PWM Faults are remappable. (c) 2011 Microchip Technology Inc. Preliminary DS70657D-page 3 dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X, AND PIC24EPXXXGP/MC20X Pin Diagrams = Pins are up to 5V tolerant 28-Pin SPDIP/SOIC/SSOP MCLR 1 28 AVDD AN0/OA2OUT/RA0 2 27 AVSS 3 26 RPI47/T5CK/RB15 4 25 RPI46/T3CK/RB14 PGEC3/VREF+/AN3/OA1OUT/RPI33/CTED1/RB1 5 PGEC1/AN4/C1IN1+/RPI34/RB2 6 PGED1/AN5/C1IN1-/RP35/RB3 7 VSS 8 OSC1/CLKI/RA2 9 OSC2/CLKO/RA3 10 RP36/RB4 11 CVREF2O/RP20/T1CK/RA4 dsPIC33EPXXXGP502 PIC24EPXXXGP202 AN1/C2IN1+/RA1 PGED3/VREF-/AN2/C2IN1-/SS1/RPI32/CTED2/RB0 24 RPI45/CTPLS/RB13 23 RPI44/RB12 22 TDI/RP43/RB11 21 TDO/RP42/RB10 20 VCAP 19 VSS 18 TMS/ASDA1/SDI1/RP41/RB9 12 17 TCK/CVREF1O/ASCL1/SDO1/RP40/T4CK/RB8 VDD 13 16 SCK1/RP39/INT0/RB7 PGED2/ASDA2/RP37/RB5 14 15 PGEC2/ASCL2/RP38/RB6 AVDD 1 28 2 27 AVSS AN1/C2IN1+/RA1 3 26 RPI47/PWM1L/T5CK/RB15 PGED3/VREF-/AN2/C2IN1-/SS1/RPI32/CTED2/RB0 4 PGEC3/VREF+/AN3/OA1OUT/RPI33/CTED1/RB1 5 PGEC1/AN4/C1IN1+/RPI34/RB2 6 PGED1/AN5/C1IN1-/RP35/RB3 7 VSS 8 OSC1/CLKI/RA2 9 OSC2/CLKO/RA3 10 FLT32/RP36/RB4 11 CVREF2O/RP20/T1CK/RA4 12 VDD PGED2/ASDA2/RP37/RB5 dsPIC33EPXXXMC202/502 PIC24EPXXXMC202 MCLR AN0/OA2OUT/RA0 25 RPI46/PWM1H/T3CK/RB14 24 RPI45/PWM2L/CTPLS/RB13 23 RPI44/PWM2H/RB12 22 TDI/RP43/PWM3L/RB11 21 TDO/RP42/PWM3H/RB10 20 VCAP 19 VSS 18 TMS/ASDA1/SDI1/RP41/RB9 17 TCK/CVREF1O/ASCL1/SDO1/RP40/T4CK/RB8 13 16 SCK1/RP39/INT0/RB7 14 15 PGEC2/ASCL2/RP38/RB6 Note 1: The RPn/RPIn pins can be used by any remappable peripheral with some limitation. See Section 11.4 "Peripheral Pin Select" for available peripherals and for information on limitations. 2: Every I/O port pin (RAx-RGx) can be used as change notification (CNAx-CNGx). See Section 11.0 "I/O Ports" for more information. DS70657D-page 4 Preliminary (c) 2011 Microchip Technology Inc. dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X, AND PIC24EPXXXGP/MC20X Pin Diagrams (Continued) 28-Pin QFN-S(3) RPI46/T3CK/RB14 RPI47/T5CK/RB15 AVSS AVDD MCLR AN0/OA2OUT/RA0 AN1/C2IN1+/RA1 = Pins are up to 5V tolerant 28 27 26 25 24 23 22 PGED3/VREF-/AN2/C2IN1-/SS1/RPI32/CTED2/RB0 1 21 RPI45/CTPLS/RB13 PGEC3/VREF+/AN3/OA1OUT/RPI33/CTED1/RB1 2 20 RPI44/RB12 PGEC1/AN4/C1IN1+/RPI34/RB2 3 19 TDI/RP43/RB11 PGED1/AN5/C1IN1-/RP35/RB3 4 18 TDO/RP42/RB10 dsPIC33EPXXXGP502 PIC24EPXXXGP202 VCAP 16 VSS OSC2/CLKO/RA3 7 15 TMS/ASDA1/SDI1/RP41/RB9 TCK/CVREF1O/ASCL1/SDO1/RP40/T4CK/RB8 SCK1/RP39/INT0/RB7 10 11 12 13 14 PGEC2/ASCL2/RP38/RB6 9 PGED2/ASDA2/RP37/RB5 8 VDD 17 6 CVREF2O/RP20/T1CK/RA4 5 RP36/RB4 VSS OSC1/CLKI/RA2 Note 1: The RPn/RPIn pins can be used by any remappable peripheral with some limitation. See Section 11.4 "Peripheral Pin Select" for available peripherals and for information on limitations. 2: Every I/O port pin (RAx-RGx) can be used as change notification (CNAx-CNGx). See Section 11.0 "I/O Ports" for more information. 3: The metal pad at the bottom of the device is not connected to any pins and is recommended to be connected to VSS externally. (c) 2011 Microchip Technology Inc. Preliminary DS70657D-page 5 dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X, AND PIC24EPXXXGP/MC20X Pin Diagrams (Continued) 28-Pin QFN-S(3) RPI46/PWM1H/T3CK/RB14 RPI47/PWM1L/T5CK/RB15 AVSS AVDD MCLR AN0/OA2OUT/RA0 AN1/C2IN1+/RA1 = Pins are up to 5V tolerant 28 27 26 25 24 23 22 PGED3/VREF-/AN2/C2IN1-/SS1/RPI32/CTED2/RB0 1 21 RPI45/PWM2L/CTPLS/RB13 PGEC3/VREF+/AN3/OA1OUT/RPI33/CTED1/RB1 2 20 RPI44/PWM2H/RB12 PGEC1/AN4/C1IN1+/RPI34/RB2 3 19 TDI/RP43/PWM3L/RB11 5 17 VCAP OSC1/CLKI/RA2 6 16 VSS OSC2/CLKO/RA3 7 15 TMS/ASDA1/SDI1/RP41/RB9 TCK/CVREF1O/ASCL1/SDO1/RP40/T4CK/RB8 SCK1/RP39/INT0/RB7 PGEC2/ASCL2/RP38/RB6 10 11 12 13 14 VDD 9 PGED2/ASDA2/RP37/RB5 8 FLT32/RP36/RB4 TDO/RP42/PWM3H/RB10 VSS PGED1/AN5/C1IN1-/RP35/RB3 CVREF2O/RP20/T1CK/RA4 dsPIC33EPXXXMC202/502 4 18 PIC24EPXXXMC202 Note 1: The RPn/RPIn pins can be used by any remappable peripheral with some limitation. See Section 11.4 "Peripheral Pin Select" for available peripherals and for information on limitations. 2: Every I/O port pin (RAx-RGx) can be used as change notification (CNAx-CNGx). See Section 11.0 "I/O Ports" for more information. 3: The metal pad at the bottom of the device is not connected to any pins and is recommended to be connected to VSS externally. DS70657D-page 6 Preliminary (c) 2011 Microchip Technology Inc. dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X, AND PIC24EPXXXGP/MC20X Pin Diagrams (Continued) 36-Pin VTLA(3) AVDD AVSS RPI47/T5CK/RB15 RPI46/T3CK/RB14 34 MCLR 35 AN0/OA2OUT/RA0 PGED3/VREF-/AN2/C2IN1-/SS1/RPI32/CTED2/RB0 36 AN1/C2IN1+/RA1 PGEC3/VREF+/AN3/OA1OUT/RPI33/CTED1/RB1 = Pins are up to 5V tolerant 33 32 31 30 29 28 27 RPI45/CTPLS/RB13 PGEC1/AN4/C1IN1+/RPI34/RB2 1 26 RPI44/RB12 PGED1/AN5/C1IN1-/RP35/RB3 2 25 TDI/RP43/RB11 AN6/OA3OUT/C4IN1+/OCFB/RC0 3 24 TDO/RP42/RB10 AN7/C3IN1-/C4IN1-/RC1 4 23 VDD VDD 5 22 VCAP VSS 6 21 VSS OSC1/CLKI/RA2 7 20 RP56/RC8 OSC2/CLKO/RA3 8 19 TMS/ASDA1/SDI1/RP41/RB9 SDA2/RPI24/RA8 9 14 15 16 17 18 PGED2/ASDA2/RP37/RB5 PGEC2/ASCL2/RP38/RB6 TCK/CVREF1O/ASCL1/SDO1/RP40/T4CK/RB8 SCK1/RP39/INT0/RB7 13 VDD SCL2/RP36/RB4 12 VDD 11 VSS 10 CVREF2O/RP20/T1CK/RA4 dsPIC33EP32GP503 dsPIC33EP64GP503 PIC24EP32GP203 PIC24EP64GP203 Note 1: The RPn/RPIn pins can be used by any remappable peripheral with some limitation. See Section 11.4 "Peripheral Pin Select" for available peripherals and for information on limitations. 2: Every I/O port pin (RAx-RGx) can be used as change notification (CNAx-CNGx). See Section 11.0 "I/O Ports" for more information. 3: The metal pad at the bottom of the device is not connected to any pins and is recommended to be connected to VSS externally. (c) 2011 Microchip Technology Inc. Preliminary DS70657D-page 7 dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X, AND PIC24EPXXXGP/MC20X Pin Diagrams (Continued) 36-Pin VTLA(3) MCLR AVDD AVSS RPI47/PWM1L/T5CK/RB15 RPI46/PWM1H/T3CK/RB14 35 AN0/OA2OUT/RA0 PGED3/VREF-/AN2/C2IN1-/SS1/RPI32/CTED2/RB0 36 AN1/C2IN1+/RA1 PGEC3/VREF+/AN3/OA1OUT/RPI33/CTED1/RB1 = Pins are up to 5V tolerant 33 32 31 30 29 28 27 RPI45/PWM2L/CTPLS/RB13 PGEC1/AN4/C1IN1+/RPI34/RB2 1 26 RPI44/PWM2H/RB12 PGED1/AN5/C1IN1-/RP35/RB3 2 25 TDI/RP43/PWM3L/RB11 AN6/OA3OUT/C4IN1+/OCFB/RC0 3 24 TDO/RP42/PWM3H/RB10 23 VDD 22 VCAP 21 VSS 34 dsPIC33EP32MC203/503 dsPIC33EP64MC203/503 PIC24EP32MC203 PIC24EP64MC203 RP56/RC8 OSC2/CLKO/RA3 8 19 TMS/ASDA1/SDI1/RP41/RB9 SDA2/RPI24/RA8 9 11 12 13 14 15 16 17 18 SCK1/RP39/INT0/RB7 10 TCK/CVREF1O/ASCL1/SDO1/RP40/T4CK/RB8 20 PGEC2/ASCL2/RP38/RB6 7 PGED2/ASDA2/RP37/RB5 OSC1/CLKI/RA2 VDD 6 VSS VSS VDD 5 CVREF2O/RP20/T1CK/RA4 4 VDD FLT32/SCL2/RP36/RB4 AN7/C3IN1-/C4IN1-/RC1 Note 1: The RPn/RPIn pins can be used by any remappable peripheral with some limitation. See Section 11.4 "Peripheral Pin Select" for available peripherals and for information on limitations. 2: Every I/O port pin (RAx-RGx) can be used as change notification (CNAx-CNGx). See Section 11.0 "I/O Ports" for more information. 3: The metal pad at the bottom of the device is not connected to any pins and is recommended to be connected to VSS externally. DS70657D-page 8 Preliminary (c) 2011 Microchip Technology Inc. dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X, AND PIC24EPXXXGP/MC20X Pin Diagrams (Continued) = Pins are up to 5V tolerant TCK/CVREF1O/ASCL1/RP40/T4CK/RB8 RP39/INT0/RB7 PGEC2/ASCL2/RP38/RB6 PGED2/ASDA2/RP37/RB5 VDD VSS SCL1/RPI53/RC5 SDA1/RPI52/RC4 SCK1/RPI51/RC3 SDI1/RPI25/RA9 CVREF2O/SDO1/RP20/T1CK/RA4 44 43 42 41 40 39 38 37 36 35 34 44-Pin TQFP TMS/ASDA1/RP41/RB9 1 33 SCL2/RP36/RB4 RP54/RC6 2 32 SDA2/RPI24/RA8 RP55/RC7 3 31 OSC2/CLKO/RA3 RP56/RC8 4 30 OSC1/CLKI/RA2 RP57/RC9 5 29 VSS VSS 6 VCAP dsPIC33EPXXXGP504 PIC24EPXXXGP204 18 19 20 21 22 AN0/OA2OUT/RA0 AN1/C2IN1+/RA1 PGED3/VREF-/AN2/C2IN1-/SS1/RPI32/CTED2/RB0 PGEC3/VREF+/AN3/OA1OUT/RPI33/CTED1/RB1 PGEC1/AN4/C1IN1+/RPI34/RB2 MCLR PGED1/AN5/C1IN1-/RP35/RB3 23 17 24 11 16 10 AVSS RPI44/RB12 RPI45/CTPLS/RB13 AVDD AN6/OA3OUT/C4IN1+/OCFB/RC0 15 AN7/C3IN1-/C4IN1-/RC1 25 14 26 9 RPI47/T5CK/RB15 8 RP43/RB11 RPI46/T3CK/RB14 RP42/RB10 13 AN8/C3IN1+/U1RTS/BCLK1/RC2 12 27 TDI/RA7 VDD 7 TDO/RA10 28 Note 1: The RPn/RPIn pins can be used by any remappable peripheral with some limitation. See Section 11.4 "Peripheral Pin Select" for available peripherals and for information on limitations. 2: Every I/O port pin (RAx-RGx) can be used as change notification (CNAx-CNGx). See Section 11.0 "I/O Ports" for more information. (c) 2011 Microchip Technology Inc. Preliminary DS70657D-page 9 dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X, AND PIC24EPXXXGP/MC20X Pin Diagrams (Continued) = Pins are up to 5V tolerant TCK/CVREF1O/ASCL1/RP40/T4CK/RB8 RP39/INT0/RB7 PGEC2/ASCL2/RP38/RB6 PGED2/ASDA2/RP37/RB5 VDD VSS SCL1/RPI53/RC5 SDA1/RPI52/RC4 SCK1/RPI51/RC3 SDI1/RPI25/RA9 CVREF2O/SDO1/RP20/T1CK/RA4 44 43 42 41 40 39 38 37 36 35 34 44-Pin TQFP TMS/ASDA1/RP41/RB9 1 33 FLT32/SCL2/RP36/RB4 RP54/RC6 2 32 SDA2/RPI24/RA8 RP55/RC7 3 31 OSC2/CLKO/RA3 RP56/RC8 4 30 OSC1/CLKI/RA2 RP57/RC9 5 VSS 6 dsPIC33EPXXXMC204/504 PIC24EPXXXMC204 29 VSS 28 VDD 20 21 22 AN1/C2IN1+/RA1 PGEC3/VREF+/AN3/OA1OUT/RPI33/CTED1/RB1 19 AN0/OA2OUT/RA0 PGED3/VREF-/AN2/C2IN1-/SS1/RPI32/CTED2/RB0 18 MCLR PGEC1/AN4/C1IN1+/RPI34/RB2 17 23 16 11 AVSS PGED1/AN5/C1IN1-/RP35/RB3 RPI45/PWM2L/CTPLS/RB13 AVDD 24 15 10 14 AN6/OA3OUT/C4IN1+/OCFB/RC0 RPI44/PWM2H/RB12 RPI47/PWM1L/T5CK/RB15 RP43/PWM3L/RB11 25 RPI46/PWM1H/T3CK/RB14 AN7/C3IN1-/C4IN1-/RC1 9 13 AN8/C3IN1+/U1RTS/BCLK1/FLT3/RC2 26 12 27 8 TDI/RA7 7 TDO/RA10 VCAP RP42/PWM3H/RB10 Note 1: The RPn/RPIn pins can be used by any remappable peripheral with some limitation. See Section 11.4 "Peripheral Pin Select" for available peripherals and for information on limitations. 2: Every I/O port pin (RAx-RGx) can be used as change notification (CNAx-CNGx). See Section 11.0 "I/O Ports" for more information. DS70657D-page 10 Preliminary (c) 2011 Microchip Technology Inc. dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X, AND PIC24EPXXXGP/MC20X Pin Diagrams (Continued) 44-Pin VTLA(3) CVREF2O/SDO1/RP20/T1CK/RA4 SDI1/RPI25/RA9 SCK1/RPI51/RC3 SDA1/RPI52/RC4 SCL1/RPI53/RC5 VSS VDD PGED2/ASDA2/RP37/RB5 PGEC2/ASCL2/RP38/RB6 TCK/CVREF1O/ASCL1/RP40/T4CK/RB8 RP39/INT0/RB7 = Pins are up to 5V tolerant 44 43 42 41 40 39 38 37 36 35 34 33 SCL2/RP36/RB4 TMS/ASDA1/RP41/RB9 1 32 SDA2/RPI24/RA8 RP54/RC6 2 31 OSC2/CLKO/RA3 RP55/RC7 3 30 OSC1/CLKI/RA2 RP56/RC8 4 29 VSS RP57/RC9 5 28 VDD VSS 6 27 AN8/C3IN1+/U1RTS/BCLK1/RC2 VCAP 7 26 AN7/C3IN1-/C4IN1-/RC1 RP42/RB10 8 25 AN6/OA3OUT/C4IN1+/OCFB/RC0 RP43/RB11 9 24 PGED1/AN5/C1IN1-/RP35/RB3 RPI44/RB12 10 23 PGEC1/AN4/C1IN1+/RPI34/RB2 dsPIC33EPXXXGP504 PIC24EPXXXGP204 PGEC3/VREF+/AN3/OA1OUT/RPI33/CTED1/RB1 PGED3/VREF-/AN2/C2IN1-/SS1/RPI32/CTED2/RB0 AN1/C2IN1+/RA1 AN0/OA2OUT/RA0 MCLR AVDD AVSS RPI47/T5CK/RB15 TDI/RA7 RPI46/T3CK/RB14 TDO/RA10 RPI45/CTPLS/RB13 11 12 13 14 15 16 17 18 19 20 21 22 Note 1: The RPn/RPIn pins can be used by any remappable peripheral with some limitation. See Section 11.4 "Peripheral Pin Select" for available peripherals and for information on limitations. 2: Every I/O port pin (RAx-RGx) can be used as change notification (CNAx-CNGx). See Section 11.0 "I/O Ports" for more information. 3: The metal pad at the bottom of the device is not connected to any pins and is recommended to be connected to VSS externally. (c) 2011 Microchip Technology Inc. Preliminary DS70657D-page 11 dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X, AND PIC24EPXXXGP/MC20X Pin Diagrams (Continued) 44-Pin VTLA(3) CVREF2O/SDO1/RP20/T1CK/RA4 SDI1/RPI25/RA9 SCK1/RPI51/RC3 SDA1/RPI52/RC4 SCL1/RPI53/RC5 VDD VSS PGED2/ASDA2/RP37/RB5 PGEC2/ASCL2/RP38/RB6 RP39/INT0/RB7 TCK/CVREF1O/ASCL1/RP40/T4CK/RB8 = Pins are up to 5V tolerant 44 43 42 41 40 39 38 37 36 35 34 33 FLT32/SCL2/RP36/RB4 TMS/ASDA1/RP41/RB9 1 32 SDA2/RPI24/RA8 RP54/RC6 2 31 OSC2/CLKO/RA3 RP55/RC7 3 30 OSC1/CLKI/RA2 RP56/RC8 4 29 VSS RP57/RC9 5 28 VDD VSS 6 27 AN8/C3IN1+/U1RTS/BCLK1/FLT3/RC2 VCAP 7 26 AN7/C3IN1-/C4IN1-/RC1 RP42/PWM3H/RB10 8 25 AN6/OA3OUT/C4IN1+/OCFB/RC0 RP43/PWM3L/RB11 9 24 PGED1/AN5/C1IN1-/RP35/RB3 RPI44/PWM2H/RB12 10 23 PGEC1/AN4/C1IN1+/RPI34/RB2 dsPIC33EPXXXMC204/504 PIC24EPXXXMC204 PGEC3/VREF+/AN3/OA1OUT/RPI33/CTED1/RB1 PGED3/VREF-/AN2/C2IN1-/SS1/RPI32/CTED2/RB0 AN1/C2IN1+/RA1 AN0/OA2OUT/RA0 AVDD MCLR AVSS RPI47/PWM1L/T5CK/RB15 RPI46/PWM1H/T3CK/RB14 TDI/RA7 TDO/RA10 RPI45/PWM2L/CTPLS/RB13 11 12 13 14 15 16 17 18 19 20 21 22 Note 1: The RPn/RPIn pins can be used by any remappable peripheral with some limitation. See Section 11.4 "Peripheral Pin Select" for available peripherals and for information on limitations. 2: Every I/O port pin (RAx-RGx) can be used as change notification (CNAx-CNGx). See Section 11.0 "I/O Ports" for more information. 3: The metal pad at the bottom of the device is not connected to any pins and is recommended to be connected to VSS externally. DS70657D-page 12 Preliminary (c) 2011 Microchip Technology Inc. dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X, AND PIC24EPXXXGP/MC20X Pin Diagrams (Continued) 44-Pin QFN(3) CVREF2O/SDO1/RP20/T1CK/RA4 SDI1/RPI25/RA9 SCK1/RPI51/RC3 SDA1/RPI52/RC4 SCL1/RPI53/RC5 VDD VSS PGED2/ASDA2/RP37/RB5 PGEC2/ASCL2/RP38/RB6 RP39/INT0/RB7 TCK/CVREF1O/ASCL1/RP40/T4CK/RB8 = Pins are up to 5V tolerant 44 43 42 41 40 39 38 37 36 35 34 TMS/ASDA1/RP41/RB9 1 33 SCL2/RP36/RB4 RP54/RC6 2 32 SDA2/RPI24/RA8 RP55/RC7 3 31 OSC2/CLKO/RA3 RP56/RC8 4 30 OSC1/CLKI/RA2 RP57/RC9 5 29 VSS dsPIC33EPXXXGP504 PIC24EPXXXGP204 VSS 6 28 VDD VCAP 7 27 AN8/C3IN1+/U1RTS/BCLK1/RC2 RP42/RB10 8 26 AN7/C3IN1-/C4IN1-/RC1 RP43/RB11 9 25 AN6/OA3OUT/C4IN1+/OCFB/RC0 RPI44/RB12 10 24 PGED1/AN5/C1IN1-/RP35/RB3 RPI45/CTPLS/RB13 11 23 PGEC1/AN4/C1IN1+/RPI34/RB2 PGEC3/VREF+/AN3/OA1OUT/RPI33/CTED1/RB1 PGED3/VREF-/AN2/C2IN1-/SS1/RPI32/CTED2/RB0 AN1/C2IN1+/RA1 AN0/OA2OUT/RA0 MCLR AVDD AVSS RPI47/T5CK/RB15 RPI46/T3CK/RB14 TDI/RA7 TDO/RA10 12 13 14 15 16 17 18 19 20 21 22 Note 1: The RPn/RPIn pins can be used by any remappable peripheral with some limitation. See Section 11.4 "Peripheral Pin Select" for available peripherals and for information on limitations. 2: Every I/O port pin (RAx-RGx) can be used as change notification (CNAx-CNGx). See Section 11.0 "I/O Ports" for more information. 3: The metal pad at the bottom of the device is not connected to any pins and is recommended to be connected to VSS externally. (c) 2011 Microchip Technology Inc. Preliminary DS70657D-page 13 dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X, AND PIC24EPXXXGP/MC20X Pin Diagrams (Continued) 44-Pin QFN(3) CVREF2O/SDO1/RP20/T1CK/RA4 SDI1/RPI25/RA9 SCK1/RPI51/RC3 SDA1/RPI52/RC4 SCL1/RPI53/RC5 VDD VSS PGED2/ASDA2/RP37/RB5 PGEC2/ASCL2/RP38/RB6 RP39/INT0/RB7 TCK/CVREF1O/ASCL1/RP40/T4CK/RB8 = Pins are up to 5V tolerant 44 43 42 41 40 39 38 37 36 35 34 TMS/ASDA1/RP41/RB9 1 33 FLT32/SCL2/RP36/RB4 RP54/RC6 2 32 SDA2/RPI24/RA8 RP55/RC7 3 31 OSC2/CLKO/RA3 RP56/RC8 4 30 OSC1/CLKI/RA2 RP57/RC9 5 29 VSS 28 VDD VSS 6 dsPIC33EPXXXMC204/504 PIC24EPXXXMC204 VCAP 7 27 AN8/C3IN1+/U1RTS/BCLK1/FLT3/RC2 RP42/PWM3H/RB10 8 26 AN7/C3IN1-/C4IN1-/RC1 RP43/PWM3L/RB11 9 25 AN6/OA3OUT/C4IN1+/OCFB/RC0 RPI44/PWM2H/RB12 10 24 PGED1/AN5/C1IN1-/RP35/RB3 RPI45/PWM2L/CTPLS/RB13 11 23 PGEC1/AN4/C1IN1+/RPI34/RB2 PGEC3/VREF+/AN3/OA1OUT/RPI33/CTED1/RB1 PGED3/VREF-/AN2/C2IN1-/SS1/RPI32/CTED2/RB0 AN1/C2IN1+/RA1 MCLR AN0/OA2OUT/RA0 AVDD AVSS RPI47/PWM1L/T5CK/RB15 RPI46/PWM1H/T3CK/RB14 TDI/RA7 TDO/RA10 12 13 14 15 16 17 18 19 20 21 22 Note 1: The RPn/RPIn pins can be used by any remappable peripheral with some limitation. See Section 11.4 "Peripheral Pin Select" for available peripherals and for information on limitations. 2: Every I/O port pin (RAx-RGx) can be used as change notification (CNAx-CNGx). See Section 11.0 "I/O Ports" for more information. 3: The metal pad at the bottom of the device is not connected to any pins and is recommended to be connected to VSS externally. DS70657D-page 14 Preliminary (c) 2011 Microchip Technology Inc. dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X, AND PIC24EPXXXGP/MC20X Pin Diagrams (Continued) = Pins are up to 5V tolerant RPI45/CTPLS/RB13 RPI44/RB12 RP43/RB11 RP42/RB10 RP97/RF1 RPI96/RF0 VDD VCAP RP57/RC9 RD6 RD5 RP56/RC8 RP55/RC7 RP54/RC6 TMS/ASDA1/RP41/RB9 62 61 60 59 58 57 56 55 54 53 52 51 50 49 TDO/RA10 63 48 47 46 4 5 6 7 8 9 10 11 12 45 44 43 42 41 40 39 38 37 dsPIC33EP64GP506 dsPIC33EP128GP506 dsPIC33EP256GP506 PIC24EP64GP206 PIC24EP128GP206 PIC24EP256GP206 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 AVDD AVSS AN6/OA3OUT/C4IN1+/OCFB/RC0 AN7/C3IN1-/C4IN1-/RC1 AN8/C3IN1+/U1RTS/BCLK1/RC2 AN11/C1IN2-(3)/U1CTS/RC11 VSS VDD AN12/C2IN2-(3)/U2RTS/BCLK2/RE12 AN13/C3IN2-(3)/U2CTS/RE13 AN14/RPI94/RE14 AN15/RPI95/RE15 SDA2/RPI24/RA8 SCL2/RP36/RB4 36 35 34 33 17 13 14 15 16 PGED1/AN5/C1IN1-/RP35/RB3 VDD AN10/RPI28/RA12 AN9/RPI27/RA11 AN0/OA2OUT/RA0 AN1/C2IN1+/RA1 PGED3/VREF-/AN2/C2IN1-/SS1/RPI32/CTED2/RB0 PGEC3/VREF+/AN3/OA1OUT/RPI33/CTED1/RB1 1 2 3 PGEC1/AN4/C1IN1+/RPI34/RB2 TDI/RA7 RPI46/T3CK/RB14 RPI47/T5CK/RB15 RP118/RG6 RPI119/RG7 RP120/RG8 MCLR RPI121/RG9 VSS 64 64-Pin TQFP TCK/CVREF1O/ASCL1/RP40/T4CK/RB8 RC13 RP39/INT0/RB7 RPI58/RC10 PGEC2/ASCL2/RP38/RB6 PGED2/ASDA2/RP37/RB5 RD8 VSS OSC2/CLKO/RC15 OSC1/CLKI/RC12 VDD SCL1/RPI53/RC5 SDA1/RPI52/RC4 SCK1/RPI51/RC3 SDI1/RPI25/RA9 CVREF2O/SDO1/RP20/T1CK/RA4 Note 1: The RPn/RPIn pins can be used by any remappable peripheral with some limitation. See Section 11.4 "Peripheral Pin Select" for available peripherals and for information on limitations. 2: Every I/O port pin (RAx-RGx) can be used as change notification (CNAx-CNGx). See Section 11.0 "I/ O Ports" for more information. 3: This pin is not available as an input when OPMODE (CMxCON<10>) = 1. (c) 2011 Microchip Technology Inc. Preliminary DS70657D-page 15 dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X, AND PIC24EPXXXGP/MC20X Pin Diagrams (Continued) = Pins are up to 5V tolerant RPI45/PWM2L/CTPLS/RB13 RPI44/PWM2H/RB12 RP43/PWM3L/RB11 RP42/PWM3H/RB10 RP97/RF1 RPI96/RF0 VDD VCAP RP57/RC9 RD6 RD5 RP56/RC8 RP55/RC7 RP54/RC6 TMS/ASDA1/RP41/RB9 62 61 60 59 58 57 56 55 54 53 52 51 50 49 TDO/RA10 63 48 47 46 4 5 6 7 8 9 10 11 12 45 44 43 42 41 40 39 38 37 dsPIC33EP64MC206/506 dsPIC33EP128MC206/506 dsPIC33EP256MC206/506 PIC24EP64MC206 PIC24EP128MC206 PIC24EP256MC206 28 29 30 31 32 AN13/C3IN2- /U2CTS/RE13 AN14/RPI94/RE14 AN15/RPI95/RE15 SDA2/RPI24/RA8 FLT32/SCL2/RP36/RB4 27 AN12/C2IN2-(3)/U2RTS/BCLK2/RE12 (3) 26 VDD 23 AN8/C3IN1+/U1RTS/BCLK1/FLT3/RC2 25 22 AN7/C3IN1-/C4IN1-/RC1 VSS 21 AN6/OA3OUT/C4IN1+/OCFB/RC0 24 20 AVSS AN11/C1IN2- /U1CTS/FLT4/RC11 19 AVDD (3) 18 36 35 34 33 17 13 14 15 16 PGED1/AN5/C1IN1-/RP35/RB3 VDD AN10/RPI28/RA12 AN9/RPI27/RA11 AN0/OA2OUT/RA0 AN1/C2IN1+/RA1 PGED3/VREF-/AN2/C2IN1-/SS1/RPI32/CTED2/RB0 PGEC3/VREF+/AN3/OA1OUT/RPI33/CTED1/RB1 1 2 3 PGEC1/AN4/C1IN1+/RPI34/RB2 TDI/RA7 RPI46/PWM1H/T3CK/RB14 RPI47/PWM1L/T5CK/RB15 RP118/RG6 RPI119/RG7 RP120/RG8 MCLR RPI121/RG9 VSS 64 64-Pin TQFP TCK/CVREF1O/ASCL1/RP40/T4CK/RB8 RC13 RP39/INT0/RB7 RPI58/RC10 PGEC2/ASCL2/RP38/RB6 PGED2/ASDA2/RP37/RB5 RD8 VSS OSC2/CLKO/RC15 OSC1/CLKI/RC12 VDD SCL1/RPI53/RC5 SDA1/RPI52/RC4 SCK1/RPI51/RC3 SDI1/RPI25/RA9 CVREF2O/SDO1/RP20/T1CK/RA4 Note 1: The RPn/RPIn pins can be used by any remappable peripheral with some limitation. See Section 11.4 "Peripheral Pin Select" for available peripherals and for information on limitations. 2: Every I/O port pin (RAx-RGx) can be used as change notification (CNAx-CNGx). See Section 11.0 "I/ O Ports" for more information. 3: This pin is not available as an input when OPMODE (CMxCON<10>) = 1. DS70657D-page 16 Preliminary (c) 2011 Microchip Technology Inc. dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X, AND PIC24EPXXXGP/MC20X Pin Diagrams (Continued) 64-Pin QFN(4) TDO/RA10 RPI45/CTPLS/RB13 RPI44/RB12 RP43/RB11 RP42/RB10 RP97/RF1 RPI96/RF0 VDD VCAP RP57/RC9 RD6 RD5 RP56/RC8 RP55/RC7 RP54/RC6 TMS/ASDA1/RP41/RB9 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 4 5 6 7 8 9 10 11 12 45 44 43 42 41 40 39 38 37 dsPIC33EP64GP506 dsPIC33EP128GP506 dsPIC33EP256GP506 PIC24EP64GP206 PIC24EP128GP206 PIC24EP256GP206 22 23 24 25 26 27 28 29 30 31 32 AN7/C3IN1-/C4IN1-/RC1 AN8/C3IN1+/U1RTS/BCLK1/RC2 AN11/C1IN2-(3)/U1CTS/RC11 VSS VDD AN12/C2IN2-(3)/U2RTS/BCLK2/RE12 AN13/C3IN2-(3)/U2CTS/RE13 AN14/RPI94/RE14 AN15/RPI95/RE15 SDA2/RPI24/RA8 SCL2/RP36/RB4 20 AVSS 21 19 AVDD AN6/OA3OUT/C4IN1+/OCFB/RC0 18 36 35 34 33 17 13 14 15 16 PGED1/AN5/C1IN1-/RP35/RB3 VDD AN10/RPI28/RA12 AN9/RPI27/RA11 AN0/OA2OUT/RA0 AN1/C2IN1+/RA1 PGED3/VREF-/AN2/C2IN1-/SS1/RPI32/CTED2/RB0 PGEC3/VREF+/AN3/OA1OUT/RPI33/CTED1/RB1 1 2 3 PGEC1/AN4/C1IN1+/RPI34/RB2 TDI/RA7 RPI46/T3CK/RB14 RPI47/T5CK/RB15 RP118/RG6 RPI119/RG7 RP120/RG8 MCLR RPI121/RG9 VSS 64 = Pins are up to 5V tolerant TCK/CVREF1O/ASCL1/RP40/T4CK/RB8 RC13 RP39/INT0/RB7 RPI58/RC10 PGEC2/ASCL2/RP38/RB6 PGED2/ASDA2/RP37/RB5 RD8 VSS OSC2/CLKO/RC15 OSC1/CLKI/RC12 VDD SCL1/RPI53/RC5 SDA1/RPI52/RC4 SCK1/RPI51/RC3 SDI1/RPI25/RA9 CVREF2O/SDO1/RP20/T1CK/RA4 Note 1: The RPn/RPIn pins can be used by any remappable peripheral with some limitation. See Section 11.4 "Peripheral Pin Select" for available peripherals and for information on limitations. 2: Every I/O port pin (RAx-RGx) can be used as change notification (CNAx-CNGx). See Section 11.0 "I/ O Ports" for more information. 3: This pin is not available as an input when OPMODE (CMxCON<10>) = 1. 4: The metal pad at the bottom of the device is not connected to any pins and is recommended to be connected to VSS externally. (c) 2011 Microchip Technology Inc. Preliminary DS70657D-page 17 dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X, AND PIC24EPXXXGP/MC20X Pin Diagrams (Continued) 64-Pin QFN(4) TDO/RA10 RPI45/PWM2L/CTPLS/RB13 RPI44/PWM2H/RB12 RP43/PWM3L/RB11 RP42/PWM3H/RB10 RP97/RF1 RPI96/RF0 VDD VCAP RP57/RC9 RD6 RD5 RP56/RC8 RP55/RC7 RP54/RC6 TMS/ASDA1/RP41/RB9 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 4 5 6 7 8 9 10 11 12 45 44 43 42 41 40 39 38 37 dsPIC33EP64MC206/506 dsPIC33EP128MC206/506 dsPIC33EP256MC206/506 PIC24EP64MC206 PIC24EP128MC206 PIC24EP256MC206 22 23 24 25 26 27 28 29 30 31 32 AN7/C3IN1-/C4IN1-/RC1 AN8/C3IN1+/U1RTS/BCLK1/FLT3/RC2 AN11/C1IN2-(3)/U1CTS/FLT4/RC11 VSS VDD AN12/C2IN2-(3)/U2RTS/BCLK2/RE12 AN13/C3IN2-(3)/U2CTS/RE13 AN14/RPI94/RE14 AN15/RPI95/RE15 SDA2/RPI24/RA8 FLT32/SCL2/RP36/RB4 20 AVSS 21 19 AVDD AN6/OA3OUT/C4IN1+/OCFB/RC0 18 36 35 34 33 17 13 14 15 16 PGED1/AN5/C1IN1-/RP35/RB3 VDD AN10/RPI28/RA12 AN9/RPI27/RA11 AN0/OA2OUT/RA0 AN1/C2IN1+/RA1 PGED3/VREF-/AN2/C2IN1-/SS1/RPI32/CTED2/RB0 PGEC3/VREF+/AN3/OA1OUT/RPI33/CTED1/RB1 1 2 3 PGEC1/AN4/C1IN1+/RPI34/RB2 TDI/RA7 RPI46/PWM1H/T3CK/RB14 RPI47/PWM1L/T5CK/RB15 RP118/RG6 RPI119/RG7 RP120/RG8 MCLR RPI121/RG9 VSS = Pins are up to 5V tolerant TCK/CVREF1O/ASCL1/RP40/T4CK/RB8 RC13 RP39/INT0/RB7 RPI58/RC10 PGEC2/ASCL2/RP38/RB6 PGED2/ASDA2/RP37/RB5 RD8 VSS OSC2/CLKO/RC15 OSC1/CLKI/RC12 VDD SCL1/RPI53/RC5 SDA1/RPI52/RC4 SCK1/RPI51/RC3 SDI1/RPI25/RA9 CVREF2O/SDO1/RP20/T1CK/RA4 Note 1: The RPn/RPIn pins can be used by any remappable peripheral with some limitation. See Section 11.4 "Peripheral Pin Select" for available peripherals and for information on limitations. 2: Every I/O port pin (RAx-RGx) can be used as change notification (CNAx-CNGx). See Section 11.0 "I/O Ports" for more information. 3: This pin is not available as an input when OPMODE (CMxCON<10>) = 1. 4: The metal pad at the bottom of the device is not connected to any pins and is recommended to be connected to VSS externally. DS70657D-page 18 Preliminary (c) 2011 Microchip Technology Inc.