NOTE: For detailed information on purchasing options, contact your
local Allegro field applications engineer or sales representative.
Allegro MicroSystems, Inc. reserves the right to make, from time to time, revisions to the anticipated product life cycle plan
for a product to accommodate changes in production capabilities, alternative product availabilities, or market demand. The
information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no respon-
sibility for its use; nor for any infringements of patents or other rights of third parties which may result from its use.
Recommended Substitutions:
Dual Full-Bridge PWM Motor Driver
A2919
For existing customer transition, and for new customers or new appli-
cations, contact Allegro Sales.
Date of status change: May 3, 2010
Deadline for receipt of LAST TIME BUY orders: October 29, 2010
This part is in production but has been determined to be
LAST TIME BUY. This classification indicates that the product is
obsolete and notice has been given. Sale of this device is currently
restricted to existing customer applications. The device should not be
purchased for new design applications because of obsolescence in the
near future. Samples are no longer available.
Last T ime Buy
Description
The A2919 motor driver is designed to drive both windings
of a bipolar stepper motor or bidirectionally control two DC
motors. Both bridges are capable of sustaining 45 V and include
internal pulse width modulation (PWM) control of the output
current to 750 mA. The outputs have been optimized for a low
output-saturation voltage drop (less than 1.8 V total source
plus sink at 500 mA).
For PWM current control, the maximum output current is
determined by the user’s selection of a reference voltage
and sensing resistor. Two logic-level inputs select output
current limits of 0%, 41%, 67%, or 100% of the maximum
level. A PHASE input to each bridge determines load current
direction.
The bridges include both ground clamp and flyback diodes for
protection against inductive transients. Internally generated
delays prevent crossover currents when switching current
direction. Special power-up sequencing is not required. Thermal
protection circuitry disables the outputs if the chip temperature
exceeds safe operating limits.
29319.21G
Features and Benefits
▪ 750 mA continuous output current
▪ 45 V output sustaining voltage
▪ Internal clamp diodes
▪ Internal PWM current control
▪ Low output saturation voltage
▪ Internal thermal shutdown circuitry
▪ Half- or quarter-step operation of bipolar stepper motors
Dual Full-Bridge PWM Motor Driver
Continued on the next page…
Package: 24-pin SOIC with exposed
thermal tabs (suffix LB)
PWM Control Circuitry
Not to scale
A2919
V
REF1
Dwg. EP-007-3
V
LOAD SUPPLY
BB
SENSE
1
ONE
SHOT SOURCE
DISABLE
RC
1
–
+
I
01
I
1
w10
E
1
OUT1A
OUT1B
Channel 1
pin numbers
shown
RC
RSRT
CCCT
24
60 k7
120 k742 k7
14
1
7
16
15
9
13
12
10
Dual Full-Bridge PWM Motor Driver
A2919
2
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Description (continued)
Selection Guide
Part Number Packing Package
A2919SLBTR-T 1000 pieces per reel 24-pin SOICW with exposed thermal tabs
Absolute Maximum Ratings
Characteristic Symbol Notes Rating Units
Logic Supply Voltage VCC 7.0 V
Logic Input Voltage Range VIN –0.3 to VCC+0.3 V
Motor Supply Voltage VBB 45 V
Output Emitter Voltage VE1.5 V
Output Current IOUT
Output current rating may be limited by duty cycle,
ambient temperature, and heat sinking. Under any
set of conditions, do not exceed the specifi ed peak
current rating or a junction temperature of +150°C.
Peak, tw ≤ 20 μs±1.0 A
Continuous ±750 mA
Package Power Dissipation PDSee graph – –
Operating Ambient Temperature TARange S –20 to 85 ºC
Maximum Junction Temperature TJ(max) 150 ºC
Storage Temperature Tstg –55 to 150 ºC
The A2919 is supplied in a 24-pin surface-mountable SOICW with
heat sinkable tabs for improved power dissipation capabilities .
This batwing construction provides for maximum package power
dissipation in the smallest possible construction. The A2919 is
available for operation from -20°C to 85°C, and are also available
on special order for operation to +125°C.
50 75 100 125 150
5
1
0
ALLOWABLE PACKAGE POWER DISSIPATION IN WATTS
TEMPERATURE IN oC
4
3
2
25
Dwg. GP-049A
R = 6.0oC/W
QJT
SUFFIX 'LB', R = 55oC/W
QJA
Pin-out Diagram
V
BB
1
2
3
4
5
6
7
8
9
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
GROUND
GROUND GROUND
GROUND
02
I
12
I
PHASE
2
V
REF 2
2
RC
V
CC
1
RC
V
REF 1
PHASE
1
11
I
2B
OUT
SENSE
2
2
E
2A
OUT
1A
OUT
1
E
SENSE
1
1B
OUT
01
I
LOAD SUPPLY
G
IC SUPPLY
PWM 2
PWM 1
θ
1
θ
2
Dwg. PP-047
2
1
Dual Full-Bridge PWM Motor Driver
A2919
3
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Limits
Characteristic Symbol Test Conditions Min. Typ. Max. Units
Output Drivers (OUTA or OUTB)
Motor Supply Range VBB Operating 10 — 45 V
Output Leakage Current ICEX V
OUT = VBB — < 1.0 50 μA
V
OUT = 0 — <-1.0 -50 μA
Output Sustaining Voltage VCE(sus) I
OUT = ±750 mA, L = 3.0 mH 45 + VF — — V
Output Saturation Voltage VCE(SAT) Sink Driver, IOUT = +500 mA — 0.4 0.6 V
Sink Driver, IOUT = +750 mA — 1.0 1.2 V
Source Driver, IOUT = -500 mA — 1.0 1.2 V
Source Driver, IOUT = -750 mA — 1.3 1.5 V
Clamp Diode Leakage Current IR V
R = 45 V — < 1.0 50 μA
Clamp Diode Forward Voltage VF I
F = 750 mA — 1.6 2.0 V
Driver Supply Current IBB(ON) Both Bridges ON, No Load — 20 25 mA
I
BB(OFF) Both Bridges OFF — 5.0 10 mA
Control Logic
Input Voltage VIN(1) All inputs 2.4 — — V
V
IN(0) All inputs — — 0.8 V
Input Current IIN(1) VIN = 2.4 V — <1.0 20 μA
VIN = 0.8 V — - 3.0 -200 μA
Reference Voltage Range VREF 1.0 — 7.5 V
Current Limit Threshold VREF /V
SENSE I
0 = I1 = 0.8 V, VREF = 1.0 V to 7.5 V 9.5 10 10.5 —
I
0 = 2.4 V, I1 = 0.8 V, 13.5 15 16.5 —
V
REF = 1.5 V to 7.5 V
I
0 = 0.8 V, I1 = 2.4 V, 20.7 24.4 28.0 —
V
REF = 1.5 V to 7.5 V
Thermal Shutdown Temperature TJ — 170 — °C
Total Logic Supply Current ICC(ON) I0 = I1 = 0.8 V, No Load — 40 50 mA
I
CC(OFF) I
0 = I1 = 2.4 V, No Load — 10 12 mA
Total Reference Current IREF1 + IREF2 V
REF1 = VREF2 = 7.5 V, I0 = I1 = 2.4 V 140 185 250 μA
Fixed Off-Time toff R
T = 56 k, CT = 820 pF — 46 — μs
ELECTRICAL CHARACTERISTICS at TA = +25°C, TJ 150°C, VBB = 45 V, VCC = 4.75 V to 5.25 V,
VREF = 5.0 V (unless otherwise noted).
(at trip point)
Dual Full-Bridge PWM Motor Driver
A2919
4
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
APPLICATIONS INFORMATION
PWM CURRENT CONTROL
The A2919 dual bridges are designed to drive both windings
of a bipolar stepper motor. Output current is sensed and
controlled independently in each bridge by an external
sense resistor (RS), internal comparator, and monostable
multivibrator.
When the bridge is turned ON, current increases in the motor
winding and fl ows through the external sense resistor until
the sense voltage (VS) reaches the level set at the comparator
input:
ITRIP = VREF/10 RS
The comparator then triggers the monostable, which turns off
the source driver of the bridge. The actual load current peak
will be slightly higher than the trip point (especially for low-
inductance loads) because of the internal logic and switching
delays. This delay (td) is typically 2 μs. After turn-off, the
motor current decays, circulating through the ground-clamp
diode and sink transistor. The source driver off-time (and
therefore the magnitude of the current decrease) is determined
by the monostable external RC timing components, where
toff = RTCT within the range of 20 kΩ to 100 kΩ and
100 pF to 1000 pF.
The fi xed off-time should be short enough to keep the current
chopping above the audible range (< 46 μs) and long enough
to properly regulate the current. Because only slow-decay
current control is available, short off times (< 10 μs) require
additional efforts to ensure proper current regulation. Factors
that can negatively affect the ability to properly regulate the
current when using short off times include: higher motor-
supply voltage, light load, and longer than necessary blank
time.
When the source driver is re-enabled, the winding current (the
sense voltage) is again allowed to rise to the comparator’s
threshold. This cycle repeats itself, maintaining the average
motor winding current at the desired level.
Loads with high distributed capacitances may cause current
spikes capable of tripping the comparator, resulting in
erroneous current control. An external RCCC time delay should
be used to delay the action of the comparator. Depending on
load type, many applications will not require these external
components (SENSE connected to E).
PWM OUTPUT CURRENT WAVE FORM
LOAD CURRENT PATHS
Dwg. EP -006-1
RS
BB
V
BRIDGE ON
SOURCE OFF
ALL OFF
+
–
0
Dwg. WM-003-1A
V
PHASE
I
OUT
t
d
t
off
I
TRIP
Dual Full-Bridge PWM Motor Driver
A2919
5
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
LOGIC CONTROL OF OUTPUT CURRENT
Two logic level inputs (l0 and I1) allow digital selection of
the motor winding current at 100%, 67%, 41%, or 0% of the
maximum level per the table. The 0% output current condition
turns off all drivers in the bridge and can be used as an output
enable function.
CURRENT-CONTROL TRUTH TABLE
l0 I
1 Output Current
L L VREF/10 RS = 100% ITRIP
H L VREF/15 RS = 67% ITRIP
L H VREF/24.4 RS = 41% ITRIP
H H 0
These logic level inputs greatly enhance the implementation of
μP-controlled drive formats.
During half-step operations, l0 and l1 allow the μP to control the
motor at a constant torque between all positions in an eight-step
sequence. This is accomplished by digitally selecting 100%
drive current when only one phase is on and 67% drive current
when two phases are on. Logic highs on both l0 and l1 turn off all
drivers to allow rapid current decay.
During quarter-step operation, I0 and I1 allow the μP to
control the motor position in a sixteen-step sequence. This is
accomplished by digitally selecting drive current as shown in the
table (for one quadrant of operation). Logic highs on both I0 and
I1 turn off all drivers to allow rapid current decay.
The logic control inputs can also be used to select a reduced
current level (and reduced power dissipation) for ‘hold’
conditions and/or increased current (and available torque) for
start-up conditions.
QUARTER-STEPPING CURRENT CONTROL
Phase 1 Phase 2
Current Level Current Level
100% 0%
100% 41%
67% 67%
41% 100%
0% 100%
GENERAL
The PHASE input to each bridge determines the direction
motor winding current fl ows. An internally generated deadtime
(approximately 2 μs) prevents crossover currents that can occur
when switching the PHASE input.
All four drivers in the bridge output can be turned off between
steps (l0 = l1 ž 2.4 V) resulting in a fast current decay through
the internal output clamp and fl yback diodes. The fast current
decay is desirable in half-step and high-speed applications. The
PHASE, l0, and I1 inputs fl oat high.
Varying the reference voltage (VREF) provides continuous control
of the peak load current for micro-stepping applications.
Thermal protection circuitry turns off all drivers when the
junction temperature reaches +170°C. It is only intended
to protect the device from failures due to excessive junction
temperature and should not imply that output short circuits are
permitted. The output drivers are re-enabled when the junction
temperature cools to +145°C.
The A2919 output drivers are optimized for low output
saturation voltages—less than 1.8 V total (source plus sink) at
500 mA. Under normal operating conditions, when combined
with the excellent thermal properties of the batwing package
design, this allows continuous operation of both bridges
simultaneously at 500 mA.
TRUTH TABLE
PHASE OUTA OUTB
H H L
L L H
Dual Full-Bridge PWM Motor Driver
A2919
6
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
TYPICAL APPLICATION
FROM
μP
V
REF
Dwg. EP-008B1
V
BB
FROM
μP
1
2
3
4
5
6
7
8
9
24
23
22
21
20
19
18
17
16
15
14
1312
11
10
9
θ
2
V
CC
2
V
BB
1
V
REF
+5 V
STEPPER
MOTOR
R
S
R
S
R
C
R
C
R
T
C
T
C
C
C
C
+
PWM 1
PWM 2
θ
1
820 pF 56 kΩ
C
T
820 pF
56 kΩ
R
T
Dual Full-Bridge PWM Motor Driver
A2919
7
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Copyright ©1994-2008, Allegro MicroSystems, Inc.
The products described here are manufactured under one or more U.S. patents or U.S. patents pending.
Allegro MicroSystems, Inc. reserves the right to make, from time to time, such de par tures from the detail spec i fi ca tions as may be required to per-
mit improvements in the per for mance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the
information being relied upon is current.
Allegro’s products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the
failure of that life support device or system, or to affect the safety or effectiveness of that device or system.
The in for ma tion in clud ed herein is believed to be ac cu rate and reliable. How ev er, Allegro MicroSystems, Inc. assumes no re spon si bil i ty for its use;
nor for any in fringe ment of patents or other rights of third parties which may result from its use.
For the latest version of this document, visit our website:
www.allegromicro.com
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
LB Package, 24-pin SOIC
BReference pad layout (reference IPC SOIC127P1030X265-24M)
All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary
to meet application process requirements and PCB layout tolerances
2.20
0.65
9.60
1.27
21
24
A
15.40
2.65 MAX
0.20
1.27
10.30
7.50
C
SEATING
PLANE
0.41
C0.10
16X
All dimensions nominal, not for tooling use
Dimensions in millimeters
Pins 6 and 7, and 18 and 19 internally fused
(Reference JEDEC MS-013 AD)
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
ATerminal #1 mark area
4º
0.27
0.84
0.25
GAUGE PLANE
SEATING PLANE
PCB Layout Reference View
