
AUIRFR/U8403
2 2017-10-03
Notes:
Calculated continuous current based on maximum allowable junction temperature. Bond wire current limit is 100A by source
bonding technology. Note that current limitations arising from heating of the device leads may occur with some lead mounting
arrangements. (Refer to AN-1140)
Repetitive rating; pulse width limited by max. junction temperature. (See fig. 11)
Limited by TJmax , starting TJ = 25°C, L = 0.039mH, RG = 50, IAS = 76A, VGS =10V. Part not recommended for use above this value.
ISD 76A, di/dt 1255A/µs, VDD V(BR)DSS, TJ 175°C.
Pulse width 400µs; duty cycle 2%.
Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS.
Coss eff. (ER) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 to 80% VDSS.
When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to
application note #AN-994
Ris measured at TJ approximately 90°C.
Pulse drain current is limited by source bonding technology.
Static @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 40 ––– ––– V VGS = 0V, ID = 250µA
V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient ––– 0.03 ––– V/°C Reference to 25°C, ID = 5mA
RDS(on) Static Drain-to-Source On-Resistance ––– 2.4 3.1 m VGS = 10V, ID = 76A
VGS(th) Gate Threshold Voltage 2.2 3.0 3.9 V VDS = VGS, ID = 100µA
IDSS Drain-to-Source Leakage Current ––– ––– 1.0 µA VDS = 40V, VGS = 0V
––– ––– 150 VDS = 40V,VGS = 0V,TJ =125°C
IGSS Gate-to-Source Forward Leakage ––– ––– 100 nA VGS = 20V
Gate-to-Source Reverse Leakage ––– ––– -100 VGS = -20V
RG Internal Gate Resistance ––– 1.5 –––
Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
gfs Forward Trans conductance 283 ––– ––– S VDS = 10V, ID = 76A
Qg Total Gate Charge ––– 66 99
nC
ID = 76A
Qgs Gate-to-Source Charge ––– 18 ––– VDS = 20V
Qgd Gate-to-Drain Charge ––– 22 ––– VGS = 10V
Qsync Total Gate Charge Sync. (Qg - Qgd) ––– 44 –––
td(on) Turn-On Delay Time ––– 10 –––
ns
VDD = 26V
tr Rise Time ––– 32 ––– ID = 76A
td(off) Turn-Off Delay Time ––– 31 ––– RG = 2.7
tf Fall Time ––– 23 ––– VGS = 10V
Ciss Input Capacitance ––– 3171 –––
pF
VGS = 0V
Coss Output Capacitance ––– 477 ––– VDS = 25V
Crss Reverse Transfer Capacitance ––– 331 ––– ƒ = 1.0MHz, See Fig. 5
Coss eff. (ER) Effective Output Capacitance (Energy Related) ––– 573 ––– VGS = 0V, VDS = 0V to 32V
Coss eff. (TR) Effective Output Capacitance (Time Related) ––– 681 ––– VGS = 0V, VDS = 0V to 32V
Diode Characteristics
Parameter Min. Typ. Max. Units Conditions
IS Continuous Source Current ––– ––– 127
A
MOSFET symbol
(Body Diode) showing the
ISM Pulsed Source Current ––– ––– 520 integral reverse
(Body Diode) p-n junction diode.
VSD Diode Forward Voltage ––– 0.9 1.3 V TJ = 25°C,IS = 76A,VGS = 0V
dv/dt Peak Diode Recovery dv/dt ––– 5.1 –––
V/ns TJ = 175°C,IS = 76A,VDS = 40V
trr Reverse Recovery Time ––– 25 ––– ns TJ = 25°C
––– 26 ––– TJ = 125°C
Qrr Reverse Recovery Charge ––– 20 –––
nC TJ = 25°C
––– 21 ––– TJ = 125°C
IRRM Reverse Recovery Current ––– 1.2 ––– A TJ = 25°C
VR = 34V,
IF = 76A
di/dt = 100A/µs