This is information on a product in full production.
May 2012 Doc ID 6942 Rev. 4 1/46
1
VN750
High-side driver
Datasheet − production data
Features
■CMOS compatible input
■On-state open-load detection
■Off-state open-load detection
■Shorted load protection
■Undervoltage and overvoltage shutdown
■Protection against loss of ground
■Very low standby current
■Reverse battery protection
Description
The VN750 is a monolithic device designed using
STMicroelectronic® VIPower® M0-3 technology.
The VN750 is intended for driving any type of load
with one side connected to ground. The active
VCC pin voltage clamp protects the device against
low energy spikes.
Active current limitation combined with thermal
shutdown and automatic restart protect the device
against overload. The device detects the open-
load condition in both the on-state and
off-state. In the off-state the device detects if the
output is shorted to VCC. The device automatically
turns off where the ground pin becomes
disconnected.
Type RDS(on) IOUT VCC
VN750
VN750S
VN750PT
VN750-B5
60 mΩ6 A 36 V
SO-8
P2PAK
PENTAWATT
PPAK
Table 1. Device summary
Package Order codes
Tube Tape and reel
PENTAWATT VN750 —
SO-8 VN750S VN750S13TR
P2PAK VN750-B5 VN750-B513TR
PPAK VN750PT VN750PT13TR
www.st.com
Contents VN750
2/46 Doc ID 6942 Rev. 4
Contents
1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
2.5 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 19
2.5.1 Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 19
2.5.2 Solution 2: diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . 20
2.6 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
2.7 MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
2.8 Open-load detection in Off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
2.9 SO-8 maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . 22
2.10 PPAK/P2PAK maximum demagnetization energy (VCC = 13.5V) . . . . . . 23
3 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
3.1 SO-8 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
3.2 P2PAK thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
3.3 PPAK thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
4 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
4.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
4.2 SO-8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
4.3 PENTAWATT mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
4.4 P2PAK mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
4.5 PPAK mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
4.6 SO-8 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
4.7 PENTAWATT packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
4.8 P2PAK packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
4.9 PPAK packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
VN750 Contents
Doc ID 6942 Rev. 4 3/46
5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
List of tables VN750
4/46 Doc ID 6942 Rev. 4
List of tables
Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 4. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 5. Power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 6. Switching (VCC = 13 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 7. Input pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 8. VCC output diode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 9. Status pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 10. Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 11. Open-load detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 12. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Table 13. Electrical transient requirements on VCC pin (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 14. Electrical transient requirements on VCC pin (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 15. Electrical transient requirements on VCC pin (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 16. Thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Table 17. Thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Table 18. Thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Table 19. SO-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Table 20. PENTAWATT mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Table 21. P2PAK mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Table 22. PPAK mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Table 23. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
VN750 List of figures
Doc ID 6942 Rev. 4 5/46
List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 4. Status timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 5. Switching time waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 6. Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 7. Off-state output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 8. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 9. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 10. Status leakage current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 11. Status low output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 12. Status clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 13. On-state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 14. On-state resistance vs VCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 15. Open-load On-state detection threshold. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 16. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 17. Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 18. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 19. Overvoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 20. Open-load Off-state voltage detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 21. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 22. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 23. Ilim vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 24. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 25. Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 26. SO-8 maximum turn-off current versus inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 27. PPAK /P2PAK maximum turn-off current versus inductance . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 28. SO-8 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 29. Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 30. SO-8 thermal impedance junction ambient single pulse. . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 31. Thermal fitting model of a single channel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 32. P2PAK PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 33. Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . . 27
Figure 34. P2PAK thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . 27
Figure 35. Thermal fitting model of a single channel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Figure 36. PPAK PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 37. Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 38. PPAK thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 39. Thermal fitting model of a single channel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 40. SO-8 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Figure 41. PENTAWATT package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Figure 42. P2PAK package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Figure 43. PPAK package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Figure 44. SO-8 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Figure 45. SO-8 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Figure 46. PENTAWATT tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Figure 47. P2PAK tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Figure 48. P2PAK tape and reel (suffix “13TR”). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
List of figures VN750
6/46 Doc ID 6942 Rev. 4
Figure 49. PPAK suggested pad layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Figure 50. PPAK tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Figure 51. PPAK tape and reel (suffix “13TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
VN750 Block diagram and pin description
Doc ID 6942 Rev. 4 7/46
1 Block diagram and pin description
Figure 1. Block diagram
Figure 2. Configuration diagram (top view)
Table 2. Suggested connections for unused and not connected pins
Connection / pin Status N.C. Output Input
Floating X X X X
To ground X Through 10KΩ resistor
UNDERVOLTAGE
OVERTEMPERATURE
VCC
GND
INPUT
OUTPUT
OVERVOLTAGE
CURRENT LIMITER
LOGIC
DRIVER
Power CLAMP
STATUS
VCC
CLAMP
ON STATE OPENLOAD
OFF STATE OPENLOAD
AND OUTPUT SHORTED TO VCC
DETECTION
DETECTION
DETECTION
DETECTION
DETECTION
5
4
3
2
1
PC10000
SO-8
OUTPUT
STATUS
V
CC
INPUT
GND
V
CC
V
CC
OUTPUT
OUTPUT
N.C.
GND
STATUS
INPUT
1
4
5
8
5
4
3
2
1
PPAK / P2PAK PENTAWATT
OUTPUT
STATUS
V
CC
INPUT
GND
Electrical specifications VN750
8/46 Doc ID 6942 Rev. 4
2 Electrical specifications
Figure 3. Current and voltage conventions
2.1 Absolute maximum ratings
Stressing the device above the rating listed in the Ta b l e 3 may cause permanent damage to
the device. These are stress ratings only and operation of the device at these or any other
conditions above those indicated in the operating sections of this specification is not implied.
Exposure to Absolute maximum rating conditions for extended periods may affect device
reliability.
INPUT
IS
IIN
VIN
VCC
STATUS
ISTAT
VSTAT
GND
VCC
IOUT
VOUT
IGND
OUTPUT
V
F
Table 3. Absolute maximum ratings
Symbol Parameter Value Unit
SO-8 PENTAWATT P2PAK PPAK
VCC DC supply voltage 41 V
-VCC Reverse DC supply voltage -0.3 V
-Ignd DC reverse ground pin current -200 mA
IOUT DC output current Internally limited A
-IOUT Reverse DC output current -6 A
IIN DC input current +/- 10 mA
ISTAT DC Status current +/- 10 mA
VESD
Electrostatic discharge
(human body model: R = 1.5 KΩ;
C = 100 pF)
–INPUT
–STATUS
–OUTPUT
–V
CC
4000
4000
5000
5000
V
V
V
V
VN750 Electrical specifications
Doc ID 6942 Rev. 4 9/46
2.2 Thermal data
Symbol Parameter Value Unit
SO-8 PENTAWATT P2PAK PPAK
EMAX
Maximum switching energy
(L = 1.8 mH; RL=0Ω;
Vbat = 13.5 V; Tjstart =150°C;
IL=9A)
100 mJ
EMAX
Maximum switching energy
(L = 2.46 mH; RL=0Ω;
Vbat = 13.5 V; Tjstart =150°C;
IL=9A)
138 138 mJ
Ptot Power dissipation TC= 25°C 4.2 60 60 60 W
TjJunction operating temperature Internally limited °C
TcCase operating temperature -40 to 150 °C
Tstg Storage temperature -55 to 150 °C
Table 3. Absolute maximum ratings (continued)
Table 4. Thermal data
Symbol Parameter Max. value Unit
S0-8 PENTAWATT P2PAK PPAK
Rthj-case Thermal resistance junction-case - 2.1 2.1 2.1 °C/W
Rthj-lead Thermal resistance junction-lead 30 - - - °C/W
Rthj-amb Thermal resistance junction-ambient 93(1)
1. When mounted on a standard single-sided FR-4 board with 0.5 cm2 of Cu (at least 35 µm thick) connected
to all VCC pins. Horizontal mounting and no artificial air flow.
62.1 52.1(2)
2. When mounted on a standard single-sided FR-4 board with 0.5 cm2 of Cu (at least 35 µm thick). Horizontal
mounting and no artificial air flow.
77.1(2) °C/W
82(3)
3. When mounted on a standard single-sided FR-4 board with 2 cm2 of Cu (at least 35 µm thick) connected to
all VCC pins. Horizontal mounting and no artificial air flow.
62.1 37(4)
4. When mounted on a standard single-sided FR-4 board with 6 cm2 of Cu (at least 35 µm thick). Horizontal
mounting and no artificial air flow.
44(4) °C/W
Electrical specifications VN750
10/46 Doc ID 6942 Rev. 4
2.3 Electrical characteristics
Values specified in this section are for 8 V < VCC <36V; -40°C < Tj<150°C, unless
otherwise stated.
Table 5. Power
Symbol Parameter Test conditions Min. Typ. Max. Unit
VCC Operating supply voltage 5.5 13 36 V
VUSD Undervoltage shutdown 3 4 5.5 V
VUSDhyst
Undervoltage shutdown
hysteresis 0.5 V
VOV Overvoltage shutdown 36 V
RON On state resistance IOUT =2A; T
j=25°C; V
CC >8V 60 mΩ
IOUT =2A; V
CC > 8 V 120 mΩ
ISSupply current
Off-state; VCC =13V;
VIN =V
OUT =0V 10 25 µA
Off-state; VCC =13V;
VIN =V
OUT =0V; T
j= 25°C 10 20 µA
On-state; VCC =13V; V
IN =5V;
IOUT =0A 23.5mA
IL(off1) Off-state output current VIN =V
OUT = 0 V 0 50 µA
IL(off2) Off-state output current VIN =0V; V
OUT =3.5V -75 0 µA
IL(off3) Off-state output current VIN =V
OUT =0V; V
CC =13V;
Tj= 125°C 5µA
IL(off4) Off-state output current VIN =V
OUT =0V; V
CC =13V;
Tj=25°C 3µA
Table 6. Switching (VCC =13V)
Symbol Parameter Test conditions Min. Typ. Max. Unit
td(on) Turn-on delay time RL=6.5Ω from VIN rising edge to
VOUT = 1.3V 40 µs
td(off) Turn-off delay time RL = 6.5 Ω from VIN falling edge to
VOUT = 11.7 V 30 µs
dVOUT/dt(on) Turn-on voltage slope RL = 6.5 Ω from VOUT = 1.3 V to
VOUT=10.4 V See Figure 21 V/µs
dVOUT/dt(off) Turn-off voltage slope RL = 6.5 Ω from VOUT = 11.7 V to
VOUT=1.3 V See Figure 22 V/µs
Table 7. Input pin
Symbol Parameter Test conditions Min. Typ. Max. Unit
VIL Input low level 1.25 V
IIL Low level input current VIN = 1.25 V 1 µA
VIH Input high level 3.25 V
VN750 Electrical specifications
Doc ID 6942 Rev. 4 11/46
IIH High level input current VIN = 3.25 V 10 µA
Vhyst Input hysteresis voltage 0.5 V
VICL Input clamp voltage IIN = 1 mA 6 6.8 8 V
IIN = -1 mA -0.7 V
Table 8. VCC output diode
Symbol Parameter Test conditions Min. Typ. Max. Unit
VFForward on voltage -IOUT = 1.3 A; Tj = 150°C — — 0.6 V
Table 9. Status pin
Symbol Parameter Test conditions Min. Typ. Max. Unit
VSTAT Status low output voltage ISTAT =1.6mA 0.5 V
ILSTAT Status leakage current Normal operation; VSTAT =5V 10 µA
CSTAT Status pin input capacitance Normal operation; VSTAT = 5 V 100 pF
VSCL Status clamp voltage ISTAT =1mA 6 6.8 8 V
ISTAT =-1mA -0.7 V
Table 10. Protections(1)
1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related
diagnostic signals must be used together with a proper software strategy. If the device operates under
abnormal conditions this software must limit the duration and number of activation cycles.
Symbol Parameter Test conditions M in. Typ. Max. Unit
TTSD Shutdown temperature 150 175 200 °C
TRReset temperature 135 °C
Thyst Thermal hysteresis 7 15 °C
tSDL
Status delay in overload
condition Tj>T
jsh 20 ms
Ilim Current limitation 9V<V
CC <36V 6 9 15 A
5V<V
CC <36V 15 A
Vdemag
Turn-off output clamp
voltage
IOUT =2A; V
IN =0V;
L=6mH VCC - 41 VCC - 48 VCC - 55 V
Table 11. Open-load detection
Symbol Parameter Test conditions Min. Typ. Max. Unit
IOL
Open-load ON-state
detection threshold VIN = 5 V 50 200 mA
tDOL(on)
Open-load ON-state
detection delay IOUT = 0 A 200 µs
Table 7. Input pin (continued)
Symbol Parameter Test conditions Min. Typ. Max. Unit
Electrical specifications VN750
12/46 Doc ID 6942 Rev. 4
Figure 4. Status timings
Figure 5. Switching time waveforms
VOL
Open-load OFF-state
voltage detection threshold VIN = 0 V 1.5 3.5 V
tDOL(off)
Open-load detection delay
at turn-off 1000 µs
Table 11. Open-load detection (continued)
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
IN
V
STAT
t
DOL(off)
OPEN LOAD STATUS TIMING
(with external pull-up) OVERTEMP STATUS TIMING
I
OUT
< I
OL
V
OUT
> V
OL
t
DOL(on)
T
j
> T
jsh
V
IN
V
STAT
t
SDL
t
SDL
t
t
VOUT
VIN
80%
10%
dVOUT/dt(on)
td(off)
90%
dVOUT/dt(off)
td(on)
VN750 Electrical specifications
Doc ID 6942 Rev. 4 13/46
Table 12. Truth table
Conditions Input Output Status
Normal operation L
H
L
H
H
H
Current limitation
L
H
H
L
X
X
H
(Tj < TTSD) H
(Tj > TTSD) L
Overtemperature L
H
L
L
H
L
Undervoltage L
H
L
L
X
X
Overvoltage L
H
L
L
H
H
Output voltage > VOL
L
H
H
H
L
H
Output current < IOL
L
H
L
H
H
L
Electrical specifications VN750
14/46 Doc ID 6942 Rev. 4
Table 13. Electrical transient requirements on VCC pin (part 1)
ISO T/R 7637/1
Test pulse
Test levels
I II III IV Delays and
impedance
1 - 25 V - 50 V - 75 V - 100 V 2 ms 10 Ω
2 + 25 V + 50 V + 75 V + 100 V 0.2 ms 10 Ω
3a - 25 V - 50 V - 100 V - 150 V 0.1 µs 50 Ω
3b + 25 V + 50 V + 75 V + 100 V 0.1 µs 50 Ω
4 - 4 V - 5 V - 6 V - 7 V 100 ms, 0.01 Ω
5 + 26.5 V + 46.5 V + 66.5 V + 86.5 V 400 ms, 2 Ω
Table 14. Electrical transient requirements on VCC pin (part 2)
ISO T/R 7637/1
test pulse
Test levels results
I II III IV
1CCCC
2CCCC
3aCCCC
3bCCCC
4CCCC
5CEEE
Table 15. Electrical transient requirements on VCC pin (part 3)
Class Contents
C All functions of the device are performed as designed after exposure to disturbance.
EOne or more functions of the device is not performed as designed after exposure to
disturbance and cannot be returned to proper operation without replacing the device.
VN750 Electrical specifications
Doc ID 6942 Rev. 4 15/46
Figure 6. Waveforms
OPEN LOAD without external pull-up
STATUS
INPUT
NORMAL OPERATION
UNDERVOLTAGE
V
CC
V
USD
V
USDhyst
INPUT
OVERVOLTAGE
V
CC
V
CC
> V
OV
STATUS
INPUT
STATUS
STATUS
INPUT
STATUS
INPUT
OPEN LOAD with external pull-up
undefined
LOAD VOLTAGE
V
CC
<V
OV
LOAD VOLTAGE
LOAD VOLTAGE
LOAD VOLTAGE
LOAD VOLTAGE
OVERTEMPERATURE
INPUT
STATUS
T
TSD
T
R
T
j
LOAD CURRENT
V
OUT
> V
OL
V
OL
Electrical specifications VN750
16/46 Doc ID 6942 Rev. 4
2.4 Electrical characteristics curves
Figure 7. Off-state output current Figure 8. High level input current
Figure 9. Input clamp voltage Figure 10. Status leakage current
Figure 11. Status low output voltage Figure 12. Status clamp voltage
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC)
-1
-0.5
0
0.5
1
1.5
2
2.5
3
IL(off1) (uA)
Off state
Vcc=36V
Vin=Vout=0V
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC)
0
1
2
3
4
5
6
7
Iih (uA)
Vin=3.25V
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
6
6.2
6.4
6.6
6.8
7
7.2
7.4
7.6
7.8
8
Vicl (V)
Iin=1mA
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0
0.01
0.02
0.03
0.04
0.05
Ilstat (uA)
Vstat=5V
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC)
0
0.1
0.2
0.3
0.4
0.5
0.6
Vstat (V)
Istat=1.6mA
VN750 Electrical specifications
Doc ID 6942 Rev. 4 17/46
Figure 13. On-state resistance vs Tcase Figure 14. On-state resistance vs VCC
Figure 15. Open-load On-st ate detection
threshold Figure 16. Input high level
Figure 17. Input low level Figure 18. Input hysteresi s voltage
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC)
0
20
40
60
80
100
120
140
Ron (mOhm)
Iout=2A
Vcc=8V; 13V; 36V
5 10152025303540
Vcc (V)
20
30
40
50
60
70
80
90
100
110
120
Ron (mOhm)
Iout=2A
Tc= - 40°C
Tc= 25°C
Tc= 125°C
Tc= 150°C
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC)
0
20
40
60
80
100
120
140
160
180
200
220
Iol (mA)
Vcc=13V
Vin=5 V
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC)
2
2.2
2.4
2.6
2.8
3
3.2
3.4
3.6
Vih (V)
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC)
1
1.2
1.4
1.6
1.8
2
2.2
2.4
2.6
2.8
Vil (V)
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC)
0.5
0.6
0.7
0.8
0.9
1
1.1
1.2
1.3
1.4
1.5
Vhyst (V)
Electrical specifications VN750
18/46 Doc ID 6942 Rev. 4
Figure 19. Overvoltage shutdown Figure 20. Open-load Off-state voltage
detection threshold
Figure 21. Turn-on voltage slope Figure 22. Turn-off voltage slope
Figure 23. Ilim vs Tcase
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
30
32
34
36
38
40
42
44
46
48
50
Vov (V)
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC)
1
1.5
2
2.5
3
3.5
4
4.5
5
Vol (V)
Vin=0V
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC)
0
100
200
300
400
500
600
700
800
900
1000
dVout/dt/(on) (V/ms)
Vcc=13V
Rl=6.5Ohm
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC)
0
50
100
150
200
250
300
350
400
450
500
dVout/dt(off) (V/ms)
Vcc=13V
Rl=6.5Ohm
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC)
0
2
4
6
8
10
12
14
16
18
20
Ilim (A)
Vcc=13V
VN750 Electrical specifications
Doc ID 6942 Rev. 4 19/46
Figure 24. Application schematic
2.5 GND protection network against reverse battery
2.5.1 Solution 1: resistor in the ground line (R GND only)
This can be used with any type of load.
The following is an indication on how to size the RGND resistor.
1. RGND ≤ 600 mV / (IS(on)max).
2. RGND ≥ (-VCC) / (-IGND)
where -IGND is the DC reverse ground pin current and can be found in the absolute
maximum rating section of the device datasheet.
Power dissipation in RGND (when VCC < 0: during reverse battery situations) is:
PD= (-VCC)2/ RGND
This resistor can be shared amongst several different HSDs. Please note that the value of
this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the
maximum on-state currents of the different devices.
Please note that if the microprocessor ground is not shared by the device ground then the
RGND produces a shift (IS(on)max * RGND) in the input thresholds and the status output
values. This shift varies depending on how many devices are ON in case of several high
side drivers sharing the same RGND.
If the calculated power dissipation leads to a large resistor or several devices have to share
the same resistor then ST suggests to utilize Solution 2 (see below).
V
CC
GND
OUTPUT
D
GND
R
GND
D
ld
μ
C
+5V
R
prot
V
GND
STATUS
INPUT
+5V
R
prot
Electrical specifications VN750
20/46 Doc ID 6942 Rev. 4
2.5.2 Solution 2: diode (D GND) in the ground line
A resistor (RGND = 1 kΩ) should be inserted in parallel to DGND if the device drives an
inductive load.
This small signal diode can be safely shared amongst several different HSDs. Also in this
case, the presence of the ground network produces a shift (≈600 mV) in the input threshold
and in the status output values if the microprocessor ground is not common to the device
ground. This shift does not vary if more than one HSD shares the same diode/resistor
network.
Series resistor in INPUT and STATUS lines are also required to prevent that, during battery
voltage transient, the current exceeds the absolute maximum rating.
The safest configuration for unused INPUT and STATUS pin is to leave them unconnected.
2.6 Load dump protection
Dld is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the
VCC max DC rating. The same applies if the device is subject to transients on the VCC line
that are greater than the ones shown in the ISO 7637-2: 2004(E) table.
2.7 MCU I/Os protection
If a ground protection network is used and negative transient are present on the VCC line,
the control pins are pulled negative. ST suggests to insert a resistor (Rprot) in line to prevent
the microcontroller I/O pins from latching-up.
The value of these resistors is a compromise between the leakage current of microcontroller
and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of
microcontroller I/Os.
-VCCpeak/Ilatchup ≤ Rprot ≤ (VOHµC-VIH-VGND) / IIHmax
Calculation example:
For VCCpeak= - 100V and Ilatchup ≥ 20mA; VOHµC ≥ 4.5V
5kΩ ≤ Rprot ≤ 65kΩ.
Recommended values: Rprot =10kΩ .
2.8 Open-load detection in Off -state
Off-state open-load detection requires an external pull-up resistor (RPU) connected between
OUTPUT pin and a positive supply voltage (VPU) like the +5V line used to supply the
microprocessor.
The external resistor has to be selected according to the following requirements:
1. No false open-load indication when load is connected: in this case we have to avoid
VOUT to be higher than VOlmin; this results in the following condition
VOUT= (VPU / (RL+RPU)) RL < VOlmin.
2. No misdetection when load is disconnected: in this case the VOUT has to be higher than
VOLmax; this results in the following condition RPU < (VPU – VOLmax) / IL(off2).
VN750 Electrical specifications
Doc ID 6942 Rev. 4 21/46
Because Is(OFF) may significantly increase if Vout is pulled high (up to several mA), the pull-
up resistor RPU should be connected to a supply that is switched OFF when the module is in
standby.
The values of VOLmin, VOLmax and IL(off2) are available in the electrical characteristics
section.
Figure 25. Open-load detection in off-state
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Electrical specifications VN750
22/46 Doc ID 6942 Rev. 4
2.9 SO-8 maximum demagnetization energy (VCC = 13.5V)
Figure 26. SO-8 maximum turn-off current versus inductance
1. Values are generated with RL = 0 Ω.In case of repetitive pulses, Tjstart (at the beginning of each
demagnetization) of every pulse must not exceed the temperature specified above for curves A and B.
C: Tjstart = 125°C repetitive pulse
A: Tjstart = 150°C single pulse
B: Tjstart = 100°C repetitive pulse
Demagnetization Demagnetization Demagnetization
t
VIN, IL
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VN750 Electrical specifications
Doc ID 6942 Rev. 4 23/46
2.10 PPAK/P
2
PAK maximum demagnetization energy (V
CC
= 13.5V)
Figure 27. PPAK /P2PAK maximum turn-off current versus inductance
1. Values are generated with RL =0 Ω.In case of repetitive pulses, Tjstart (at the beginning of each
demagnetization) of every pulse must not exceed the temperature specified above for curves A and B.
C: Tjstart = 125°C repetitive pulse
A: Tjstart = 150°C single pulse
B: Tjstart = 100°C repetitive pulse
Demagnetization Demagnetization Demagnetization
t
VIN, IL
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Package and PCB thermal data VN750
24/46 Doc ID 6942 Rev. 4
3 Package and PCB thermal data
3.1 SO-8 thermal data
Figure 28. SO-8 PC board
1. Layout condition of Rth and Zth measurements (PCB FR4 area = 58 mm x 58 mm,PCB thickness = 2 mm,
Cu thickness = 35 μm , Copper areas: 0.14 cm2, 0.8 cm2, 2 cm2).
Figure 29. Rthj-amb vs PCB copper area in open box free air condition
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VN750 Package and PCB thermal data
Doc ID 6942 Rev. 4 25/46
Figure 30. SO-8 thermal impedance junction ambient single pulse
Equation 1: pulse calculation formula
where δ = tP/T
Figure 31. Thermal fitting mode l of a si ngle channel
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Package and PCB thermal data VN750
26/46 Doc ID 6942 Rev. 4
3.2 P2PAK therma l data
Figure 32. P2PAK PC board
1. Layout condition of Rth and Zth measurements (PCB FR4 area = 60 mm x 60 mm, PCB thickness = 2 mm,
Cu thickness = 35 μm , Copper areas: 0.97 cm2, 8 cm2).
Table 16. Thermal parameter
Area/island (cm2)0.52
R1 (°C/W) 0.05
R2 (°C/W) 0.8
R3 (°C/W) 3.5
R4 (°C/W) 21
R5 (°C/W) 16
R6 (°C/W) 58 28
C1 (W·s/°C) 0.006
C2 (W·s/°C) 0.0026
C3 (W·s/°C) 0.0075
C4 (W·s/°C) 0.045
C5 (W·s/°C) 0.35
C6 (W·s/°C) 1.05 2
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VN750 Package and PCB thermal data
Doc ID 6942 Rev. 4 27/46
Figure 33. Rthj-amb vs PCB copper area in open box free air condition
Figure 34. P2PAK thermal impedance junction ambient single pulse
Equation 2: pulse calculation formula
where δ = tP/T
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Package and PCB thermal data VN750
28/46 Doc ID 6942 Rev. 4
Figure 35. Thermal fitting mode l of a si ngle channel
Table 17. Thermal parameter
Area/island (cm2)0.56
R1 (°C/W) 0.15
R2 (°C/W) 0.7
R3 (°C/W) 0.7
R4 (°C/W) 4
R5 (°C/W) 9
R6 (°C/W) 37 22
C1 (W·s/°C) 0.0006
C2 (W·s/°C) 0.0025
C3 (W·s/°C) 0.055
C4 (W·s/°C) 0.4
C5 (W·s/°C) 2
C6 (W·s/°C) 3 5
VN750 Package and PCB thermal data
Doc ID 6942 Rev. 4 29/46
3.3 PPAK thermal data
Figure 36. PPAK PC board
1. Layout condition of Rth and Zth measurements (PCB FR4 area = 60 mm x 60 mm, PCB thickness = 2 mm,
Cu thickness = 35 μm , Copper areas: 0.44 cm2, 8 cm2).
Figure 37. Rthj-amb vs PCB copper area in open box free air condition
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Package and PCB thermal data VN750
30/46 Doc ID 6942 Rev. 4
Figure 38. PPAK thermal impedance junction ambient single pulse
Equation 3: pulse calculation formula
where δ = tP/T
Figure 39. Thermal fitting mode l of a si ngle channel
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VN750 Package and PCB thermal data
Doc ID 6942 Rev. 4 31/46
Table 18. Thermal parameter
Area/island (cm2)0.56
R1 (°C/W) 0.15
R2 (°C/W) 0.7
R3 (°C/W) 1.6
R4 (°C/W) 2
R5 (°C/W) 15
R6 (°C/W) 61 24
C1 (W·s/°C) 0.0006
C2 (W·s/°C) 0.0025
C3 (W·s/°C) 0.08
C4 (W·s/°C) 0.3
C5 (W·s/°C) 0.45
C6 (W·s/°C) 0.8 5
Package and packing information VN750
32/46 Doc ID 6942 Rev. 4
4 Package and packing information
4.1 ECOPACK® packages
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
4.2 SO-8 package information
Figure 40. SO-8 package dimensions
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VN750 Package and packing information
Doc ID 6942 Rev. 4 33/46
Table 19. SO-8 mechanical data
Dim. mm
Min. Typ. Max.
A1.75
a1 0.1 0.25
a2 1.65
a3 0.65 0.85
b0.35 0.48
b1 0.19 0.25
C 0.25 0.5
c1 45 (typ.)
D4.8 5
E5.8 6.2
e1.27
e3 3.81
F3.8 4
L 0.4 1.27
M0.6
S 8 (max.)
L1 0.8 1.2
Package and packing information VN750
34/46 Doc ID 6942 Rev. 4
4.3 PENTAWATT mechanical data
Figure 41. PENTAWATT package dimensions
Table 20. PENTAWATT mechanical data
Dim. mm
Min. Typ. Max.
A4.8
C1.37
D2.4 2.8
D1 1.2 1.35
E0.35 0.55
F 0.8 1.05
F1 1 1.4
G 3.2 3.4 3.6
VN750 Package and packing information
Doc ID 6942 Rev. 4 35/46
G1 6.6 6.8 7
H2 10.4
H3 10.05 10.4
L 17.85
L1 15.75
L2 21.4
L3 22.5
L5 2.6 3
L6 15.1 15.8
L7 6 6.6
M4.5
M1 4
Diam. 3.65 3.85
Table 20. PENTAWATT mechanical data (continued)
Dim. mm
Min. Typ. Max.
Package and packing information VN750
36/46 Doc ID 6942 Rev. 4
4.4 P2PAK mechanical data
Figure 42. P2PAK package dimensions
("1($'5
VN750 Package and packing information
Doc ID 6942 Rev. 4 37/46
Table 21. P2PAK mechanical data
Dim. mm
Min. Typ. Max.
A4.30 4.80
A1 2.40 2.80
A2 0.03 0.23
b0.80 1.05
c0.45 0.60
c2 1.17 1.37
D8.95 9.35
D2 8.00
E 10.00 10.40
E1 8.50
e3.20 3.60
e1 6.60 7.00
L 13.70 14.50
L2 1.25 1.40
L3 0.90 1.70
L5 1.55 2.40
R0.40
V2 0º 8º
Package weight 1.40 Gr (typ)
Package and packing information VN750
38/46 Doc ID 6942 Rev. 4
4.5 PPAK mechanical data
Figure 43. PPAK package dimensions
("1($'5
VN750 Package and packing information
Doc ID 6942 Rev. 4 39/46
Table 22. PPAK m echanical data
Dim. mm
Min. Typ. Max.
A2.20 2.40
A1 0.90 1.10
A2 0.03 0.23
B0.40 0.60
B2 5.20 5.40
C0.45 0.60
C2 0.48 0.60
D6.00 6.20
D1 5.1
E6.40 6.60
E1 4.7
e1.27
G4.90 5.25
G1 2.38 2.70
H9.35 10.10
L2 0.8 1.00
L4 0.60 1.00
L5 1 —
L6 2.80
R0.2
V2 0° 8°
Package weight Gr. 0.3
Package and packing information VN750
40/46 Doc ID 6942 Rev. 4
4.6 SO-8 packing information
The devices can be packed in tube or tape and reel shipments (see the Tabl e 1: D ev i ce
summary ).
Figure 44. SO-8 tube shipment (no suffix)
Figure 45. SO-8 tape and reel shipment (suffix “TR”)
All dimensions are in mm.
Base Q.ty 100
Bulk Q.ty 2000
Tube lengt h (± 0.5) 532
A3.2
B6
C (± 0.1) 0.6
C
B
A
Tape dimensions
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986
All dimensions are in mm.
Tape width W 12
Tape Hole Spacing P0 (± 0.1) 4
Component Spacing P 8
Hole Diameter D (+0.1/-0) 1.5
Hole Diameter D1 (min) 1.5
Hole Position F (± 0.05) 5.5
Compartment Depth K (max) 4.5
Hole Spacing P1 (± 0.1) 2
Top
cover
tape
End
Start
No componentsNo components Components
500mm min
500mm min
Empty components pockets
saled with cover tape.
User direction of feed
Reel dimensions
All dimensions are in mm.
Base Q.ty 2500
Bulk Q.ty 2500
A (max) 330
B (min) 1.5
C (± 0.2) 13
F20.2
G (+ 2 / -0) 12.4
N (min) 60
T (max) 18.4
VN750 Package and packing information
Doc ID 6942 Rev. 4 41/46
4.7 PENTAWATT packing information
The devices can be packed in tube or tape and reel shipments (see the Tabl e 1: D ev i ce
summary ).
Figure 46. PENTAWATT tube shipment (no suffix )
4.8 P2PAK packing informa t io n
The devices can be packed in tube or tape and reel shipments (see the Tabl e 1: D ev i ce
summary ).
Figure 47. P2PAK tube shipment (no suffix)
#
"
!
("1($'5
All dimensions are in mm.
Base Q.ty 50
Bulk Q.ty 1000
Tube length (± 0.5) 532
A18
B33.1
C (± 0.1) 1
#
"
!
("1($'5
All dimensions are in mm.
Base Q.ty 50
Bulk Q.ty 1000
Tube length (± 0.5) 532
A18
B33.1
C (± 0.1) 1
Package and packing information VN750
42/46 Doc ID 6942 Rev. 4
Figure 48. P2PAK tape an d reel (suffix “13TR”)
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb 1986
All dimensions are in mm.
Tape width W 24
Tape Hole Spacing P0 (± 0.1) 4
Component Spacing P 12
Hole Diameter D (± 0 . 1/-0) 1.5
Hole Diameter D1 (min) 1.5
Hole Position F (± 0.05) 11.5
Compar tm en t Dep th K (m ax) 6.5
Hole Spacing P1 (± 0.1) 2
Top
cover
tape
End
Start
No componentsNo components Components
500mm min
500mm min
Empty components pockets
saled with cover tape.
User direction of feed
REEL DIMENSIONS
All dimensions are in mm.
Base Q.ty 1000
Bulk Q.ty 1000
A (max) 330
B (min) 1.5
C (± 0.2) 13
F20.2
G (+ 2 / -0) 24.4
N (min) 60
T (max) 30.4
VN750 Package and packing information
Doc ID 6942 Rev. 4 43/46
4.9 PPAK packing information
The devices can be packed in tube or tape and reel shipments (see the Tabl e 1: D ev i ce
summary ).
Figure 49. PPAK suggested pad layout
Figure 50. PPAK tube shipment (no suffix)
6.71.83
All dimensions are in mm.
Base Q.ty 75
Bulk Q. t y 3000
Tube length (± 0.5 ) 532
A6
B21.3
C (± 0.1) 0.6
A
C
B
Package and packing information VN750
44/46 Doc ID 6942 Rev. 4
Figure 51. PPAK tape and ree l ( suffix “13TR”)
All dimensions are in mm.
Base Q.ty 2500
Bulk Q.ty 2500
A (max) 330
B (min) 1.5
C (± 0.2) 13
F20.2
G (+ 2 / -0) 16.4
N (min) 60
T (max) 22.4
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb 1986
All dimensions are in mm.
Tape width W 16
Tape Hole Spacing P0 (± 0.1) 4
Component Spacing P 8
Hole Diameter D (± 0 . 1/-0) 1.5
Hole Diameter D1 (min) 1.5
Hole Position F (± 0.05) 7.5
Compar tm en t Dep th K (m ax) 2.75
Hole Spacing P1 (± 0.1) 2
Top
cover
tape
End
Start
No componentsNo components Components
500mm min
500mm min
Empty components pockets
saled with cover tape.
User direction of feed
REEL DIMENSIONS
VN750 Revision history
Doc ID 6942 Rev. 4 45/46
5 Revision history
Table 23. Document revision history
Date Revision Changes
21-Jun-2004 1 Initial release.
03-May-2006 2
Current and voltage convention update (page 2).
Configuration diagram (top view) & suggested connections for
unused and n.c. pins: insertion (page 2).
6cm2 Cu condition insertion in thermal data table (page 3).
VCC - output diode section update (page 4).
Revision history table insertion (page 30).
Disclaimers update (page 31).
24-Nov-2008 3
Document reformatted and restructured.
Added content, list of figures and tables.
Added ECOPACK® packages information.
Updated Figure 48.: P2PAK tape and reel (suffix “13TR”):
– changed component spacing (P) in tape dimensions table from 16
mm to 12 mm.
18-May-2012 4 Updated Section 4.5: PPAK mechanical data
VN750
46/46 Doc ID 6942 Rev. 4
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