©1985 Burr-Brown Corporation PDS-617G Printed in U.S.A. August, 1993
Precision Unity Gain
DIFFERENTIAL AMPLIFIER
INA105
DESCRIPTION
The INA105 is a monolithic Gain = 1 differential
amplifier consisting of a precision op amp and on-chip
metal film resistors. The resistors are laser trimmed
for accurate gain and high common-mode rejection.
Excellent TCR tracking of the resistors maintains
gain accuracy and common-mode rejection over
temperature.
The differential amplifier is the foundation of many
commonly used circuits. The INA105 provides this
precision circuit function without using an expensive
precision resistor network. The INA105 is available in
8-pin plastic DIP, SO-8 surface-mount and TO-99
metal packages.
Sense
V+
Output
V–
Ref
–In
+In
5
7
6
4
1
2
325k25k
25k25k
®
FEATURES
CMR 86dB min OVER TEMPERATURE
GAIN ERROR: 0.01% max
NONLINEARITY: 0.001% max
NO EXTERNAL ADJUSTMENTS
REQUIRED
EASY TO USE
COMPLETE SOLUTION
HIGHLY VERSATILE
LOW COST
PLASTIC DIP, TO-99 HERMETIC METAL,
AND SO-8 SOIC PACKAGES
APPLICATIONS
DIFFERENTIAL AMPLIFIER
INSTRUMENTATION AMPLIFIER
BUILDING BLOCK
UNITY-GAIN INVERTING AMPLIFIER
GAIN-OF-1/2 AMPLIFIER
NONINVERTING GAIN-OF-2 AMPLIFIER
AVERAGE VALUE AMPLIFIER
ABSOLUTE VALUE AMPLIFIER
SUMMING AMPLIFIER
SYNCHRONOUS DEMODULATOR
CURRENT RECEIVER WITH COMPLIANCE
TO RAILS
4mA TO 20mA TRANSMITTER
VOLTAGE-CONTROLLED CURRENT
SOURCE
ALL-PASS FILTERS
International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111
Internet: http://www.burr-brown.com/ • FAXLine: (800) 548-6133 (US/Canada Only) • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132
SBOS145
®
INA105 2
INA105AM INA105BM INA105KP, KU
PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS
SPECIFICATIONS
ELECTRICAL
At +25°C, VCC = ±15V, unless otherwise noted.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
GAIN
Initial(1) 1✻✻V/V
Error 0.005 0.01 ✻✻ 0.01 0.025 %
vs Temperature 1 5 ✻✻ ppm/°C
Nonlinearity(2) 0.0002 0.001 ✻✻ %
OUTPUT
Rated Voltage IO = +20mA, –5mA 10 12 ✻✻ ✻✻ V
Rated Current VO = 10V +20, –5 ✻✻ mA
Impedance 0.01 ✻✻
Current Limit To Common +40/–10 ✻✻mA
Capacitive Load Stable Operation 1000 ✻✻pF
INPUT
Impedance(3) Differential 50 ✻✻k
Common-Mode 50 ✻✻k
Voltage Range(4) Differential ±10 ✻✻ V
Common-Mode ±20 ✻✻ V
Common-Mode Rejection(5) TA = TMIN to TMAX 80 90 86 100 72 dB
OFFSET VOLTAGE RTO(6), (7)
Initial 50 250 ✻✻ 500 µV
vs Temperature 5 20 5 10 ✻✻µV/°C
vs Supply ±VS = 6V to 18V 1 25 15 ✻✻µV/V
vs Time 20 ✻✻µV/mo
OUTPUT NOISE VOLTAGE RTO(6), (8)
fB = 0.01Hz to 10Hz 2.4 ✻✻µVp-p
fO = 10kHz 60 ✻✻nV/Hz
DYNAMIC RESPONSE
Small Signal Bandwidth –3dB 1 ✻✻MHz
Full Power Bandwidth VO = 20Vp-p 30 50 ✻✻ ✻✻ kHz
Slew Rate 2 3 ✻✻ ✻✻ V/µs
Settling Time: 0.1% VO = 10V Step 4 ✻✻µs
0.01% VO = 10V Step 5 ✻✻µs
0.01% VCM = 10V Step, VDIFF = 0V 1.5 ✻✻µs
POWER SUPPLY
Rated ±15 ✻✻V
Voltage Range Derated Performance ±5±18 ✻✻V
Quiescent Current VO = 0V ±1.5 ±2✻✻ mA
TEMPERATURE RANGE
Specification –40 +85 ✻✻°C
Operation –55 +125 ✻✻–40 +85 °C
Storage –65 +150 ✻✻–40 +125 °C
Specification same as for INA105AM.
NOTES: (1) Connected as difference amplifier (see Figure 4). (2) Nonlinearity is the maximum peak deviation from the best-fit straight line as a percent of full-scale peak-
to-peak output. (3) 25k resistors are ratio matched but have ±20% absolute value. (4) Maximum input voltage without protection is 10V more than either ±15V supply
(±25V). Limit IIN to 1mA. (5) With zero source impedance (see “Maintaining CMR” section). (6) Referred to output in unity-gain difference configuration. Note that this
circuit has a gain of 2 for the operational amplifier’s offset voltage and noise voltage. (7) Includes effects of amplifier’s input bias and offset currents. (8) Includes effects
of amplifier’s input current noise and thermal noise contribution of resistor network.
®
INA105
3
PIN CONFIGURATIONS
Top View TO-99
INA105AM
INA105BM NOTE: (1) Performance grade identifier box for small outline surface mount.
Blank indicates K grade. Part is marked INA105U.
Ref
–In
+In
V–
No Internal Connection
V+
Output
Sense
1
2
3
4
8
7
6
5
(1)
8
7
62
1
3
4
5
Tab No Internal
Connection
Output
V+
V–
Sense
Ref
–In
+In
Case internall
y
connected to V–. Make no connection.
Top View DIP/SOIC
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric
changes could cause the device not to meet its published
specifications.
ABSOLUTE MAXIMUM RATINGS
Supply ................................................................................................ ±18V
Input Voltage Range ............................................................................ ±VS
Operating Temperature Range: M .................................. –55°C to +125°C
P, U................................ –40°C to +85°C
Storage Temperature Range: M ..................................... –65°C to +150°C
P, U ................................. –40°C to +125°C
Lead Temperature (soldering, 10s) M, P ....................................... +300°C
Wave Soldering (3s, max) U .......................................................... +260°C
Output Short Circuit to Common.............................................. Continuous
PACKAGE
DRAWING TEMPERATURE
PRODUCT PACKAGE NUMBER(1) RANGE
INA105AM TO-99 Metal 001 –40°C to +85°C
INA105BM TO-99 Metal 001 –40°C to +85°C
INA105KP 8-Pin Plastic DIP 006 –40°C to +85°C
INA105KU 8-Pin SOIC 182 –40°C to +85°C
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix C of Burr-Brown IC Data Book.
PACKAGE/ORDERING INFORMATION
®
INA105 4
SMALL SIGNAL RESPONSE
(No Load)
Time (µs)
Output Voltage (mV)
0510
+50
0
–50
STEP RESPONSE
Time (µs)
Output Voltage (V)
–10 to +10
0 4 8 12 16
SMALL SIGNAL RESPONSE
(R
LOAD
= , C
LOAD
= 1000pF)
Time (µs)
Output Voltage (mV)
0510
+50
0
–50
MAXIMUM V
OUT
vs I
OUT
(Negative Swing)
–I
OUT
(mA)
0
V
OUT
(V)
–17.5
–15
–12.5
–10
–7.5
–5
–2.5
0–2 –4 –6 –8 –10 –12
V
S
= ±5V
V
S
= ±12V
V
S
= ±15V
V
S
= ±18V
CMR vs FREQUENCY
Frequency (Hz)
10
CMR (dB)
110
100
90
80
70
60 100 1k 10k 100k
AM, KP, U
BM
MAXIMUM V
OUT
vs I
OUT
(Positive Swing)
I
OUT
(mA)
0
V
OUT
(V)
17.5
15
12.5
10
7.5
5
2.5
06 1218243036
V
S
= ±5V
V
S
= ±12V
V
S
= ±15V
V
S
= ±18V
TYPICAL PERFORMANCE CURVES
At TA = 25°C, VS = ±15V, unless otherwise noted.
®
INA105
5
COMMON-MODE INPUT RANGE vs SUPPLY
(Difference Amplifier Connected, V
OUT
= 0)
Supply Voltage (V)
±3
Input Range (V)
36
30
24
18
12
6
0±6 ±9 ±12 ±15 ±18 ±21
Negative CMV
Positive CMV
POWER SUPPLY REJECTION
vs FREQUENCY
Frequency (Hz)
1
PSRR (dB)
140
120
100
80
60
40 10 100 1k 10k 100k
V–
V+
TYPICAL PERFORMANCE CURVES (CONT)
At TA = 25°C, VS = ±15V, unless otherwise noted.
APPLICATION INFORMATION
Figure 1 shows the basic connections required for operation
of the INA105. Power supply bypass capacitors should be
connected close to the device pins.
The differential input signal is connected to pins 2 and 3 as
shown. The source impedances connected to the inputs must
be nearly equal to assure good common-mode rejection. A
5 mismatch in source impedance will degrade the com-
mon-mode rejection of a typical device to approximately
80dB. If the source has a known mismatch in source imped-
ance, an additional resistor in series with one input can be
used to preserve good common-mode rejection.
The output is referred to the output reference terminal (pin
1) which is normally grounded. A voltage applied to the Ref
terminal will be summed with the output signal. This can be
used to null offset voltage as shown in Figure 2. The source
impedance of a signal applied to the Ref terminal should be
less than 10 to maintain good common-mode rejection.
Do not interchange pins 1 and 3 or pins 2 and 5, even though
nominal resistor values are equal. These resistors are laser
trimmed for precise resistor ratios to achieve accurate gain
and highest CMR. Interchanging these pins would not pro-
vide specified performance.
FIGURE 1. Basic Power Supply and Signal Connections.
V
3
5
6
3
INA105
V
OUT
= V
3
V
2
2
R
3
R
1
R
2
R
4
V
2
25k25k
25k
25k
1µF
V–
4
1µF
V+
7
1
®
INA105 6
FIGURE 2. Offset Adjustment.
FIGURE 3. Precision Difference Amplifier.
For low source impedance applications, an input stage using OPA27 op
amps will give the best low noise, offset, and temperature drift performance.
At source impedances above about 10k, the bias current noise of the
OPA27 reacting with the input impedance begins to dominate the noise
performance. For these applications, using the OPA111 or dual OPA2111
FET input op amp will provide lower noise performance. For lower cost use
the OPA121 plastic. To construct an electrometer use the OPA128.
R1R2GAIN CMRR MAX NOISE AT 1kHz
A1, A2()() (V/V) (dB) IB(nV/HZ)
OPA27A 50.5 2.5k 100 128 40nA 4
OPA111B 202 10k 100 110 1pA 10
OPA128LM 202 10k 100 118 75fA 38
FIGURE 4. Precision Instrumentation Amplifier.
5
6
3
INA105
2
V
1
1
V
0
0utput
A
2
A
1
R
2
R
2
R
1
–In
V
1
+In
V
O
= (1 + 2R
2
/R
1
) (V
2
–V
1
)
FIGURE 5. Current Receiver with Compliance to Rails.
V
3
5
6
3
V
O
INA105
V
O
= V
3
V
3
Offset Adjustment
Range = ±300µV
2
R
3
R
1
R
2
R
4
V
2
10
499k
10
100k
+15V
–15V
1
V
3
5
6
3
V
0
INA105BM
V
0
= V
3
V
2
Gain Error = 0.005%
CMR = 100dB
Nonlinearity = 0.0002%
2
R
3
R
1
R
2
V
2
25k
+In
–In
25k
R
4
25k25k
1
V–
5
6
3
INA105
2
100
1%
1
V0
0 to 2V
IIN
0 to 20mA
100
1%
®
INA105
7
FIGURE 6. Precision Unity-Gain Inverting Amplifier.
FIGURE 7. ±10V Precision Voltage Reference.
FIGURE 8. ±5V Precision Voltage Reference.
FIGURE 9. Precision Unity-Gain Buffer.
FIGURE 10. Pseudoground Generator.
5
6
2
(V+)/2
INA105
V+
1
7
4
V+
CommonCommon
3
FIGURE 11. Precision Average Value Amplifier.
5
6V
0
INA105
V
0
= –
V
2
Gain Error = 0.01% maximum
Nonlinearity = 0.001% maximum
Gain Drift = 2ppm/°C
2
V
2
13
V
1
5
6
1
3
2
V
0
INA105
V
0
= V
1
Gain Error = 0.001% maximum
5
6
1
3
INA105
2
4
2+15V
6
–10V Out
+10V Out
REF10
5
6
V+
INA105
13
REF10 +5V Out
–5V Out
2
6
4
2
V
1
5
6
1
3
2
V
0
INA105
V
0
= (V
1
+ V
3
)/2, ±0.01% maximum
V
3
®
INA105 8
FIGURE 15. Precision Bipolar Offsetting.
–10V
to
+10V
Input
5
6
1
3
2
Output
INA105
4
2
6
(1)
0 to +10V Output
±2ppm/°C
10V
REF10
Device
VFC320
VFC100
DAC80
DAC703
XTR110
Output
0-10kHz
0-F
CLOCK
/2
0-FS (12 bits)
0-FS (16 bits)
4-20mA
NOTE: (1) Unipolar Input Device.
FIGURE 12. Precision (G = 2) Amplifier.
V
1
5
6
1
3
V
0
INA105
V
0
= 2 • V
1
Gain Error = 0.01% maximum
Gain Drift = 2ppm/°C
2
FIGURE 16. Precision Summing Amplifier with Gain.
V
1
6
1
3
V
0
INA105
V
3
25
R
1
R
2
V
0
= 1 +
R
2
R
1
V
1
+
V
3
2
( )( )
For G=10,
See INA106.
FIGURE 13. Precision Summing Amplifier.
V
1
5
6
1
3
V
0
INA105
V
0
= V
1
+ V
3
,
±0.01% maximum
2
V
3
FIGURE 14. Precision Gain = 1/2 Amplifier.
V
3
5
6
3
2
INA105
1
V
0
V
0
= V
3
/2, ±0.01%
= 1/2 V
3
±20V
®
INA105
9
FIGURE 17. Instrumentation Amplifier Guard Drive Generator.
FIGURE 18. Precision Summing Instrumentation Amplifier.
V
1
5
6
3
1
INA105
V
0
= V
3
+ V
4
– V
1
– V
2
2
V
2
V
3
5
6
3
1
V
0
INA105
2
V
4
Shield
5
61
2
INA105
A
1
A
2
1
A
3
Output
3
Noise (60Hz hum)
Noise (60Hz hum)
Transducer or
Analog Signal
2
+V
CC
13
–V
CC
9 14 Common
10k
10k
10k
10k
INA101AG
8
76
20k
20k
3
4
5
10
11
12
R
G
100k
Offset
Adjust
®
INA105 10
FIGURE 22. Differential Output Difference Amplifier.
5
6
3
INA105
2
V
01
1
5
6
3
INA105
2
V
01
– V
02
= 2 (V
2
– V
1
)
V
02
1
V
2
V
1
FIGURE 19. Precision Voltage-to-Current Converter with
Differential Inputs.
FIGURE 21. Isolating Current Source.
FIGURE 23. Isolating Current Source with Buffering Ampli-
fier for Greater Accuracy.
FIGURE 20. Differential Input Voltage-to-Current Converter
for Low IOUT.
5
6
3
INA105
2
1
V
1
V
2
Load
I
O
= (V
1
– V
2
) (1/25k + 1/R)
For R 200 , Figure 24 will
provide superior performance. I
O
R
R
5
6
3
INA105
2
1
V
3
V
2
Load
I
O
= (V
3
– V
2
)/R I
O
R
5
6
3
INA105
2
1
V
3
V
2
Load I
O
R
R
Gate can be
+V
S
–5V
I
O
= (V
3
– V
2
) (1/25k + 1/R)
R < 200
5
6
3
INA105
2
1
V3
V2
Load IO
R
Gate can be
+VCC –5V
IO = (V3 – V2)/R
R 200
®
INA105
11
FIGURE 25. Precision Voltage-Controlled Current Source with Buffered Differential Inputs and Gain.
FIGURE 24. Window Comparator with Window Span and Window Center Inputs.
FIGURE 26. Digitally Controlled Gain of ±1 Amplifier.
5
6
3
2
1
8
9
Window Center + Window Span
5
6
3
1
HI
INA105
2GO
LO
10
7
VIN
Lower Limit 5
3
2
Upper Limit
INA105
4115
Window
Comparator
Window Span
0 to +5V
Window
Center
±10V
Window Center–Window Span
5
6
3
INA105
2
1
Load
I
O
= (E
2
– E
1
) (1 +2R
2
/R
1
) (1/25k + 1/R)
NOTE: (1) See Figure 5 for op amp recommendation.
I
O
R
(1)
V
1
V
2
+In
–In
(1)
R
1
R
2
R
2
R
V+
1k
5
6
3
1
INA105
2
1
V
O
DG188
V
1
Logic
In
Logic In
0
1
V
O
–V
1
+V
1
®
INA105 12
FIGURE 27. Boosting Instrumentation Amplifier Common-Mode Range From ±5 to ±7.5V with 10V Full-Scale Output.
FIGURE 28. Precision Absolute Value Buffer.
FIGURE 29. Precision 4-20mA Current Transmitter.
V
1
Input
5
6
3
1
V
0
= |V
1
|
INA105
2
R
4
R
3
R
1
R
2
OPA111
10pF
D
1
D
2
R
5
2k
5
6
3
INA105
2
1
4
2+15V OPA27
REF10 6
10V
4 to 20mA
Out
0 to 10V
In
12.5k1k
50k
50.1
50.1
R
LOAD
INA105
A
1
V
1
V
2
A
2
R
1
5
6
1
3
2
V
0
= 200 (V
2
– V
1
)
A
3
R
1
49.5
R
2
R
2
R
2
R
2
Conventional
Instrumentation
Amplifier (e.g., INA101 or INA102)
A = 100
INA105
A = 2
R
1
49.5
PACKAGE OPTION ADDENDUM
www.ti.com 25-Aug-2010
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
INA105AM NRND TO-99 LMC 8 20 Green (RoHS
& no Sb/Br) AU N / A for Pkg Type Samples Not Available
INA105BM NRND TO-99 LMC 8 1 Green (RoHS
& no Sb/Br) AU N / A for Pkg Type Samples Not Available
INA105KP ACTIVE PDIP P 8 50 Green (RoHS
& no Sb/Br) CU NIPDAU N / A for Pkg Type Contact TI Distributor
or Sales Office
INA105KPG4 ACTIVE PDIP P 8 50 Green (RoHS
& no Sb/Br) CU NIPDAU N / A for Pkg Type Contact TI Distributor
or Sales Office
INA105KU ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-3-260C-168 HR Contact TI Distributor
or Sales Office
INA105KU/2K5 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-3-260C-168 HR Purchase Samples
INA105KU/2K5E4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-3-260C-168 HR Purchase Samples
INA105KUE4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-3-260C-168 HR Contact TI Distributor
or Sales Office
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
PACKAGE OPTION ADDENDUM
www.ti.com 25-Aug-2010
Addendum-Page 2
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
INA105KU/2K5 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
INA105KU/2K5 SOIC D 8 2500 367.0 367.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 2
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