LM431
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SNVS020G MAY 2000REVISED APRIL 2013
LM431 Adjustable Precision Zener Shunt Regulator
Check for Samples: LM431
1FEATURES DESCRIPTION
The LM431 is a 3-terminal adjustable shunt regulator
2 Average Temperature Coefficient 50 ppm/°C with ensured temperature stability over the entire
Temperature Compensated for Operation Over temperature range of operation. The output voltage
the Full Temperature Range may be set at any level greater than 2.5V (VREF) up to
Programmable Output Voltage 36V merely by selecting two external resistors that
act as a voltage divided network. Due to the sharp
Fast Turn-On Response turn-on characteristics this device is an excellent
Low Output Noise replacement for many zener diode applications.
Connection Diagram
Figure 1. TO-92: Plastic Package Figure 2. SOT-23: 3-Lead Small Outline
Top View Top View
A. Note: NC = Not internally connected.
Figure 3. SOIC: 8-Pin Surface Mount
Top view
Symbol and Functional Diagrams
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Copyright © 2000–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
LM431
SNVS020G MAY 2000REVISED APRIL 2013
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DC Test Circuits
Note: VZ= VREF (1 + R1/R2) + IREF R1
Figure 4. Test Circuit for VZ= VREF Figure 5. Test Circuit for VZ> VREF
Figure 6. Test Circuit for Off-State Current
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings(1)(2)
Storage Temperature Range 65°C to +150°C
Operating Temperature Range Industrial (LM431xI) 40°C to +85°C
Commercial (LM431xC) 0°C to +70°C
Soldering Information Infrared or Convection (20 sec.) 235°C
Wave Soldering (10 sec.) 260°C (lead temp.)
Cathode Voltage 37V
Continuous Cathode Current 10 mA to +150 mA
Reference Voltage 0.5V
Reference Input Current 10 mA
Internal Power Dissipation(3)(4) TO-92 Package 0.78W
SOIC Package 0.81W
SOT-23 Package 0.28W
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Electrical specifications do not apply when
operating the device beyond its rated operating conditions.
(2) If Military/Aerospace specified devices are required, please contact the TI Sales Office/ Distributors for availability and specifications.
(3) TJ Max = 150°C.
(4) Ratings apply to ambient temperature at 25°C. Above this temperature, derate the TO-92 at 6.2 mW/°C, the SOIC at 6.5 mW/°C, the
SOT-23 at 2.2 mW/°C.
Operating Conditions Min Max
Cathode Voltage VREF 37V
Cathode Current 1.0 mA 100 mA
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SNVS020G MAY 2000REVISED APRIL 2013
LM431 Electrical Characteristics
TA= 25°C unless otherwise specified
Symbol Parameter Conditions Min Typ Max Units
VREF Reference Voltage VZ= VREF, II= 10 mA 2.440 2.495 2.550 V
LM431A (Figure 4 )
VZ= VREF, II= 10 mA 2.470 2.495 2.520 V
LM431B (Figure 4 )
VZ= VREF, II= 10 mA 2.485 2.500 2.510 V
LM431C (Figure 4 )
VDEV Deviation of Reference Input Voltage Over VZ= VREF, II= 10 mA, 8.0 17 mV
Temperature(1) TA= Full Range (Figure 4 )
ΔVREF/ΔVZRatio of the Change in Reference Voltage IZ= 10 mA VZfrom VREF to 10V 1.4 2.7 mV/V
to the Change in Cathode Voltage (Figure 5 )VZfrom 10V to 36V 1.0 2.0
IREF Reference Input Current R1= 10 kΩ, R2=, II= 10 mA 2.0 4.0 μA
(Figure 5 )
IREF Deviation of Reference Input Current over R1= 10 kΩ, R2=, II= 10 mA, 0.4 1.2 μA
Temperature TA= Full Range (Figure 5 )
IZ(MIN) Minimum Cathode Current for Regulation VZ= VREF(Figure 4 )0.4 1.0 mA
IZ(OFF) Off-State Current VZ= 36V, VREF = 0V (Figure 6) 0.3 1.0 μA
rZDynamic Output Impedance(2) VZ= VREF, LM431A, 0.75 Ω
Frequency = 0 Hz (Figure 4 )
VZ= VREF, LM431B, LM431C 0.50 Ω
Frequency = 0 Hz (Figure 4 )
(1) Deviation of reference input voltage, VDEV, is defined as the maximum variation of the reference input voltage over the full temperature
range.
The average temperature coefficient of the reference input voltage, VREF, is defined as:
Where:
T2T1= full temperature change (0-70°C).
VREF can be positive or negative depending on whether the slope is positive or negative.
Example: VDEV = 8.0 mV, VREF = 2495 mV, T2T1= 70°C, slope is positive.
(2) The dynamic output impedance, rZ, is defined as:
When the device is programmed with two external resistors, R1 and R2, (see Figure 5 ), the dynamic output impedance of the overall
circuit, rZ, is defined as:
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Equivalent Circuit
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SNVS020G MAY 2000REVISED APRIL 2013
Typical Performance Characteristics
Input Current
vs
VZThermal Information
Figure 7. Figure 8.
Input Current Dynamic Impedance
vs vs
VZFrequency
Figure 9. Figure 10.
Stability Boundary Conditions
Note: The areas under the curves represent conditions that may
cause the device to oscillate. For curves B, C, and D, R2 and V+were
adjusted to establish the initial VZand IZconditions with CL= 0. V+
and CLwere then adjusted to determine the ranges of stability.
Figure 11. Figure 12.
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Typical Performance Characteristics (continued)
Test Circuit for Curve A Above Test Circuit for Curves B, C and D Above
Figure 13. Figure 14.
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SNVS020G MAY 2000REVISED APRIL 2013
Typical Applications
Figure 15. Shunt Regulator
Figure 16. Single Supply Comparator with Temperature Compensated Threshold
Figure 17. Series Regulator
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Figure 18. Output Control of a Three Terminal Fixed Regulator
Figure 19. Higher Current Shunt Regulator
Figure 20. Crow Bar
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Figure 21. Over Voltage/Under Voltage Protection Circuit
Figure 22. Voltage Monitor
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Figure 23. Delay Timer
Figure 24. Current Limiter or Current Source
Figure 25. Constant Current Sink
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SNVS020G MAY 2000REVISED APRIL 2013
REVISION HISTORY
Changes from Revision F (April 2013) to Revision G Page
Changed layout of National Data Sheet to TI format .......................................................................................................... 10
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PACKAGE OPTION ADDENDUM
www.ti.com 1-Nov-2013
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
LM431ACM NRND SOIC D 8 95 TBD Call TI Call TI -40 to 85 LM431
ACM
LM431ACM/NOPB ACTIVE SOIC D 8 95 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 LM431
ACM
LM431ACM3 NRND SOT-23 DBZ 3 1000 TBD Call TI Call TI -40 to 85 N1F
LM431ACM3/NOPB ACTIVE SOT-23 DBZ 3 1000 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 N1F
LM431ACM3X NRND SOT-23 DBZ 3 3000 TBD Call TI Call TI -40 to 85 N1F
LM431ACM3X/NOPB ACTIVE SOT-23 DBZ 3 3000 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 N1F
LM431ACMX NRND SOIC D 8 2500 TBD Call TI Call TI -40 to 85 LM431
ACM
LM431ACMX/NOPB ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 LM431
ACM
LM431ACZ/LFT3 ACTIVE TO-92 LP 3 2000 Green (RoHS
& no Sb/Br) SN | CU SN N / A for Pkg Type LM431
ACZ
LM431ACZ/LFT4 ACTIVE TO-92 LP 3 2000 Green (RoHS
& no Sb/Br) SN | CU SN N / A for Pkg Type LM431
ACZ
LM431ACZ/NOPB ACTIVE TO-92 LP 3 1800 Green (RoHS
& no Sb/Br) SN | CU SN N / A for Pkg Type -40 to 85 LM431
ACZ
LM431AIM NRND SOIC D 8 95 TBD Call TI Call TI -40 to 85 LM431
AIM
LM431AIM/NOPB ACTIVE SOIC D 8 95 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 LM431
AIM
LM431AIM3 NRND SOT-23 DBZ 3 1000 TBD Call TI Call TI -40 to 85 N1E
LM431AIM3/NOPB ACTIVE SOT-23 DBZ 3 1000 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 N1E
LM431AIM3X/NOPB ACTIVE SOT-23 DBZ 3 3000 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 N1E
LM431AIMX/NOPB ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 LM431
AIM
LM431AIZ/LFT1 ACTIVE TO-92 LP 3 2000 Green (RoHS
& no Sb/Br) SN | CU SN N / A for Pkg Type LM431
AIZ
PACKAGE OPTION ADDENDUM
www.ti.com 1-Nov-2013
Addendum-Page 2
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
LM431AIZ/NOPB ACTIVE TO-92 LP 3 1800 Green (RoHS
& no Sb/Br) SN | CU SN N / A for Pkg Type -40 to 85 LM431
AIZ
LM431BCM/NOPB ACTIVE SOIC D 8 95 Green (RoHS
& no Sb/Br) SN | CU SN Level-1-260C-UNLIM -40 to 85 431
BCM
LM431BCM3 NRND SOT-23 DBZ 3 1000 TBD Call TI Call TI -40 to 85 N1D
LM431BCM3/NOPB ACTIVE SOT-23 DBZ 3 1000 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 N1D
LM431BCM3X/NOPB ACTIVE SOT-23 DBZ 3 3000 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 N1D
LM431BCMX NRND SOIC D 8 2500 TBD Call TI Call TI -40 to 85 431
BCM
LM431BCMX/NOPB ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 431
BCM
LM431BCZ/NOPB ACTIVE TO-92 LP 3 1800 Green (RoHS
& no Sb/Br) SN | CU SN N / A for Pkg Type -40 to 85 LM431
BCZ
LM431BIM NRND SOIC D 8 95 TBD Call TI Call TI -40 to 85 431
BIM
LM431BIM/NOPB ACTIVE SOIC D 8 95 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 431
BIM
LM431BIM3 NRND SOT-23 DBZ 3 1000 TBD Call TI Call TI -40 to 85 N1C
LM431BIM3/NOPB ACTIVE SOT-23 DBZ 3 1000 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 N1C
LM431BIM3X NRND SOT-23 DBZ 3 3000 TBD Call TI Call TI -40 to 85 N1C
LM431BIM3X/NOPB ACTIVE SOT-23 DBZ 3 3000 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 N1C
LM431BIMX/NOPB ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 431
BIM
LM431CCM/NOPB ACTIVE SOIC D 8 95 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 431
CCM
LM431CCM3/NOPB ACTIVE SOT-23 DBZ 3 1000 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 N1B
LM431CCM3X NRND SOT-23 DBZ 3 3000 TBD Call TI Call TI -40 to 85 N1B
LM431CCM3X/NOPB ACTIVE SOT-23 DBZ 3 3000 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 N1B
LM431CCZ/NOPB ACTIVE TO-92 LP 3 1800 Green (RoHS
& no Sb/Br) SN | CU SN N / A for Pkg Type -40 to 85 LM431
CCZ
PACKAGE OPTION ADDENDUM
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Addendum-Page 3
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
LM431CIM NRND SOIC D 8 95 TBD Call TI Call TI -40 to 85 431
CIM
LM431CIM/NOPB ACTIVE SOIC D 8 95 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 431
CIM
LM431CIM3 NRND SOT-23 DBZ 3 1000 TBD Call TI Call TI -40 to 85 N1A
LM431CIM3/NOPB ACTIVE SOT-23 DBZ 3 1000 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 N1A
LM431CIM3X NRND SOT-23 DBZ 3 3000 TBD Call TI Call TI -40 to 85 N1A
LM431CIM3X/NOPB ACTIVE SOT-23 DBZ 3 3000 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 N1A
LM431CIZ/LFT1 ACTIVE TO-92 LP 3 2000 Green (RoHS
& no Sb/Br) SN | CU SN N / A for Pkg Type LM431
CIZ
LM431CIZ/NOPB ACTIVE TO-92 LP 3 1800 Green (RoHS
& no Sb/Br) SN | CU SN N / A for Pkg Type -40 to 85 LM431
CIZ
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
PACKAGE OPTION ADDENDUM
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Addendum-Page 4
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
LM431ACM3 SOT-23 DBZ 3 1000 178.0 8.4 3.3 2.9 1.22 4.0 8.0 Q3
LM431ACM3/NOPB SOT-23 DBZ 3 1000 178.0 8.4 3.3 2.9 1.22 4.0 8.0 Q3
LM431ACM3X SOT-23 DBZ 3 3000 178.0 8.4 3.3 2.9 1.22 4.0 8.0 Q3
LM431ACM3X/NOPB SOT-23 DBZ 3 3000 178.0 8.4 3.3 2.9 1.22 4.0 8.0 Q3
LM431ACMX SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1
LM431ACMX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1
LM431AIM3 SOT-23 DBZ 3 1000 178.0 8.4 3.3 2.9 1.22 4.0 8.0 Q3
LM431AIM3/NOPB SOT-23 DBZ 3 1000 178.0 8.4 3.3 2.9 1.22 4.0 8.0 Q3
LM431AIM3X/NOPB SOT-23 DBZ 3 3000 178.0 8.4 3.3 2.9 1.22 4.0 8.0 Q3
LM431AIMX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1
LM431BCM3 SOT-23 DBZ 3 1000 178.0 8.4 3.3 2.9 1.22 4.0 8.0 Q3
LM431BCM3/NOPB SOT-23 DBZ 3 1000 178.0 8.4 3.3 2.9 1.22 4.0 8.0 Q3
LM431BCM3X/NOPB SOT-23 DBZ 3 3000 178.0 8.4 3.3 2.9 1.22 4.0 8.0 Q3
LM431BCMX SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1
LM431BCMX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1
LM431BIM3 SOT-23 DBZ 3 1000 178.0 8.4 3.3 2.9 1.22 4.0 8.0 Q3
LM431BIM3/NOPB SOT-23 DBZ 3 1000 178.0 8.4 3.3 2.9 1.22 4.0 8.0 Q3
LM431BIM3X SOT-23 DBZ 3 3000 178.0 8.4 3.3 2.9 1.22 4.0 8.0 Q3
PACKAGE MATERIALS INFORMATION
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Pack Materials-Page 1
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
LM431BIM3X/NOPB SOT-23 DBZ 3 3000 178.0 8.4 3.3 2.9 1.22 4.0 8.0 Q3
LM431BIMX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1
LM431CCM3/NOPB SOT-23 DBZ 3 1000 178.0 8.4 3.3 2.9 1.22 4.0 8.0 Q3
LM431CCM3X SOT-23 DBZ 3 3000 178.0 8.4 3.3 2.9 1.22 4.0 8.0 Q3
LM431CCM3X/NOPB SOT-23 DBZ 3 3000 178.0 8.4 3.3 2.9 1.22 4.0 8.0 Q3
LM431CIM3 SOT-23 DBZ 3 1000 178.0 8.4 3.3 2.9 1.22 4.0 8.0 Q3
LM431CIM3/NOPB SOT-23 DBZ 3 1000 178.0 8.4 3.3 2.9 1.22 4.0 8.0 Q3
LM431CIM3X SOT-23 DBZ 3 3000 178.0 8.4 3.3 2.9 1.22 4.0 8.0 Q3
LM431CIM3X/NOPB SOT-23 DBZ 3 3000 178.0 8.4 3.3 2.9 1.22 4.0 8.0 Q3
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
LM431ACM3 SOT-23 DBZ 3 1000 210.0 185.0 35.0
LM431ACM3/NOPB SOT-23 DBZ 3 1000 210.0 185.0 35.0
LM431ACM3X SOT-23 DBZ 3 3000 210.0 185.0 35.0
LM431ACM3X/NOPB SOT-23 DBZ 3 3000 210.0 185.0 35.0
LM431ACMX SOIC D 8 2500 367.0 367.0 35.0
LM431ACMX/NOPB SOIC D 8 2500 367.0 367.0 35.0
LM431AIM3 SOT-23 DBZ 3 1000 210.0 185.0 35.0
LM431AIM3/NOPB SOT-23 DBZ 3 1000 210.0 185.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 23-Sep-2013
Pack Materials-Page 2
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
LM431AIM3X/NOPB SOT-23 DBZ 3 3000 210.0 185.0 35.0
LM431AIMX/NOPB SOIC D 8 2500 367.0 367.0 35.0
LM431BCM3 SOT-23 DBZ 3 1000 210.0 185.0 35.0
LM431BCM3/NOPB SOT-23 DBZ 3 1000 210.0 185.0 35.0
LM431BCM3X/NOPB SOT-23 DBZ 3 3000 210.0 185.0 35.0
LM431BCMX SOIC D 8 2500 367.0 367.0 35.0
LM431BCMX/NOPB SOIC D 8 2500 367.0 367.0 35.0
LM431BIM3 SOT-23 DBZ 3 1000 210.0 185.0 35.0
LM431BIM3/NOPB SOT-23 DBZ 3 1000 210.0 185.0 35.0
LM431BIM3X SOT-23 DBZ 3 3000 210.0 185.0 35.0
LM431BIM3X/NOPB SOT-23 DBZ 3 3000 210.0 185.0 35.0
LM431BIMX/NOPB SOIC D 8 2500 367.0 367.0 35.0
LM431CCM3/NOPB SOT-23 DBZ 3 1000 210.0 185.0 35.0
LM431CCM3X SOT-23 DBZ 3 3000 210.0 185.0 35.0
LM431CCM3X/NOPB SOT-23 DBZ 3 3000 210.0 185.0 35.0
LM431CIM3 SOT-23 DBZ 3 1000 210.0 185.0 35.0
LM431CIM3/NOPB SOT-23 DBZ 3 1000 210.0 185.0 35.0
LM431CIM3X SOT-23 DBZ 3 3000 210.0 185.0 35.0
LM431CIM3X/NOPB SOT-23 DBZ 3 3000 210.0 185.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 23-Sep-2013
Pack Materials-Page 3
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