ESDA25B1 - STMicroelectronics

ESDA25B1

October 1999 - Ed : 2

6 BIDIRECTIONAL TRANSIL FUNCTIONS

VERY LOW CA PACITANCE : C= 20 pF @ VRM

150 W peak puls e power (8/20 µs)

FEATURES SO-8

FUNCTIONA L DI AGRAM

I/O 1

I/O 2

I/O 3 I/O 4

I/O 6

GNDGND

I/O 5

DESCRIPTION

The ESDA25B1 is a monolithic voltage suppressor

designed to protect components which are

connected to dat a and transmission lines against

EDS.

TRANSIL ARRAY

FOR ESD PROTEC TION

Appl icati on Spec ific Disc retes

A.S.D.

Where transient overvoltage protection in ESD

sensitive equipment is required, s uch as :

- COMPUTE R

- PR INTE RS

- COMMUNICA TI ON SYSTEM S

It is particulary recommended for RS232 I/O port

protection where the line int erface withstands only

2 kV ESD surges.

APPLICATIONS

BENEFITS

High ESD protection level : up to 25 kV

High integration

Suitable for high dens ity boar ds

IEC 1000-4-2 : level 4

MIL STD 883C-Method 3015-6 : c lass 3

(human body model)

COMPLIES WITH THE FOLLOWING STANDARDS :

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Symbol Parameter

VRM Stand-off voltage

VBR Breakdown voltage

VCL Clamping voltage

IRM Leakage current

IPP Peak puls e current

αT Voltage temperature c oefficient

C Capacitance

Rd Dynamic resistance

ELECTRICAL CHARACTERISTICS (Tamb = 25° C)

Symbol Parameter Value Unit

VPP Electrostatic dischar ge

MIL STD 883C - Method 3015- 6 25 kV

PPP Peak pulse power (8/20µs) 150 W

Tstg

TjStorage temperature range

Maximum junc tion t emperature - 55 to + 150

125 °C

°C

TLMaximum lead temperature for s oldering during 10s 260 °C

ABSOLUTE MAXIMUM RATINGS (Tamb = 25°C)

Types VBR @ IRIRM @ VRM Rd αTC

min. max. max. typ. max. typ.

note 1 note 1 note 2 note 3 0V bias

VVmA

AV Ω

10-4/°CpF

ESDA25B1 25 30 1 2 24 1.5 9.7 15

note 1 : Between any I/O pin and Groung

note 2 : Square pulse, Ipp = 25A, tp=2.5µs.

note 3 : ∆ V BR = αT* (Tamb -25°C) * VBR (25°C)

ESDA25B1

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The ES DA f amily has been designed t o c lamp fast

spikes like ESD. Generally the PCB designers

need to calculate easily the clamping voltage VCL.

This is why we give the dynamic resistance in

addition to the classical parameters. The voltage

across the protection cell can be calculated with

the following formula:

VCL = VBR + Rd IPP

Where Ipp is the peak current through the ESDA cell.

DYNAM IC RE SISTANCE M EASUREMENT

The short duration of the E SD has led us t o pr efer

a more adapted test wave, as below defined, to the

classical 8/20µs and 10/1000µs surges.

2.5µs duration measurement wave.

As the value of the dynamic resistance remains

stable for a surge duration lower than 20µs, the

2.5µs rectangular surge is well adapted. In addition

both rise and fall time s are optimized to avoid any

parasitic phenomenon during the m easur ement of

Rd.

CALCULATION OF THE CLAMPING VOLTAGE

USE OF T HE DY NAM IC RE SIS TA NCE

2µs

tp = 2.5µs

Ipp

ESDA25B1

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0 25 50 75 100 125 150

0.0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1.0

1.1 Ppp[Tj initial]/Ppp[Tj initial=25°C]

Tj initial(°C)

Fig. 1 : Peak power dissipation versus initial

junction temperature.

20 25 30 35 40 45 50 55 60

0.1

1.0

10.0

50.0 Ipp(A)

tp=2.5µs

V (V)

Fig. 3 : Clamping voltage versus peak pulse

current (Tj initial = 25 °C).

Rectangular waveform tp = 2.5 µs.

110100

100

1000

2000 Ppp(W)

tp(µs)

Fig. 2 : Peak pulse power versus exponential

pulse duration (Tj initial = 25 ° C).

12 510 30

20 C(pF)

F=1MHz

Vosc=30mV

V (V)

Fig. 4 : Capacitance versus reverse applied

voltage (typical values).

25 50 75 100 125

100

200 I [Tj] / I [Tj=25°C]

Tj(°C)

Fig. 5 : Relative variation of leakage current versus

junction temperature (ty pical values ).

ESDA25B1

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PACKAGE M ECHANICAL DATA

SO-8 Plastic

Packaging : Preferred pac kaging is tape and reel.

Weight : 0.08g.

Information furnished is beli eved to be accurate and rel iable. However, STMic roelectronics assumes no responsibility for the consequen ces of

use of such informat ion nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by

implication or otherwise under any patent or patent rights of STMic roelectronics . Specificat ions men tioned in this publica tion ar e subject to

change without notice. Thi s publication supersedes and replaces all information previously supplied.

STMicroelectro nics products are not authori zed for use as critical components in l i fe s upport devices or systems wi thout express written ap-

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MARKING : Logo, Date Code, E 25B1

REF. DIMENSIONS

Millimeters Inches

Min. Typ. Max. Min. Typ. Max.

A 1.75 0.069

a1 0.1 0.25 0.004 0.010

a2 1.65 0.065

a3 0.65 0.85 0.026 0.033

b 0.35 0.48 0.014 0.019

b1 0.19 0.25 0.007 0.010

C 0.25 0.5 0.010 0.020

c1 45° (typ)

D 4.8 5.0 0.189 0.197

E 5.8 6.2 0.228 0.244

e 1.27 0.050

e3 3.81 0.150

F 3.8 4.0 0.15 0.157

L 0.4 1.27 0.016 0.050

M 0.6 0.024

(ma x)

OR DER CODE

ESDA 25 B 1 RL

ESD ARRA Y

VBR min PACKAGE : SO-8

Bidirectionel

PACKAGING:

RL = Tape and reel

= Tube

ESDA25B1

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