FUNCTIONAL BLOCK DIAGRAM
+V
OUT
RETURN
+ SENSE
ADJUST
STATUS
V
AUX
INHIBIT
SYNC
I
SHARE
TEMP
–V
IN
+V
IN
FIXED
FREQUENCY
DUAL
INTERLEAVED
POWER TRAIN
– SENSE
RETURN
RETURN
+V
OUT
+V
OUT
OUTPUT
FILTER
OUTPUT SIDE
CONTROL
CIRCUIT
INPUT SIDE
CONTROL
CIRCUIT
EMI FILTER
ADDC02803SC
ADDC02805SA
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
a
ADDC02803SC/ADDC02805SA
FEATURES
28 V dc Input, 5 V dc @ 20 A, 100 W Output
(ADDC02805SA)
28 V dc Input, 3.3 V dc @ 20 A, 66 W Output
(ADDC02803SC)
Integral EMI Filter Designed to Meet MIL-STD-461D
Low Weight: 80 Grams
NAVMAT Derated
Many Protection and System Features
APPLICATIONS
Commercial and Military Airborne Electronics
Missile Electronics
Space-Based Antennae and Vehicles
Mobile/Portable Ground Equipment
Distributed Power Architecture for Active Array Radar
GENERAL DESCRIPTION
The ADDC02803SC and ADDC02805SA hybrid dc/dc con-
verters with integral EMI filters offer the highest power density
of any dc/dc converter with their features and in their power
range available today. The converters with integral EMI filters
are fixed frequency, 1 MHz square wave switching dc/dc power
supplies. They are not variable frequency resonant converters.
In addition to many protection features, these converters have
system level features that allow them to be used as components
in larger systems as well as stand-alone power supplies. The
units are designed for high reliability and high performance
applications where saving space and/or weight are critical.
The ADDC02803SC and ADDC02805SA are available in
three screening grades; all grades use a hermetically sealed,
molybdenum based hybrid package. Three screening levels
are available, including military SMD.
28 V/66 W/100 W DC/DC Converters
with Integral EMI Filter
PRODUCT HIGHLIGHTS
1. Up to 60 W/cubic inch power density with an integral EMI
filter designed to meet all applicable requirements in MIL-
STD-461D when installed in a typical system setup.
2. Light weight: 80 grams
3. Operational and survivable over a wide range of input condi-
tions: 16 V–50 V dc; survives low line, high line and positive
and negative transients. See section entitled: Input Voltage
Range.
4. High reliability; NAVMAT derated
5. Protection features include:
Output Overvoltage Protection
Output Short Circuit Current Protection
Thermal Monitor/Shutdown
Input Overvoltage Shutdown
Input Transient Protection
6. System level features include:
Current Sharing for Parallel Operation
Inhibit Control
Output Status Signal
Synchronization for Multiple Units
Input Referenced Auxiliary Voltage Supply
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703 © Analog Devices, Inc., 1998
ADDC02803SC/ADDC02805SA–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
Case Test ADDC02803SC ADDC02805SA
Parameter Temp Level Conditions Min Typ Max Min Typ Max Units
INPUT CHARACTERISTICS
Steady State Operating Input Voltage Range
1
Full VI I
O
= 2 A to 20 A 18 28 40 18 28 40 V
Abnormal Operating Input Voltage Range
(Per MIL-STD-704D)
1
Full VI I
O
= 2 A to 16 A 16 50 16 50 V
Input Overvoltage Shutdown +25°C I 50 52.5 55 50 52.5 55 V
No Load Input Current +25°C I 90 90 mA
Disabled Input Current Full VI 0.85 2.0 0.85 2.0 mA
OUTPUT CHARACTERISTICS
2, 3
Output Voltage (V
O
) +25°CI I
O
= 2 A to 20 A, V
IN
= 18 V to 40 V dc 3.26 3.30 3.34 5.00 5.025 5.05 V
Full VI I
O
= 2 A to 20 A, V
IN
= 18 V to 40 V dc 3.2 3.4 4.925 5.125 V
Full VI I
O
= 2 A to 16 A, V
IN
= 16 V to 50 V dc 3.2 3.4 4.925 5.125 V
Line Regulation +25°CV I
O
= 20 A, V
IN
= 18 V to 40 V dc 1 1 mV
Load Regulation +25°CV V
IN
= 28 V dc, I
O
= 2 A to 20 A 1 1 mV
Output Ripple/Noise
4
+25°CI I
O
= 20 A, 5 kHz – 2 MHz BW 15 35 15 50 mV p-p
Output Current (I
O
) Full VI V
IN
= 18 V to 40 V dc 2 21.2 2 20 A
Output Overvoltage Protection +25°CV I
O
= 20 A, Open Remote Sense Connection 145 125 % V
O
Nom
Output Current Limit +25°CV V
O
= 90% V
OUT
Nom 130 % I
O
max
Output Short Circuit Current +25°C I 39 35 A
ISOLATION CHARACTERISTICS
Isolation Resistance +25°C I Input to Output or Any Pin to Case at 500 V dc 100 100 MΩ
DYNAMIC CHARACTERISTICS
4
Output Voltage Deviation Due to
Step Change in Load +25°CV I
O
= 10 A to 20 A or 20 A to 10 A di/dt = 0.5 A/µs 350 500 mV
Response Time Due to Step Change in Load +25°CV I
O
= 10 A to 20 A or 20 A to 10 A, di/dt = 0.5 A/µs, 135 125 µs
Time for V
OUT
to Return within 2% of Final Value
Soft Start Turn-On Time
5
+25°CI I
O
= 20 A, From Inhibit High to Status High 1 4 7 20 ms
THERMAL CHARACTERISTICS
Efficiency +25°CI I
O
= 12 A 75 79 77 80 %
Max VI I
O
= 12 A 75 77 %
Min VI I
O
= 12 A 72 75 %
+25°CI I
O
= 20 A 74 77 77 79 %
Max VI I
O
= 20 A 74 77 %
Min VI I
O
= 20 A 73 75 %
Hottest Junction Temperature
6
+90°CV I
O
= 20 A 110 110 °C
CONTROL CHARACTERISTICS
Clock Frequency Full VI I
O
= 2 A 0.85 0.99 0.85 0.99 MHz
ADJUST (Pin 3) V ADJ +25°C I 1.26 1.32 1.38 1.92 2.04 2.10 V
STATUS (Pin 4)
V
OH
+25°CI I
OH
= 400 µA 2.4 4.0 2.4 4.0 V
V
OL
+25°CI I
OL
= 1 mA 0.15 0.7 0.15 0.7 V
V
AUX
(Pin 5)
V
O
(nom) +25°CI I
AUX
= 5 mA, Load Current = 20 A 13.2 13.7 14.2 14.3 14.7 15.3 V
INHIBIT (Pin 6)
V
IL
+25°C I 0.5 0.5 V
I
IL
+25°CI V
IL
= 0.5 V 1.2 1.2 mA
V
I
(Open Circuit) +25°C I 15 15 V
SYNC (Pin 7)
7
V
IH
+25°C I 4.0 4.0 V
I
IH
+25°CI V
IH
= 7.0 V 175 175 µA
I
SHARE
(Pin 8) +25°CI I
O
= 20 A 2.62 2.72 2.82 2.75 2.82 2.95 V
TEMP (Pin 9) +25°C V 3.90 3.90 V
NOTES
1
50 V dc upper limit rated for transient condition of up to 50 ms. 16 V dc lower limit rated for continuous operation during emergency condition. Steady state and
abnormal input voltage range require source impedance sufficient to insure input stability at low line. See sections entitled System Instability Considerations and Input
Voltage Range.
2
Measured at the remote sense points.
3
Unit regulates output voltage to zero load.
4
C
LOAD
= 0.
5
Output is fully loaded into a constant resistive load.
6
Refer to section entitled Thermal Characteristics for more information.
7
Unit has internal pull-down; refer to section entitled Pin 7 (SYNC).
Specifications subject to change without notice.
REV. A
–2–
(TC = +25ⴗC, VIN = 28 V dc ⴞ 0.5 V dc, unless otherwise noted; full temperature range is
–55ⴗC to +90ⴗC; all temperatures are case and TC is the temperature measured at the center of the package bottom.)
ADDC02803SC/ADDC02805SA
REV. A –3–
ABSOLUTE MAXIMUM RATINGS*
INHIBIT . . . . . . . . . . . . . . . . . . . . . . . . . . 50 V dc, –0.5 V dc
SYNC . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8.0 V dc, –0.5 V dc
I
SHARE
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 V dc, –0.5 V dc
TEMP . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 V dc, –0.3 V dc
Common-Mode Voltage, Input to Output . . . . . . . . . 500 V dc
Lead Soldering Temp (10 sec) . . . . . . . . . . . . . . . . . . . +300°C
Storage Temperature . . . . . . . . . . . . . . . . . . –65°C to +150°C
Maximum Junction Temperature . . . . . . . . . . . . . . . . +150°C
Maximum Case Operating Temperature . . . . . . . . . . . +125°C
*Absolute maximum ratings are limiting values, to be applied individually, and
beyond which the serviceability of the circuit may be impaired. Functional
operability under any of these conditions is not necessarily implied. Exposure of
absolute maximum rating conditions for extended periods of time may affect
device reliability.
ORDERING INFORMATION
Operating
Temperature
Device Range (Case) Description
ADDC02803SCKV –40°C to +85°C Hermetic Package
ADDC02803SCTV –55°C to +90°C Hermetic Package
5962-9760101HXC
(ADDC2803SCTV/QMLH) –55°C to +125°C Hermetic Package
ADDC02805SAKV –40°C to +85°C Hermetic Package
ADDC02805SATV –55°C to +90°C Hermetic Package
5962-9570701HXC
(ADDC2805SATV/QMLH) –55°C to +125°C Hermetic Package
EXPLANATION OF TEST LEVELS
Test Level
I – 100% production tested.
II – 100% production tested at +25°C, and sample tested at
specified temperatures.
III – Sample tested only.
IV – Parameter is guaranteed by design and characterization
testing.
V – Parameter is a typical value only.
VI – All devices are 100% production tested at +25°C. 100%
production tested at temperature extremes for military
temperature devices; guaranteed by design and charac-
terization testing for industrial devices.
PIN DESCRIPTIONS
Pin
No. Name Function
1 –SENSE Feedback loop connection for remote sensing
output voltage. Must always be connected to
output return for proper operation.
2 +SENSE Feedback loop connection for remote sensing
output voltage. Must always be connected to
+V
OUT
for proper operation.
3 ADJUST Adjusts output voltage setpoint.
4 STATUS Indicates output voltage is within ±5% of
nominal. Active high referenced to –SENSE
(Pin 1).
5V
AUX
Low level dc auxiliary voltage supply refer-
enced to input return (Pin 10).
6INHIBIT Power Supply Inhibit. Active low and refer-
enced to input return (Pin 10).
7 SYNC Clock synchronization input for multiple
units; referenced to input return (Pin 10).
8I
SHARE
Current share pin which allows paralleled
units to share current typically within ±5% at
full load; referenced to input return (Pin 10).
9 TEMP Case temperature indicator and temperature
shutdown override; referenced to input return
(Pin 10).
10 –V
IN
Input Return.
11 +V
IN
+28 V Nominal Input Bus.
12 +V
OUT
+5 V dc Output (ADDC02805SA).
+3.3 V dc Output (ADDC02803SC).
13 +V
OUT
+5 V dc Output (ADDC02805SA).
+3.3 V dc Output (ADDC02803SC).
14 +V
OUT
+5 V dc Output (ADDC02805SA).
+3.3 V dc Output (ADDC02803SC).
15 RETURN Output Return.
16 RETURN Output Return.
17 RETURN Output Return.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Therefore, proper ESD precautions are recommended to avoid performance degradation or loss
of functionality.
PIN CONFIGURATION
1
11 12
17
TOP
VIEW
WARNING!
ESD SENSITIVE DEVICE
ADDC02803SC/ADDC02805SA–Typical Performance Curves
REV. A
–4–
MAXIMUM POWER OUTPUT – Watts
INPUT VOLTAGE – V
16.0
15.5
30 5535 40 45 50
14.0
13.5
13.0
15.0
14.5
60 65 70 80 90 100
ADDC02803SC
ADDC02805SA
Figure 4. Low Line Dropout vs. Load at +90
°
C Case
Temperature
T
CASE
5.100
5.050
4.900
–55 125–35 –15 5 25 45 65 85 105
5.000
4.950
V
OUT
Figure 5. Output Voltage vs. Case Temperature (
°
C)
(ADDC02805SA)
V
OUT
T
CASE
3.340
3.320
3.260
–55 75–45 –35 –25 –15 –5 5 15 25 35 45 55 65
3.300
3.280
85 95
Figure 6. Output Voltage vs. Case Temperature (
°
C)
(ADDC02803SC)
OUTPUT POWER – WATTS
6457010 15 20 25 30 35 40 45 50 55 60 65
OUTPUT POWER – Watts
82
6810 10020 30 40 50 60 70 80 90
80
76
74
72
70
78
EFFICIENCY – %
40V 18V
28V
V
IN
= 28V
V
O
= 5V
T
C
= +258C
Figure 1. Efficiency vs. Line and Load at +25
°
C
(ADDC02805SA)
OUTPUT POWER – Watts
80
70
64 57010 15 20 25 30 35 40 45 50 55 60 65
78
72
68
66
76
74
18V 28V
40V
Figure 2. Efficiency vs. Line and Load at +25
°
C
(ADDC02803SC)
T
CASE
–
8
C
80
79
75
–55
EFFICIENCY – %
–35 –15 5 25 45 65
78
77
76
85
81
ADDC02803SC
ADDC02805SA
Figure 3. Efficiency vs. Case Temperature (
°
C)
(at Nominal V
IN
, 75% Max Load)
ADDC02803SC/ADDC02805SA
REV. A –5–
10
0%
100
90 V
O
V
INHIBIT
1V
10V
2ms
Figure 7. Output Voltage Transient During Turn-On with
Minimum Load Displaying Soft Start When Supply Is
Enabled (ADDC02805SA)
10
100
90 V
O
V
INHIBIT
1V
5V
0.2ms
0%
Figure 8. Output Voltage Transient During Turn-On with
Minimum Load Displaying Soft Start When Supply Is
Enabled (ADDC02803SC)
10
0%
100
90 VO
IO
100mV
10A
50
m
s
Figure 9. Output Voltage Transient Response to
a 10 A to 20 A Step Change in Load with Zero Load
Capacitance (ADDC02805SA)
10
100
90 V
O
I
O
10A
50
m
s
50mV
50mV
0%
Figure 10. Output Voltage Transient Response to
a 10 A to 20 A Step Change in Load with Zero Load
Capacitance (ADDC02803SC)
FREQUENCY – Hz
0
–10
–90
10 50k100 1k 10k
–40
–60
–70
–80
–20
–30
–50
–100
|AS| – dB
Figure 11. Audio Susceptibility (Magnitude of V
OUT
/V
IN
)
(ADDC02805SA)
FREQUENCY – Hz
0
AS – dB
–10010 50k100 1k 10k
–90
–80
–70
–60
–50
–40
–30
–20
–10
Figure 12. Audio Susceptibility (Magnitude of V
OUT
/V
IN
)
(ADDC02803SC)
ADDC02803SC/ADDC02805SA
REV. A
–6–
FREQUENCY – kHz
10
0.01 1000.1 1 10
0.1
1
0.01
zZ
IN
z – V
V
IN
= 28V
V
IN
= 18V
V
IN
= 28V
V
IN
= 18V
Figure 13. Incremental Input Impedance (Magnitude)
(ADDC02805SA)
FREQUENCY – Hz
10
ZIN – V
1
0.0110 100k100 1k 10k
0.1
VIN = 18V
VIN = 28V
Figure 14. Incremental Input Impedance (Magnitude)
(ADDC02803SC)
FREQUENCY – kHz
100
0.01 1000.1 1 10
1
10
0.1
zZOUTz – mV
Figure 15. Incremental Output Impedance (Magnitude)
(ADDC02805SA)
FREQUENCY – Hz
100
ZOUT – mV
10
0.110 100k100 1k 10k
1
Figure 16. Incremental Output Impedance (Magnitude)
(ADDC02803SC)
1mV
100mV
Volts
2.00 MHz/DIV
Figure 17. Output Voltage Ripple Spectrum
(ADDC02803SC)
1mV
100mV
Volts
2.00 MHz/DIV
Figure 18. Output Voltage Ripple Spectrum
(ADDC02805SA)
Typical EMI Curves and Test Setup–ADDC02805SA
–7–
FREQUENCY – MHz
130
0.010.0001 0.001
70
90
30
EMISSION LEVEL – dB mV
110
50
CONDUCTED EMISSIONS CE101
CE101–1 4.5 AMPS
Figure 19. Conducted Emissions, MIL-STD-461D, CE101,
+28 V Hot Line, 100 W Load
FREQUENCY – MHz
130
100.01 0.1
70
90
30
EMISSION LEVEL – dB mV
110
50
1
CONDUCTED EMISSIONS CE102
LIMIT 28VDC
Figure 20. Conducted Emissions, MIL-STD-461D, CE102,
+28 V Hot Line, 100 W Load
FREQUENCY – MHz
166
106
126
66
EMISSION LEVEL – dB/pT
146
86
0.10.0001 0.001 0.01
RE101 MIL-STD-461D
RE101–1
Figure 21. Radiated Emissions, MIL-STD-461D, RE101,
100 W Load
FREQUENCY – MHz
90
100.01 0.1
30
50
70
10
–30
EMISSION LEVEL – dB mV/m
1 100 1000
RADIATED EMISSIONS RE102
RE102–2
Figure 22. Radiated Emissions, MIL-STD-461D, RE102,
Vertical Polarity, 100 W Load
REV. A
+V
IN
–V
IN
+V
OUT
RETURN
CASE
LISN 1/4V
0.1mF
GROUND PLANE
82nF
82nF
2mF
1V
100mF
TWO METERS OF
TWISTED CABLE
NOTE: 100mF CAPACITOR AND 1V RESISTOR PROVIDE STABILIZATION FOR 100mH DIFFERENTIAL SOURCE INDUCTANCE
INTRODUCED BY THE LISNs. REFER TO SECTION ON EMI CONSIDERATIONS FOR MORE INFORMATION.
LISN
Figure 23. Schematic of Test Setup for EMI Measurements
ADDC02803SC/ADDC02805SA
REV. A
–8–
one of the output pins of the converter, or remotely at the load.
A remote connection at the load can adjust for voltage drops of
as much as 0.25 V dc between the converter and the load.
Long remote sense leads can affect converter stability, although
this condition is rare. The impedance of the long power leads
between the converter and the remote sense point could affect
the converter’s unity gain crossover frequency and phase margin.
Consult factory if long remote sense leads are to be used.
Pin 3 (ADJUST)
An adjustment pin is provided so that the user can change the
nominal output voltage during the prototype stage. Since very
low temperature coefficient resistors are used to set the output
voltage and maintain tight regulation over temperature, using
standard external resistors to adjust the output voltage will
loosen output regulation over temperature. Furthermore, since
the status trip point is not changed when the output voltage is
adjusted using external resistors, the status line will no longer
trip at the standard levels of the newly adjusted output voltage.
If necessary, modified standard units can be ordered with the
necessary changes made inside the package at the factory. The
ADJUST function is sensitive to noise, and care should be taken
in the routing of connections.
To make the output voltage higher, place a resistor from
ADJUST (Pin 3) to –SENSE (Pin 1). To make the output
voltage lower, place a resistor from ADJUST (Pin 3) to +SENSE
(Pin 2). Figures 24 and 25 show resistor values for a ±5% change
in output voltage:
OUTPUT VOLTAGE – %
8
7
RESISTANCE – MV
199 9598 97 96
5
4
3
2
6
Figure 24. External Resistor Value for Reducing Output
Voltage
OUTPUT VOLTAGE – %
5
4
RESISTANCE – MV
0101 105102 103 104
3
2
1
Figure 25. External Resistor for Increasing Output Voltage
BASIC OPERATION
The ADDC02803SC and ADDC02805SA converters use a
flyback topology with dual interleaved power trains operating
180° out of phase. Each power train switches at a fixed fre-
quency of 500 kHz, resulting in a 1 MHz fixed switching fre-
quency as seen at the input and output of the converter. In a
flyback topology, energy is stored in the inductor during one
half portion of the switching cycle and is then transferred to the
output filter during the next half portion. With two interleaved
power trains, energy is transferred to the output filter during
both halves of the switching cycle, resulting in smaller filters to
meet the required ripple.
A five pole differential input EMI filter, along with a common-
mode EMI capacitor and careful attention to layout parasitics, is
designed to meet all applicable requirements in MIL-STD-461D
when installed in a typical system setup. A more detailed dis-
cussion of CE102 and other EMI issues is included in the sec-
tion entitled EMI Considerations.
The converters use current mode control and employ a high
performance opto-isolator in its feedback path to maintain
isolation between input and output. The control circuit is
designed to give a nearly constant output current as the output
voltage drops from V
O
nom to V
SC
during a short circuit
condition. It does not let the current fold back below the
maximum rated output current. The output overvoltage
protection circuitry, which is independent of the normal
feedback loop, protects the load against a break in the remote
sense leads. Remote sense connections, which can be made at
the load, can adjust for voltage drops of as much as 0.25 V dc
between the converter and the load, thereby maintaining an
accurate voltage level at the load.
An input overvoltage protection feature shuts down the con-
verter when the input voltage exceeds (nominally) 52.5 V dc.
An internal temperature sensor shuts down the unit and pre-
vents it from becoming too hot if the heat removal system fails.
The temperature sensed is the case temperature and is factory
set to trip at a nominal case temperature of 110°C to 115°C.
The shutdown temperature setting can be raised externally or
disabled by the user.
Each unit has an INHIBIT pin that can be used to turn off the
converter. This feature can be used to sequence the turn-on of
multiple converters and to reduce input power draw during
extended time in a no load condition.
A SYNC pin, referenced to the input return line (Pin 10),
is available to synchronize multiple units to one switching
frequency. This feature is particularly useful in eliminating
beat frequencies which may cause increased output ripple on
paralleled units. A current share pin (I
SHARE
) is available that
permits paralleled units to share current typically within 5% at
full load.
A low level dc auxiliary voltage supply referenced to the input
return line is provided for miscellaneous system use.
PIN CONNECTIONS
Pins 1 and 2 (ⴞSENSE)
Pins 1 and 2 must always be connected for proper operation,
although failure to make these connections will not be catastrophic
to the converter under normal operating conditions. Pin 1 must
always be connected to the output return and Pin 2 must always
be connected to +V
OUT
. These connections can be made at any
ADDC02803SC/ADDC02805SA
REV. A –9–
With regard to the range to which the output voltage can be
adjusted by the user, there are two concerns. As the output
voltage is raised it may become difficult to maintain regulation
at full power and low input voltage. As the output voltage is
lowered, it may become difficult to maintain regulation at mini-
mum power and high input line. In addition, if the output
voltage is reduced below 3 V, the secondary side control circuit
may not have a sufficient supply voltage to operate correctly.
Pin 4 (STATUS)
Pin 4 is active high referenced to –SENSE (Pin 1), indicating
that the output voltage is typically within ±5%. The pin is both
pulled up and down by internal circuitry. Figures 26, 27 and 28
show the typical source and sink capabilities of the status output.
Refer to the paragraphs describing Pin 3 (ADJUST) for effect
on status trip point.
I
OH
– mA
V
OH
– V
3.00
2.25
1.50
0.4 1.40.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3
2.75
2.50
2.00
1.75
Figure 26. Source Capability of Status Output
(ADDC02803SC)
IOH – mA
4.2
3.8
2.20.8 2.61.0
VOH – V
1.2 1.4 1.6 1.8 2.0 2.2 2.4
3.4
3.0
2.6
Figure 27. Source Capability of Status Output
(ADDC02805SA)
IOL – mA
1.0
0.8
0.01.0 19.04.0 7.0
VOL – V
10.0 13.0 16.0
0.6
0.4
0.2
Figure 28. Sink Capability of Status Output
Pin 5 (V
AUX
)
Pin 5 is referenced to the input return and provides a semi-
regulated 13 V to 15 V dc voltage supply for miscellaneous
system use. The maximum permissible current draw is 5 mA
and the voltage varies with the output load of the converter as
shown in Figures 29 and 30.
OUTPUT CURRENT – A
15.0
14.5
13.0 0222 4 6 8 10 12 14 16 18 20
14.0
13.5
VAUX – V
Figure 29. V
AUX
vs. Converter Output Current
(ADDC02805SA)
OUTPUT CURRENT – A
14.0
V
AUX
– V
13.5
11.50222 4 6 8 10 12 14 16 18 20
13.0
12.5
12.0
Figure 30. V
AUX
vs. Converter Output Current
(ADDC02803SC)
ADDC02803SC/ADDC02805SA
REV. A
–10–
Pin 6 (INHIBIT)
Pin 6 is active low and is referenced to the input return of the
converter. Connecting it to the input return will turn the con-
verter off. For normal operation, the inhibit pin is internally pulled
up to 12 V. Use of an open collector circuit is recommended.
When Pin 6 is disconnected from input return, the converter
will restart in the soft-start mode. Pin 6 must be kept low for at
least 2 milliseconds to initiate a full soft start. Shorter off times
will result in a partial soft start. Figure 31 shows the input
characteristics of Pin 6.
VIL – V
1.2
1.1
0.70.5 2.01.0 1.5
1.0
0.9
0.8
IIL – mA
Figure 31. Input Characteristics of Pin 6 When Pulled Low
Pin 7 (SYNC)
Pin 7 can be used for connecting multiple converters to a mas-
ter clock. This master clock can be either an externally user-
supplied clock or a converter that has been modified and
designated as a master unit. Capacitive coupling of the clock
signal will ensure that if the master clock stops working the
individual units will continue to operate at their own internal
clock frequency, thereby eliminating a potential single point
failure. Capacitive coupling will also permit a wider duty cycle
to be used. Consult factory for more information. The SYNC
pin has an internal pull-down so it is not necessary to sink any
current when driving the pin low. Reference Figure 38 for a
fault tolerant, secondary side powered SYNC drive circuit.
For user-supplied master clocks with no external circuitry, the
following specifications must be met:
a. Frequency: 1.00 MHz min
b. Duty cycle: 7% min, 14% max
c. High state voltage high level: 4 V min to 7 V max
d. Low state voltage low level: 0 V min to 3.0 V max
Users should note that the SYNC pin is referenced to the input
return of the converter. If the user-supplied master clock is
generated on the output side of the converter, the signal should
be isolated.
Users should be careful about the frequency selected for the
external master clock. Higher switching frequencies will
reduce efficiency and may reduce the amount of output power
available at minimum input line. Consult factory for modi-
fied standard switching frequency to accommodate system
clock characteristics.
Pin 8 (I
SHARE
)
Pin 8 allows paralleled converters to share the total load cur-
rent, typically within ±5% at full load. To use the current share
feature, connect all current share pins to each other and con-
nect the SENSE pins on each of the converters. The current
sharing function is sensitive to the differential voltage between the
input return pins of paralleled converters. The current sharing
function is also sensitive to noise, and care should be taken in
the routing of connections. Refer to Figure 37 for typical appli-
cation circuits using paralleled converters.
Pin 9 (TEMP)
Pin 9 can be used to indicate case temperature or to raise or
disable the temperature at which thermal shutdown occurs.
Typically, 3.90 V corresponds to +25°C, with a +13.1 mV/°C
change for every 1°C rise. The sensor IC (connected from Pin
9 to the input return [Pin 10]) has a 13.1 kΩ impedance.
The thermal shutdown feature has been set to shut down the
converter when the case temperature is nominally 110°C to
115°C. To raise the temperature at which shutdown occurs,
connect a resistor with the value shown in Figure 32 from Pin 9
to the input return (Pin 10). To completely disable the tempera-
ture shutdown feature, connect a 50 kΩ resistor from Pin 9 to
the input return (Pin 10).
SHUTDOWN CASE TEMPERATURE –
8
C
1400
0
120 150125 130 135 140 145
1200
1000
800
400
200
600
RESISTANCE – kV
Figure 32. External Resistor Value for Raising
Temperature Shutdown Point
INPUT VOLTAGE RANGE
The steady state operating input voltage range for the converter
is defined as 18 V to 40 V. The abnormal operating input
voltage range is defined as 16 V to 50 V. In accordance with
MIL-STD-704D, the converter can operate up to 50 V dc
input for transient conditions as long as 50 milliseconds, and it
can operate down to 16 V dc input for continuous operation
during emergency conditions. Figure 4 (typical low line dropout
vs. load) shows that the converter can work continuously down
to and below 16 V dc under reduced load conditions.
The ADDC02803SC and ADDC02805SA can be modified to
survive, but not work through, the upper limit input voltages
defined in MIL-STD-704A (aircraft) and MIL-STD-1275A
(military vehicles). MIL-STD-704A defines an 80 V surge that
lasts for 1 second before it falls below 50 V, while MIL-STD-
1275A defines a 100 V surge that lasts for 200 milliseconds
ADDC02803SC/ADDC02805SA
REV. A –11–
before it falls below 50 V. In both cases, the ADDC02803SC/
ADDC02805SA can be modified to operate to specification up
to the 50 V input voltage limit and to shut down and protect
itself during the time the input voltage exceeds 50 V. When the
input voltage falls below 50 V as the surge ends, the converter
will automatically initiate a soft start. In order to survive these
higher input voltage surges, the modified converter will no longer
have input transient protection, however, as described below.
Contact the factory for information on units surviving high
input voltage surges.
Input Voltage Transient Protection: The converter has a
transient voltage suppressor connected across its input leads to
protect the unit against high voltage pulses (both positive and
negative) of short duration. With the power supply connected
in the typical system setup shown in Figure 23, a transient
voltage pulse is created across the converter in the following
manner. A 20 µF capacitor is first charged to 400 V. It is then
directly connected across the converter’s end of the two meter
power lead cable through a 2 Ω on-state resistance MOSFET.
The duration of this connection is 10 µs. The pulse is repeated
every second for 30 minutes. This test is repeated with the
connection of the 20 µF capacitor reversed to create a negative
pulse on the supply leads. (If continuous reverse voltage
protection is required, a diode can be added externally in series
at the expense of lower efficiency for the power system.)
The converter responds to this input transient voltage test by
shutting down due to its input overvoltage protection feature.
Once the pulse is over, the converter initiates a soft-start, which
is completed before the next pulse. No degradation of converter
performance occurs.
THERMAL CHARACTERISTICS
Junction and Case Temperatures: It is important for the
user to know how hot the hottest semiconductor junctions
within the converter get, and to understand the relationship
between junction, case and ambient temperatures. The hottest
semiconductors in the 100 W product line of Analog Devices’
high density power supplies are the switching MOSFETs and
the output rectifiers. There is an area inside the main power
transformers that is hotter than these semiconductors, but it is
within NAVMAT guidelines and well below the Curie tempera-
ture of the ferrite. (The Curie temperature is the point at which
the ferrite begins to lose its magnetic properties.)
Since NAVMAT guidelines require that the maximum junction
temperature be 110°C, the power supply manufacturer must
specify the temperature rise above the case for the hottest semi-
conductors so the user can determine the case temperature
required to meet NAVMAT guidelines. The thermal charac-
teristics section of the specification table states the hottest junc-
tion temperature for maximum output power at a specified case
temperature. The unit can operate to case temperatures higher
than 90°C, but 90°C is the maximum temperature that permits
NAVMAT guidelines to be met.
Case and Ambient Temperatures: It is the user’s responsi-
bility to properly heat sink the power supply in order to maintain
the appropriate case temperature and, in turn, the maximum
junction temperature. Maintaining the appropriate case tem-
perature is a function of the ambient temperature and the me-
chanical heat removal system. The static relationship of these
variables is established by the following formula:
T
C
=T
A
+(P
D
×R
θ
CA
)
where:
T
C
= case temperature measured at the center of the pack-
age bottom,
T
A
= ambient temperature of the air available for cooling,
P
D
= the power, in watts, dissipated in the power supply,
R
θ
CA
= the thermal resistance from the center of the package
to free air, or case to ambient.
The power dissipated in the power supply, P
D
, can be calcu-
lated from the efficiency,
, given in the data sheets, and the
actual output power, P
O
, in the user’s application by the fol-
lowing formula:
P
D
=P
O
1
η–1
For example, at 80 W of output power and 80% efficiency, the
power dissipated in the power supply is 20 W. If under these
conditions, the user wants to maintain NAVMAT deratings
(i.e., a case temperature of approximately 90°C) with an ambi-
ent temperature of 75°C, the required thermal resistance, case
to ambient, can be calculated as
90 = 75 + (20 × R
θ
CA
) or R
θ
CA
= 0.75°C/W
This thermal resistance, case to ambient, will determine what
kind of heat sink and whether convection cooling or forced air
cooling is required to meet the constraints of the system.
SYSTEM INSTABILITY CONSIDERATIONS
In a distributed power supply architecture, a power source
provides power to many “point-of-load” (POL) converters. At
low frequencies, the POL converters appear incrementally as
negative resistance loads. This negative resistance could cause
system instability problems.
Incremental Negative Resistance: A POL converter is de-
signed to hold its output voltage constant no matter how its
input voltage varies. Given a constant load current, the power
drawn from the input bus is therefore also a constant. If the
input voltage increases by some factor, the input current must
decrease by the same factor to keep the power level constant.
In incremental terms, a positive incremental change in the
input voltage results in a negative incremental change in the
input current. The POL converter therefore looks, incremen-
tally, like a negative resistor.
The value of this negative resistor at a particular operating
point, V
IN
, I
IN
, is:
R
N
=–V
IN
I
IN
Note that this resistance is a function of the operating point. At
full load and low input line, the resistance is its smallest, while
at light load and high input line, it is its largest.
ADDC02803SC/ADDC02805SA
REV. A
–12–
Potential System Instability: The preceding analysis assumes
dc voltages and currents. For ac waveforms the incremental
input model for the POL converter must also include the effects
of its input filter and control loop dynamics. When the POL
converter is connected to a power source, modeled as a voltage
source, V
S,
in series with an inductor, L
S
, and some positive
resistor, R
S
, the network of Figure 33 results.
LP
CP–|RN|
ADI DC/DC CONVERTER
LSRS
VSINPUT
TERMINALS
Figure 33. Model of Power Source and POL Converter
Connection
The network shown in Figure 33 is second order and has the
following characteristic equation:
sL LC s LL
RRC
SP SP
N
SP
2
10()
()
–||
++++
+=
For the power delivery to be efficient, it is required that
R
S
<< R
N
. For the system to be stable, however, the following
relationship must hold:
CR LL
RRLL
CR
PN SP
S
SSP
PN
||
()
or ()
||
>+>+
Notice from this result that if (L
S
+ L
P
) is too large, or if R
S
is
too small, the system might be unstable. This condition would
first be observed at low input line and full load since the abso-
lute value of R
N
is smallest at this operating condition.
If an instability results and it cannot be corrected by changing
L
S
or R
S
, such as during the MIL-STD-461D tests due to the
LISN requirement, one possible solution is to place a capacitor
across the input of the POL converter. Another possibility is to
place a small resistor in series with this extra capacitor.
The analysis has so far assumed the source of power was a volt-
age source (e.g., a battery) with some source impedance. In
some cases, this source may be the output of a front-end (FE)
converter. Although each FE converter is different, a model for
a typical one would have an LC output filter driven by a voltage
source whose value was determined by the feedback loop. The
LC filter usually has a high Q, so the compensation of the feed-
back loop is chosen to help dampen any oscillations that result
from load transients. In effect, the feedback loop adds “positive
resistance” to the LC network.
When the POL converter is connected to the output of this FE
converter, the POL’s “negative resistance” counteracts the
effects of the FE’s “positive resistance” offered by the feedback
loop. Depending on the specific details, this might simply mean
that the FE converter’s transient response is slightly more oscil-
latory, or it may cause the entire system to be unstable.
For the ADDC02803SC and ADDC02805SA, L
P
is approxi-
mately 1 µH and C
P
is approximately 4 µF. Figures 13 and 14
show a more accurate depiction of the input impedance of the
converter as a function of frequency. The negative resistance is,
itself, a very good incremental model for the power state of the
converter for frequencies into the several kHz range.
NAVMAT DERATING
NAVMAT is a Navy power supply reliability manual frequently
cited by specifiers of power supplies. A key section of NAVMAT
P4855-1A discusses guidelines for derating designs and their
components. The two key derating criteria are voltage derating
and power derating. Voltage derating is done to reduce the possi-
bility of electrical breakdown, whereas power derating is done to
maintain the component material below a specified maximum
temperature. While power deratings are typically stated in terms
of current limits (e.g., derate to x% of maximum rating), NAVMAT
also specifies a maximum junction temperature of the semicon-
ductor devices in a power supply. The NAVMAT component
deratings applicable to the ADDC02805SA and ADDC02803SC
are as follows:
Resistors
80% voltage derating
50% power derating
Capacitors
50% voltage and ripple voltage derating
70% ripple current derating
Transformers and Inductors
60% continuous voltage and current derating
90% surge voltage and current derating
20°C less than rated core temperature
30°C below insulation rating for hot spot temperature
25% insulation breakdown voltage derating
40°C maximum temperature rise
Transistors
50% power derating
60% forward current (continuous) derating
75% voltage and transient peak voltage derating
110°C maximum junction temperature
Diodes (Switching, General Purpose, Rectifiers)
70% current (surge and continuous) derating
65% peak inverse voltage derating
110°C maximum junction temperature
Diodes (Zeners)
70% surge current derating
60% continuous current derating
50% power derating
110°C maximum junction temperature
Microcircuits (Linears)
70% continuous current derating
75% signal voltage derating
110°C maximum junction temperature
The ADDC02803SC and ADDC02805SA can meet all the
derating criteria listed above. There are, however, a few areas of
the NAVMAT deratings where meeting the guidelines unduly
sacrifices performance of the circuit. The standard unit therefore
makes the following exceptions.
Common-Mode EMI Filter Capacitors: The standard sup-
ply uses 500 V capacitors to filter common-mode EMI. NAVMAT
guidelines would require 1000 V capacitors to meet the 50%
voltage derating (500 V dc input to output isolation), resulting
in less common-mode capacitance for the same space. In typi-
cal electrical power supply systems, where the load ground is
eventually connected to the source ground, common-mode
voltages never get near the 500 V dc rating of the standard
ADDC02803SC/ADDC02805SA
REV. A –13–
supply. A lower voltage rating capacitor (500 V) was therefore
chosen to fit more capacitance in the same space in order to
better meet the conducted emissions requirement of MIL-STD-
461D (CE102). For those applications requiring 250 V or less
of isolation from input to output, the present designs would
meet NAVMAT guidelines.
Switching Transistors: 100 V MOSFETs are used in the
standard unit to switch the primary side of the transformers.
Their nominal off-state voltage meets the NAVMAT derating
guidelines. When the MOSFETs are turned off, however, mo-
mentary spikes occur that reach 100 V. The present generation
of MOSFETs are rated for repetitive avalanche, a condition that
was not considered by the NAVMAT deratings. In the worst
case condition, the energy dissipated during avalanche is 1% of
the device’s rated repetitive avalanche energy. To meet the
NAVMAT derating, 200 V MOSFETs could be used. The
100 V MOSFETs are used instead for their lower on-state resis-
tance, resulting in higher efficiency for the power supply.
NAVMAT Junction Temperatures: The two types of power
deratings (current and temperature) can be independent of one
another. For instance, a switching diode can meet its derating
of 70% of its maximum current, but its junction temperature
can be higher than 110°C if the case temperature of the con-
verter, which is not controlled by the manufacturer, is allowed
to go higher. Since some users may choose to operate the power
supply at a case temperature higher than 90°C, it then becomes
important to know the temperature rise of the hottest semicon-
ductors. This is covered in the specification table in the section
entitled Thermal Characteristics.
EMI CONSIDERATIONS
The ADDC02803SC and ADDC02805SA have an integral
differential- and common-mode EMI filter designed to meet all
applicable requirements in MIL-STD-461D when the power
converters are installed in a typical system setup (described
below). The converters also contain transient protection circuitry
that permit the units to survive short, high voltage transients across
their input power leads. The purpose of this section is to
describe the various MIL-STD-461D tests and the converters’
corresponding performance. Consult factory for additional
information.
The figures and tests referenced herein were obtained from
measurements on the ADDC02805SA, a single 5 V dc output
converter. Since the construction and topology of the 3.3 V
output converter is almost identical to the 5 V dc output con-
verter, and the component values of the EMI differential- and
common-mode filter in the 3.3 V output converter are identical
to the 5 V output converter, the text references these figures and
tests as typical of the ADDC02803SC converter as well.
Electromagnetic interference (EMI) is governed by MIL-STD-461D,
which establishes design requirements, and MIL-STD-462D,
which defines test methods. EMI requirements are categorized
as follows (xxx designates a three digit number):
•CExxx: conducted emissions (EMI produced internal to the
power supply which is conducted externally through its input
power leads)
•CSxxx: conducted susceptibility (EMI produced external to the
power supply which is conducted internally through the input
power leads and may interfere with the supply’s operation)
•RExxx: radiated emissions (EMI produced internal to the
power supply which is radiated into the surrounding space)
•RSxxx: radiated susceptibility (EMI produced external to the
power supply which radiates into or through the power supply
and may interfere with its proper operation)
It should be noted that there are several areas of ambiguity with
respect to CE102 measurements that may concern the systems
engineer. One area of ambiguity in this measurement is the
nature of the load. If it is constant, the ripple voltage on the
converter’s input leads is due only to the operation of the con-
verter. If, on the other hand, the load is changing over time,
this variation causes an additional input current and voltage
ripple to be drawn at the same frequency. If the frequency is
high enough, the converter’s filter will help attenuate this second
source of ripple, but if it is below approximately 100 kHz, it will
not. The system may then not meet the CE102 requirement,
even though the converter is not the source of the EMI. If this
is the case, additional capacitance may be needed across the
load or across the input to the converter.
Another ambiguity in the CE102 measurement concerns common-
mode voltage. If the load is left unconnected from the ground
plane (even though the case is grounded), the common-mode
ripple voltages will be smaller than if the load is grounded. The
test specifications do not state which procedure should be used.
However, in neither case (load grounded or floating) will the
typical EMI test setup described below be exactly representative
of the final system configuration EMI test. For the following
reasons, the same is true if separately packaged EMI filters are
used.
In almost all systems the output ground of the converter is ulti-
mately connected to the input ground of the system. The para-
sitic capacitances and inductances in this connection will affect
the common-mode voltage and the CE102 measurement. In
addition, the inductive impedance of this ground connection
can cause resonances, thereby affecting the performance of the
common-mode filter in the power supply.
In response to these ambiguities, the Analog Devices’ converter
has been tested for CE102 under a constant load and with the
output ground floating. While these measurements are a good
indication of how the converter will operate in the final system
configuration, the user should confirm CE102 testing in the
final system configuration.
CE101: This test measures emissions on the input leads in the
frequency range between 30 Hz and 10 kHz. The intent of this
requirement is to ensure that the dc/dc converter does not cor-
rupt the power quality (allowable voltage distortion) on the
power buses present on the platform. There are several CE101
limit curves in MIL-STD-461D. The most stringent one app-
licable for the converter is the one for submarine applications.
Figure 19 shows that the converter easily meets this requirement
(the return line measurement is similar). The components at
60 Hz and its harmonics are a result of ripple in the output of
the power source used to supply the converter.
ADDC02803SC/ADDC02805SA
REV. A
–14–
CE102: This test measures emissions in the frequency range
between 10 kHz and 10 MHz. The measurements are made on
both of the input leads of the converter, which are connected to
the power source through LISNs. The intent of this requirement,
in the lower frequency portion of the requirement, is to ensure
that the dc/dc converter does not corrupt the power quality
(allowable voltage distortion) on the power buses present on the
platform. At higher frequencies, the intent is to serve as a sepa-
rate control from RE102 on potential radiation from power
leads that may couple into sensitive electronic equipment.
Figure 20 shows the CE102 limit and the measurement taken
from the +V
IN
line. While the measurement taken from the
input return line is slightly different, both comfortably meet the
MIL-STD-461D, CE102 limit. (Reference the last section of
EMI Considerations for how to adjust the external components
in the test setup circuit to increase the margin between the
specification limit and the measured results.)
CS101: This test measures the ability of the converter to reject
low frequency differential signals, 30 Hz to 50 kHz, injected on
the dc inputs. The measurement is taken on the output power
leads. The intent is to ensure that equipment performance is
not degraded from ripple voltages associated with allowable
distortion of power source voltage waveforms. Figures 11 and
12 show typical audio susceptibility graphs. Note that according
to the MIL-STD-461D test requirements, the injected signal
between 30 Hz and 5 kHz has an amplitude of 2 V rms and
from 5 kHz to 50 kHz the amplitude decreases inversely with
frequency to 0.2 V rms. The curve of the injected signal should
be multiplied by the audio susceptibility curve to determine the
output ripple at any frequency. When this is done, the worst
case output ripple at the frequency of the input ripple occurs at
5 kHz, at which point there is typically a 25 mV peak-to-peak
output ripple.
It should be noted that MIL-STD-704 has a more relaxed
requirement for rejection of low frequency differential signals
injected on the dc inputs than MIL-STD-461D. MIL-STD-704
calls for a lower amplitude ripple to be injected on the input in a
narrower frequency band, 10 Hz to 20 kHz.
CS114: This test measures the ability of the converter to oper-
ate correctly during and after being subjected to currents in-
jected into bulk cables in the 10 kHz to 400 MHz range. Its
purpose is to simulate currents that would be developed in these
cables due to electromagnetic fields generated by antenna trans-
missions. The converter is designed to meet the requirements
of this test when the current is injected on the input power leads
cable. Consult factory for more information.
CS115: This test measures the ability of the converter to oper-
ate correctly during and after being subjected to 30 ns long
pulses of current injected into bulk cables. Its purpose is to
simulate transients caused by lightning or electromagnetic
pulses. The converter is designed to meet this requirement
when applied to its input power leads cable. Consult factory for
more information.
CS116: This test measures the ability of the converter to oper-
ate correctly during and after being subjected to damped sinu-
soid transients in the 10 kHz to 100 MHz range. Its purpose is
to simulate current and voltage waveforms that would occur
when natural resonances in the system are excited. The con-
verter is designed to meet this requirement when applied to its
input power leads cable. Consult factory for more information.
RE101: This requirement limits the strength of the magnetic
field created by the converter in order to avoid interference with
sensitive equipment located nearby. The measurement is made
from 30 Hz to 100 kHz. The most stringent requirement is for
the Navy. Figure 21 shows the test results when the pickup coil
is held 7 cm above the converter. As can be seen, the converter
easily meets this requirement.
RE102: This requirements limits the strength of the electric
field emissions from the power converter to protect sensitive
receivers from interference. The measurement is made from
10 kHz to 18 GHz with the antenna oriented in the vertical
plane. For the 30 MHz and above range, the standard calls for
the measurement to be made with the antenna oriented in the
horizontal plane as well.
In a typical power converter system setup, the radiated emis-
sions can come from two sources: 1) the input power leads as
they extend over the two meter distance between the LISNs and
the converter, as required for this test, and 2) the converter
output leads and load. The latter is likely to create significant
emissions if left uncovered, since minimal EMI filtering is
provided at the converter’s output. It is typical, however,
that the power supply and its load would be contained in a
conductive enclosure in applications where this test is applicable.
For this test a metal screen was therefore used to cover the
converter and its load.
Figure 22 shows test results for the vertical measurement and
compares them against the most stringent RE102 requirement;
the horizontal measurement (30 MHz and above) was similar.
As can be seen, the emissions just meet the standard in the
18 MHz–28 MHz range. This component of the emissions is
due to common-mode currents flowing through the input power
leads. As mentioned in the section on CE102 above, the level
of common-mode current that flows is dependent on how the
load is connected. This measurement is therefore a good indi-
cation of how well the converter will perform in the final con-
figuration; the user should confirm RE102 testing in the final
system. (Reference the last section of EMI Considerations for
how to adjust the external components in the test setup circuit
to increase the margin between the specification limit and the
measured results.)
RS101: This requirement is specialized and intended to check
for sensitivity to low frequency magnetic fields in the 30 Hz to
50 kHz range. The converter is designed to meet this require-
ment. Consult factory for more information.
RS103: This test calls for correct operation during and after the
unit under test is subjected to radiated electric fields in the 10 kHz
to 40 GHz range. The intent is to simulate electromagnetic
fields generated by antenna transmissions. The converter is
designed to meet this requirement. Consult factory for more
information.
ADDC02803SC/ADDC02805SA
REV. A –15–
Circuit Setup for EMI Test
Figure 23 shows a schematic of the test setup used for the EMI
measurements discussed above. The output of the converter is
connected to a resistive load designed to draw full power. There
is a 0.1 µF capacitor placed across this resistor that typifies by-
pass capacitance normally used in this application. At the input
of the converter there are two differential capacitors (the larger
one having a series resistance) and two small common-mode
capacitors connected to case ground. The case itself was con-
nected to the metal ground plane in the test chamber. For the
RE102 test, a metal screen box was used to cover both the con-
verter and its load (but not the two meters of input power lead
cables). This box was also electrically connected to the metal
ground plane.
With regard to the components added to the input power lines,
the 100 µF capacitor with its 1 Ω series resistance is required to
achieve system stability when the unit is powered through the
LISNs, as the MIL-STD-461D standard requires. These
LISNs have a series inductance of 50 µH at low frequencies,
giving a total differential inductance of 100 µH. As explained
earlier in the System Instability section, such a large series
source inductance will cause an instability as it interacts with the
converter’s negative incremental input resistance unless some
corrective action is taken. The 100 µF capacitor and 1 Ω resis-
tor provide the stabilization required.
It should be noted that the values of these stabilization components
are appropriate for a single converter load. If the system makes
use of several converters, the values of the components will need
to be slightly changed, but not such that they are repeated for
every converter. It should also be noted that most system appli-
cations will not have a source inductance as large as the 100 µH
built into the LISNs. For those systems, a much smaller input
capacitor could be used.
Increasing Margin Between Specification Limit and
Measured Results
With regard to the 2 µF differential-mode capacitor and the two
82 nF common-mode capacitors, these components were in-
cluded in the test setup to augment the performance of the
power supply’s internal EMI filter. The values were chosen to
achieve the results shown in Figures 20 and 22. To increase the
margin between the specification limits and the measured emis-
sions, larger external component values could be used.
To do this it is useful to know that most of the emissions below
10 MHz, whether conducted or radiated, are due to differential-
mode currents flowing in the input power leads. To make the
emissions in this frequency range smaller, the differential ca-
pacitor value should be increased above 2 µF. Conversely, most
of the emissions above 10 MHz are due to common-mode cur-
rents; to make them smaller the common-mode capacitors
should be increased above the 82 nF value. In both cases it is
important to minimize the parasitic inductance of the capaci-
tors; the use of several smaller capacitors connected in parallel is
one way to achieve this.
Using larger valued capacitors than those shown in Figure 23 is
a good solution if an additional 6 dB–10 dB of margin is de-
sired. If, however, in an extremely sensitive application it is
desired to increase the margin by 20 dB or more, it may be
better to add both differential- and common-mode inductors to
the external components to make a higher order filter.
RELIABILITY CONSIDERATIONS
MTBF (Mean Time Between Failure) is a commonly used
reliability concept that applies to repairable items in which
failed elements are replaced upon failure. The expression for
MTBF is
MTBF = T/r
where:
T= total operating time
r= number of failures
In lieu of actual field data, MTBF can be predicted per
MIL-HDBK-217.
MTBF, Failure Rate and Probability of Failure: A proper
understanding of MTBF begins with its relationship to lambda
(λ), which is the failure rate. If a constant failure rate is assumed,
then MTBF = 1/λ, or λ = 1/MTBF. If a power supply has an
MTBF of 1,000,000 hours, this does not mean it will last
1,000,000 hours before it fails. Instead, the MTBF describes
the failure rate. For 1,000,000 hours MTBF, the failure rate
during any hour is 1/1,000,000, or 0.0001%. Thus, a power
supply with an MTBF of 500,000 hours would have twice the
failure rate (0.0002%) of one with 1,000,000 hours.
What users should be interested in is the probability of a power
supply not failing prior to some time t. Given the assumption of
a constant failure rate, this probability is defined as
R(t)=e
–λt
where R(t) is the probability of a device not failing prior to some
time t.
If we substitute λ = 1/MTBF in the above formula, then the
expression becomes
R(t)=e
–t
MTBF
This formula is the correct way to interpret the meaning of
MTBF.
If we assume t = MTBF = 1,000,000 hours, then the probability
that a power supply will not fail prior to 1,000,000 hours of use
is e
–1
, or 36.8%. This is quite different from saying the power
supply will last 1,000,000 hours before it fails. The probability
that the power supply will not fail prior to 50,000 hours of use is
e
–0.05
, or 95%. For t = 10,000 hours, the probability of no fail-
ure is e
–0.01
, or 99%.
Temperature and Environmental Factors: Although the
calculation of MTBF per MIL-HDBK-217 is a detailed process,
there are two key variables that give the manufacturer signi-
ficant leeway in predicting an MTBF rating. These two vari-
ables are temperature and environmental factor. For users to
properly compare MTBF numbers from two different manu-
facturers, the environmental factor and the temperature must
be identical. Contact the factory for MTBF calculations for
specific environmental factors and temperatures.
ADDC02803SC/ADDC02805SA
REV. A
–16–
The pins of the converter are typically connected to the next
higher level assembly by bending them at right angles, either
down or up, and cutting them shorter for insertion in printed
circuit board through holes. In order to maintain the hermetic
integrity of the seals around the pins, a fixture should be used
for bending the pins without stressing the pin-to-sidewall seals.
It is recommended that the minimum distance between the
package edge and the inside of the pin be 100 mils (2.54 mm)
for the 40 mil (1.02 mm) diameter pins; 120 mils (3.05 mm)
from the package edge to the center of the pin as shown in
Figure 35.
0.100"
(2.54mm)
0.120"
(3.05mm)
Figure 35. Minimum Bend Radius of 40 Mil (1.02 mm)
Pins
1
2
10
11
17
16
15
14
13
12
ADDC02805SA
OR
ADDC02803SC
PS1
C1
+28VDC
28RTN
RLOAD
NOTE: VALUE OF C1 IS DEPENDENT ON SOURCE IMPEDANCE.
REFER TO SECTION ON SYSTEM INSTABILITY CONSIDERATIONS.
Figure 36. Typical Power Connections and External Parts for Converter
1
2
8
10
11
17
16
15
14
13
12
1
2
8
10
11
17
16
15
14
13
12
PS2
PS1
I
SHARE
C1
+28VDC
28RTN
+SENSE PS1
+SENSE PS2
–SENSE PS1
–SENSE PS2
RLOAD
V
OUT
+
V
OUT
–
NOTE: VALUE OF C1 IS DEPENDENT ON SOURCE IMPEDANCE.
REFER TO SECTION ON SYSTEM INSTABILITY CONSIDERATIONS.
ADDC02805SA
OR
ADDC02803SC
ADDC02805SA
OR
ADDC02803SC
Figure 37. Typical Connections for Paralleling Two Converters
MECHANICAL CONSIDERATIONS
When mounting the converter into the next higher level assembly,
it is important to ensure good thermal contact is made between
the converter and the external heat sink. Poor thermal connec-
tion can result in the converter shutting off, due to the tempera-
ture shutdown feature (Pin 9), or reduced reliability for the
converter due to higher-than-anticipated junction and case
temperatures. For these reasons the mounting tab locations
were selected to ensure good thermal contact is made near the
hot spots of the converter, which are shown in the shaded areas
of Figure 34.
Figure 34. Hot Spots (Shaded Areas) of DC/DC Converter
ADDC02803SC/ADDC02805SA
REV. A –17–
SYNC IN
SYNC IN
5
8
6
3
2
R3
357V
OLH5801
(ISOLINK)
R4
51V
C3
0.1mFD1
1N966B C4
100pF
C5
100pF
R2
1kVD4
1N5819
R5
1kVD3
1N5819
C13
100pF
D2
1N5819
R13
1kV
SYNC 1
SYNC 2
SYNC 10
V
AUX
ENB
GND
V
CC
OUT
HH73R-1MHz
CONNER/WINFIELD
C2
100pF
SYNC OUT
+5V
C1
0.1mF
DISABLE
R1
100V
AKAK
Figure 38. Fault Tolerant, Secondary Side Powered SYNC Drive Circuit
NOTES
1. Input to Output Isolation: With the use of the Isolink opto-
coupler, we can use the output of the converters to power the
Conner/Winfield 1 MHz clock (output referenced) and the
V
AUX
pin (input referenced) to power the opto-coupler.
2. Fault Tolerant: All outputs are capacitively coupled to ensure
that if the master clock stops working the individual units will
continue to operate at their own internal clock frequency,
thereby eliminating a potential single point failure.
3. Radiated Emissions: C2 can be added to slow down the clock
edges (Tr and Tf) for reducing radiated emissions.
4. Table: The following table shows the capacitor and resis-
tor value to be used for the number of converters to be
synchronized.
Resistor
# of Capacitor Value
Converters Value (pF) (ohms)
1 1000 100
2 470 200
3 330 300
4 270 400
5 220 500
6 180 600
7 150 700
8 120 800
9 100 900
10 100 1K
ADDC02803SC/ADDC02805SA
REV. A
–18–
Screening Levels for ADDC02803SC/ADDC02805SA
Screening Steps Industrial (KV) Ruggedized Industrial (TV) MIL-STD-883B/SMD (TV/QMLH)
Pre-Cap Visual 100% MIL-STD-883, TM2017
Temp Cycle N/A N/A
Constant Acceleration N/A N/A
Fine Leak Guaranteed to Meet Guaranteed to Meet
MIL-STD-883, TM1014 MIL-STD-883, TM1014 Compliant to MIL-PRF-38534
Gross Leak Guaranteed to Meet Guaranteed to Meet
MIL-STD-883, TM1014 MIL-STD-883, TM1014
Burn-In N/A MIL-STD-883, TM1015,
96 Hrs at +125°C Case
Final Electrical Test At +25°C, Per Specification At +25°C, Per Specification
Table Table
NOMINAL CASE DIMENSIONS IN INCHES AND (mm)
(All tolerances ±.005" [±.13 mm] unless otherwise specified)
0.150 (3.81)
0.100 (2.54)
8 PLCS
0.200 (5.08)
0.150 (3.81)
0.200 (5.08)
0.390 6 0.010
(9.91 6 0.25)
0.800 6 0.010
(20.32 6 0.25) 1.145 (29.08)
2 PLCS
0.150 (3.81)
4 PLCS
TOP VIEW
0.149 (3.78)
DIA TYP 0.300 (7.62) SQ
6 0.010
4 PLCS
0.200 (5.08) 5 PLCS
0.250 (6.35)
2 PLCS
1.500 6 0.010
(38.10 6 0.25)
0.040 6 0.003
(1.02 6 0.08)
0.090 6 0.010
(2.29 6 0.25)
4 PLCS 2.745 6 0.010
(69.72 6 0.25)
1.800
(45.72)
TYP
2.100 6 0.010
(53.34 6 0.25)
NOTES
1. The final product weight is 85 grams maximum.
2. The package base material is made of molybdenum and is
nominally 40 mils (1.02 mm) thick. The “runout” is less
than 2 mils per inch (0.02 mm per cm).
3. The high current pins (10–17) are 40 mil (1.02 mm) diameter;
are 99.8% copper; and are plated with gold over nickel.
4. The signal carrying pins (1–9) are 18 mil (0.46 mm) diam-
eter; are Kovar; and are plated with gold over nickel.
5. All pins are a minimum length of 0.740 inches (18.80 mm)
when the product is shipped. The pins are typically bent up
or down and cut shorter for proper connection into the user’s
system.
6. All pin-to-sidewall spacings are guaranteed for a minimum of
500 V dc breakdown at standard air pressure.
7. The case outline was originally designed using the inch-
pound units of measurement. In the event of conflict be-
tween the metric and inch-pound units, the inch-pound shall
take precedence.
C3056a–4–10/98
PRINTED IN U.S.A.
