Document Number:
LSERIESKL1xFS Rev 9
www.nxp.com/Kinetis/Lseries
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}High-speed comparator with internal
6-bit DAC
}12-bit DAC with DMA support
}1.2 V high-accuracy internal
voltage reference
Timing and Control
}One 6-channel and two 2-channel,
16-bit low-power timer PWM modules
with DMA support
}2-channel, 32-bit periodic interrupt
timer provides time base for RTOS
task schedule or trigger source for
ADC conversion
}Low-power timer allows operation in
all power modes except for VLLS0
}Real-time clock
HMI
}Capacitive touch sense interface
supports up to 16 external electrodes
and DMA data transfer
}GPIO with pin interrupt support,
DMA request capability and other
pin control options
Connectivity and communications
}I2C with DMA support, up to 1Mbit/s
and compatible with SMBus V2 features
}Three UART with up to two LPUART,
and DMA support
}Two SPIs with DMA support
}I2S module for audio applications
}Flex I/O with capability of emulating
multiple serial interface, such as IrDA,
UART, SPI, I2C, etc.
Software and tools
}Freedom development platforms and
Tower System boards
}Kinetis Software Development Kit (SDK)
}Integrated development environment (IDE)
– Kinetis Design Studio IDE
– CodeWarrior® for Microcontrollers
V10.x (Eclipse) IDE with Processor
Expert® software modeling tool
– IAR® Embedded Workbench, Keil®
MDK, Atollic® TrueSTUDIO®
}Runtime software and RTOS
– FreeRTOS™
}Full ARM ecosystem support
Kinetis KL1x MCU Family Block Diagram
Optional
HMI Frequency-
Locked Loop
Phase-Locked
Loop
Low-/High-
Frequency
Oscillators
Internal
Reference
Clocks
High Accuracy
Internal Reference
Clocks 48M/8MHz
2 x UART
Flex IO
I2S
Low-Power
Touch-Sensing
Interface
GPIO
Debug Interfaces
Interrupt Controller
Micro Trace Buffer
PWM
Analog
Comparator
Internal Voltage
Reference
12 -bit
DAC
Program
Flash (32 to 256 KB) SRAM
(4 to 32 KB)
32-Byte
Register File ROM up to 16 KB
2 x Low-Power UART
ARM® Cortex®-M0+ Core
48 MHz
Memories Clocks
Communication InterfacesTimersAnalog
Periodic
Interrupt
Timers
Low-Power
Timer
2 x I2C
Real-Time
Clock
16-bit
ADC
2 x SPI
Internal
Watchdog
System
DMA
Low-Leakage
Wake-Up Unit
Unique ID
CRC
Bit Manipulation
Engine
KINETIS KL1x MCU FAMILY BLOCK DIAGRAM
KINETIS KL1x MCU FAMILY OPTIONS
Sub-
Family Part Number
CPU (MHz)
Memory Features √ Package
Flash (KB)
SRAM (KB)
DMA
Low-Power UART
UART
UART w/ ISO7816
SPI
I2C
TSI
I2S
Flex™ I/O
RTC
12-bit DAC
16-bit ADC w/
DP Ch.
12-bit ADC
Total I/Os
FM DA AD FT LH LK MP
32 QFN
(5 x 5, 0.5 mm)
36X FBGA
(3.5 x 3.5, 0.5 mm)
35 WLCSP
(2.5 x 3.0, 0.4 mm)
48 QFN
(7 x 7, 0.5 mm)
64 LQFP
(10 x 10, 0.5 mm)
80 LQFP
(12 x 12, 0.5 mm)
64 MAPBGA
(5 x 5, 0.5 mm)
KL13 MKL13Z32xxx4 48 MHz 32 4 √ 2 1 1 2 2 √ √ √ √ 28~70 * * √ √
MKL13Z64xxx4 48 MHz 64 8 √ 2 1 1 2 2 √ √ √ √ 28~70 * * √ √
KL14 MKL14Z32xxx4 48 MHz 32 4 √ 1 2 2 2 √ √ 28~70 √ √ √ √
MKL14Z64xxx4 48 MHz 64 8 √ 1 2 2 2 √ √ 28~70 √ √ √ √
KL15
MKL15Z32xxx4 48 MHz 32 4 √ 1 2 2 2 √ √ √ √ 28~70 √ √ √ √
MKL15Z64xxx4 48 MHz 64 8 √ 1 2 2 2 √ √ √ √ 28~70 √ √ √ √
MKL15Z128xxx4 48 MHz 128 16 √ 1 2 2 2 √ √ √ √ 28~70 √ √ √ √ √
KL16
MKL16Z32xxx4 48 MHz 32 4 √1 2 2 2 √ √ √ √ √ 28~54 √ √ √
MKL16Z64xxx4 48 MHz 64 8 √1 2 2 2 √ √ √ √ √ 28~54 √ √ √
MKL16Z128xxx4 48 MHz 128 16 √ 1 2 2 2 √ √ √ √ √ 28~54 √ √ √
MKL16Z256xxx4 48 MHz 256 32 √ 1 2 2 2 √ √ √ √ √ 54 √ √
KL17
MKL17Z128xxx4 48 MHz 128 32 √ 2 1 1 2 2 √ √ √ √ √ 28~54 √ √ √ √
MKL17Z256xxx4 48 MHz 256 32 √ 2 1 1 2 2 √ √ √ √ √ 28~54 √ √ √ √
MKL17Z32xxx4 48MHz 32 8 √ 2 1 1 2 2 √ √ √ 28~54 *√*√*
MKL17Z64xxx4 48MHz 64 16 √ 2 1 1 2 2 √ √ √ 28~54 *√*√*
* This package is included in a Package Your Way program for Kinetis MCUs. Please visit www.nxp.com/KPYW for more detail.