Low Power JFET Input
Operational Amplifiers
These JFET input operational amplifiers are designed for low power
applications. They feature high input impedance, low input bias current and
low input offset current. Advanced design techniques allow for higher slew
rates, gain bandwidth products and output swing.
The commercial and vehicular devices are available in Plastic dual in–line
and SOIC packages.
•Low Supply Current: 200 µA/Amplifier
•Low Input Bias Current: 5.0 pA
•High Gain Bandwidth: 2.0 MHz
•High Slew Rate: 6.0 V/µs
•High Input Impedance: 1012 Ω
•Large Output Voltage Swing: ±14 V
•Output Short Circuit Protection
Representative Schematic Diagram
(Each Amplifier)
+
Q3
Q2Q1
-
+
R2 R5
J1 J2
R1
Q4 C1
Q5
D2
R3
Q7
R4
VCC
Output
D1
C2
Q6
VEE
Inputs
ORDERING INFORMATION
Op Amp
Function Device Operating
Temperature Range Package
TL062CD, ACD
TL062CP, ACP TA = 0° to +70°CSO–8
Plastic DIP
Dual TL062VD
TL062VP TA = –40° to +85°CSO–8
Plastic DIP
TL064CD, ACD
TL064CN, ACN TA = 0° to +70°CSO–14
Plastic DIP
Quad TL064VD
TL064VN TA = –40° to +85°CSO–14
Plastic DIP
ON Semiconductor
Semiconductor Components Industries, LLC, 2002
March, 2002 – Rev. 6 1Publication Order Number:
TL062/D
TL062
TL064
SEMICONDUCTOR
TECHNICAL DATA
LOW POWER JFET INPUT
OPERATIONAL AMPLIFIERS
D SUFFIX
PLASTIC PACKAGE
CASE 751
(SO–8)
P SUFFIX
PLASTIC PACKAGE
CASE 626
811
8
DUAL
PIN CONNECTIONS
(Top View)
VEE
Inputs 1
Output 1
Inputs 2
Output 2
VCC
-
+
1
2
3
4
8
7
6
5
-
+
D SUFFIX
PLASTIC PACKAGE
CASE 751A
(SO–14)
N SUFFIX
PLASTIC PACKAGE
CASE 646
14
114 1
QUAD
PIN CONNECTIONS
(Top View)
4
23
1
Inputs 1
Output 1
VCC
Inputs 2
Output 2
Output 4
Inputs 4
VEE
Inputs 3
Output 3
1
2
3
4
5
6
78
9
10
11
12
13
14
+
+
+
-
+
-
TL062 TL064
http://onsemi.com
2
MAXIMUM RATINGS
Rating Symbol Value Unit
Supply Voltage (from VCC to VEE) VS+36 V
Input Differential Voltage Range (Note 1) VIDR ±30 V
Input Voltage Range (Notes 1 and 2) VIR ±15 V
Output Short Circuit Duration (Note 3) tSC Indefinite sec
Operating Junction Temperature TJ+150 °C
Storage Temperature Range Tstg –60 to +150 °C
NOTES: 1.Differential voltages are at the noninverting input terminal with respect to the inverting input
terminal.
2.The magnitude of the input voltage must never exceed the magnitude of the supply or 15 V,
whichever is less.
3.Power dissipation must be considered to ensure maximum junction temperature (TJ) is not
exceeded. (See Figure 1.)
ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE = –15 V, TA = 0° to +70°C, unless otherwise noted.)
TL062AC
TL064AC TL062C
TL064C
Characteristics Symbol Min Typ Max Min Typ Max Unit
Input Offset Voltage (RS = 50 Ω, VO = 0V)
TA = 25°C
TA = 0° to +70°C
VIO —
—3.0
—6.0
7.5 —
—3.0
—15
20
mV
Average Temperature Coefficient for Offset Voltage
(RS = 50 Ω, VO = 0 V) ∆VIO/∆T — 10 — — 10 — µV/°C
Input Offset Current (VCM = 0 V, VO = 0 V)
TA = 25°C
TA = 0° to +70°C
IIO —
—0.5
—100
2.0 —
—0.5
—200
2.0 pA
nA
Input Bias Current (VCM = 0 V, VO = 0 V)
TA = 25°C
TA = 0° to +70°C
IIB —
—3.0
—200
2.0 —
—3.0
—200
10 pA
nA
Input Common Mode Voltage Range
TA = 25°CVICR —
–11.5 +14.5
–12.0 +11.5
——
–11 +14.5
–12.0 +11
—V
Large Signal Voltage Gain (RL = 10 kΩ, VO = ±10 V)
TA = 25°C
TA = 0° to +70°C
AVOL 4.0
4.0 58
——
—3.0
3.0 58
——
—
V/mV
Output Voltage Swing (RL = 10 kΩ, VID = 1.0 V)
TA = 25°C VO+
VO–+10
—+14
–14 —
–10 +10
—+14
–14 —
–10
V
TA = 0° to +70°C VO+
VO–+10
——
——
–10 +10
——
——
–10
Common Mode Rejection
(RS = 50 Ω, VCM = VICR min, VO = 0 V, TA = 25°C) CMR 80 84 — 70 84 — dB
Power Supply Rejection
(RS = 50 Ω, VCM = 0 V, VO = 0, TA = 25°C) PSR 80 86 — 70 86 — dB
Power Supply Current (each amplifier)
(No Load, VO = 0 V, TA = 25°C) ID— 200 250 — 200 250 µA
Total Power Dissipation (each amplifier)
(No Load, VO = 0 V, TA = 25°C) PD— 6.0 7.5 — 6.0 7.5 mW
TL062 TL064
http://onsemi.com
3
DC ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE = –15 V, TA = Tlow to Thigh [Note 4], unless otherwise noted.)
TL062V TL064V
Characteristics Symbol Min Typ Max Min Typ Max Unit
Input Offset Voltage (RS = 50 Ω, VO = 0V)
TA = 25°C
TA = Tlow to Thigh
VIO —
—3.0
—6.0
9.0 —
—3.0
—9.0
15
mV
Average Temperature Coefficient for Offset Voltage
(RS = 50 Ω, VO = 0 V) ∆VIO/∆T— 10 — — 10 — µV/°C
Input Offset Current (VCM = 0 V, VO = 0 V)
TA = 25°C
TA = Tlow to Thigh
IIO —
—5.0
—100
20 —
—5.0
—100
20 pA
nA
Input Bias Current (VCM = 0 V, VO = 0 V)
TA = 25°C
TA = Tlow to Thigh
IIB —
—30
—200
50 —
—30
—200
50 pA
nA
Input Common Mode Voltage Range (TA = 25°C) VICR —
–11.5 +14.5
–12.0 +11.5
——
–11.5 +14.5
–12.0 +11.5
—V
Large Signal Voltage Gain (RL = 10 kΩ, VO = ±10 V)
TA = 25°C
TA = Tlow to Thigh
AVOL 4.0
4.0 58
——
—4.0
4.0 58
——
—
V/mV
Output Voltage Swing (RL = 10 kΩ, VID = 1.0 V)
TA = 25°C
TA = Tlow to Thigh
VO+
VO–
VO+
VO–
+10
—
+10
—
+14
–14
—
—
—
–10
—
–10
+10
—
+10
—
+14
–14
—
—
—
–10
—
–10
V
Common Mode Rejection
(RS = 50 Ω, VCM = VICR min, VO = 0, TA = 25°C) CMR 80 84 — 80 84 — dB
Power Supply Rejection
(RS = 50 Ω, VCM = 0 V, VO = 0, TA = 25°C) PSR 80 86 — 80 86 — dB
Power Supply Current (each amplifier)
(No Load, VO = 0 V, TA = 25°C) ID— 200 250 — 200 250 µA
Total Power Dissipation (each amplifier)
(No Load, VO = 0 V, TA = 25°C) PD— 6.0 7.5 — 6.0 7.5 mW
NOTE: 4.Tlow = –40°CT
high = +85°C for TL062,4V
AC ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE = –15 V, TA = +25°C, unless otherwise noted.)
Characteristics Symbol Min Typ Max Unit
Slew Rate (Vin = –10 V to +10 V, RL = 10 kΩ, CL = 100 pF, AV = +1.0) SR 2.0 6.0 — V/µs
Rise Time (Vin = 20 mV, RL = 10 kΩ, CL = 100 pF, AV = +1.0) tr— 0.1 — µs
Overshoot (Vin = 20 mV, RL = 10 kΩ, CL = 100 pF, AV = +1.0) OS — 10 — %
Settling Time
(VCC = +15 V, VEE = –15 V, AV = –1.0, To within 10 mV
RL = 10 kΩ, VO = 0 V to +10 V step) To within 1.0 mV
tS—
—1.6
2.2 —
—
µs
Gain Bandwidth Product (f = 200 kHz) GBW — 2.0 — MHz
Equivalent Input Noise (RS = 100 Ω, f = 1.0 kHz) en— 47 — nV/ Hz√
Input Resistance Ri— 1012 — W
Channel Separation (f = 10 kHz) CS — 120 — dB
TL062 TL064
http://onsemi.com
4
VCC = +15 V, VEE = -15 V RL = 10 kΩ
TA = 25°C
VCC = +12 V, VEE = -12 V
VCC = +5.0 V, VEE = -5.0 V
VCC = +2.5 V, VEE = -2.5 V
VO, OUTPUT VOLTAGE SWING (Vpp)
VO, OUTPUT VOLTAGE SWING (Vpp)
TA, AMBIENT TEMPERATURE (°C)
AVOL, LARGE SIGNAL VOLTAGE GAIN (V/mV)
-75 -50 -25 0 25 7550 100 125
VCC = +15 V
VEE = -15 V
RL = 10 kΩ
Figure 1. Maximum Power Dissipation versus
Temperature for Package Variations Figure 2. Output Voltage Swing
versus Supply Voltage
Figure 3. Output Voltage Swing
versus Temperature Figure 4. Output Voltage Swing
versus Load Resistance
Figure 5. Output Voltage Swing
versus Frequency Figure 6. Large Signal Voltage Gain
versus Temperature
TA, AMBIENT TEMPERATURE (°C)
D
P, MAXIMUM POWER DISSIPATION (mW)
-55 -40 -20 0 20 40 60 80 100 120 140 160
SO-14
SO-8
VCC, |VEE|, SUPPLY VOLTAGE (V)
0 2.0 4.0 6.0 8.0 10 12 14 16
RL = 10 kΩ
TA = 25°C
TA, AMBIENT TEMPERATURE (°C)
-75 -50 -25 0 25 50 75 100 125
VCC = +15 V
VEE = -15 V
RL = 10 kΩ
RL, LOAD RESISTANCE (kΩ)
0.1 0.2 0.3 0.5 0.7 1.0 2.0 3.0 5.0 7.0 10
VCC = +15 V
VEE = -15 V
TA = 25°C
f, FREQUENCY (Hz)
100 1.0 k 10 k 100 k 1.0 M 10 M 10
20
30
40
50
70
100
0
400
800
1200
1600
2000
2400
0
5.0
10
15
20
25
30
35
40
0
5.0
10
15
20
25
30
35
40
0
6.0
12
18
24
30
0
5.0
10
15
20
25
30
35
VO, OUTPUT VOLTAGE SWING (Vpp)
VO, OUTPUT VOLTAGE SWING (Vpp)
TL062 TL064
http://onsemi.com
5
VCC = +15 V
VEE = -15 V
VO = 0 V
RL = ∞Ω
Phase
Gain
VCC = +15 V
VEE = -15 V
VO = 0 V
RL = 10 kΩ
CL = 0 pF
TA = 25°C
Figure 7. Open Loop Voltage Gain
and Phase versus Frequency Figure 8. Supply Current per Amplifier
versus Supply Voltage
Figure 9. Supply Current per Amplifier
versus Temperature Figure 10. Total Power Dissipation
versus Temperature
Figure 11. Common Mode Rejection
versus Temperature Figure 12. Common Mode Rejection
versus Frequency
f, FREQUENCY (Hz)
VOL
A, OPEN LOOP VOLTAGE GAIN (dB)
1.0 10 100 1.0 k 10 k 1.0 M 10 M 100 M
100 k
, EXCESS PHASE (DEGREES)
φ
f, FREQUENCY (Hz)
CMR, COMMON MODE REJECTION (dB)
100 1 k 10 k 100 k 1 M
VCC, |VEE|, SUPPLY VOLTAGE (V)
0 2.0 4.0 6.0 8.0 10 12 14 16 18 20
TA, AMBIENT TEMPERATURE (°C)
-75 -50 -25 0 25 50 75 100 125
ICC , SUPPLY CURRENT (µ/A)
PD, TOTAL POWER DISSIPATION (MW)
TA, AMBIENT TEMPERATURE (°C)
1251007550250-25-50-75
TL064
TL062
TA, AMBIENT TEMPERATURE (°C)
CMR, COMMON MODE REJECTION (dB)
1251007550250-25-50-75
ICC , SUPPLY CURRENT (µA)
100
80
60
40
20
0
140
120
100
80
60
40
20
0
0
50
100
150
200
250
0
50
100
150
200
250
0
5.0
10
15
20
25
80
81
82
83
84
85
86
87
88
0
45
90
135
180
VCC = +15 V
VEE = -15 V
∆VCM = ±1.5 V
TA = 25°C
TA = 25°C
VO = 0 V
RL = ∞Ω
VCC = +15 V
VEE = -15 V
VO = 0 V
RL = ∞Ω
VCC = +15 V
VEE = -15 V
VO = 0 V
RL = 10 kΩ
CMR = 20 Log
ADM
-
+
∆VCM
∆VO
X ADM
∆VCM
∆VO
TL062 TL064
http://onsemi.com
6
VCC = +15 V
VEE = -15 V
RS = 100 Ω
TA = 25°C
+PSR = 20Log ∆VO/ADM
∆VCC
-PSR = 20Log ∆VO/ADM
∆VEE
+PSR (∆VCC = ±1.5 V)
-PSR (∆VEE = ±1.5 V)
VCC = +15 V
VEE = -15 V
TA = 25°C
VCC
VEE
ADM
-
+∆VO
Figure 13. Power Supply Rejection
versus Frequency
Figure 14. Normalized Gain Bandwidth
Product, Slew Rate and Phase
Margin versus Temperature
Figure 15. Input Bias Current
versus Temperature Figure 16. Input Noise Voltage
versus Frequency
Figure 17. Small Signal Response Figure 18. Large Signal Response
f, FREQUENCY (Hz)
PSR, POWER SUPPLY REJECTION (dB)
100 1.0 k 10 k 100 k 1.0 M
TA, AMBIENT TEMPERATURE (°C)
NORMALIZED GAIN BANDWIDTH
PRODUCT AND SLEW RATE
-75 -50 -25 0 25 50 75 100 125
m
φ, NORMALIZED PHASE MARGIN
Phase Margin
Slew Rate
TA, AMBIENT TEMPERATURE (°C)
IIB, INPUT BIAS CURRENT (pA)
-55 -25 0 25 50 75 100 125
VCC = +15 V
VEE = -15 V
VCM = 0 V
f, FREQUENCY (Hz)
en, INPUT NOISE VOLTAGE (
10 100 1.0 k 10 k 100 k
)
nV/ Hz√
t, TIME (0.5 µs/DIV)
VO, OUTPUT VOLTAGE (10 mV/DIV)
VCC = +15 V
VEE = -15 V
RL = 10 kΩ
CL = 0 pF
AV = +1.0
t, TIME (2.0 µs/DIV)
VO, OUTPUT VOLTAGE (5.0 V/DIV)
GBW
VCC = +15 V
VEE = -15 V
RL = 10 kΩ
CL = 0 pF
AV = +1.0
140
120
100
80
60
40
20
0 0.6
0.7
0.8
0.9
1.0
1.1
1.2
1.3
1.4
0.001
0.01
0.1
1.0
10
100
1000
0
10
20
30
40
50
60
70
1.08
1.06
1.04
1.02
1.0
0.98
0.96
0.94
0.92
VCC = +15 V
VEE = -15 V
RL = 10 kΩ
CL = 0 pF
TL062 TL064
http://onsemi.com
7
C3
2
1
2π R1 C1
Figure 19. AC Amplifier Figure 20. High–Q Notch Filter
Figure 21. Instrumentation Amplifier
Figure 22. 0.5 Hz Square–Wave Oscillator Figure 23. Audio Distribution Amplifier
+
1/2
TL062
5
1
250 kΩ
10 kΩ
50 Ω
VCC
Output
1.0 MΩ
0.1 µF
Inputs
-
10 kΩ
10 kΩ
0.1 µF
VCC
VEE
Output
R2R1
C3
R3
C2C1
Input
R1 = R2 = 2R3 = 1.5 MΩ
C1 = C2 = = 110 pF
fo = = 1.0 kHz
-
+
+
-
TL064
Input A
10 kΩ
0.1%
VCC
Output
VCC
VCC
VCC
VEE
VEE
VEE
VEE
-
-
-+
+
+
TL064
TL064
TL064
Input B
100 kΩ
10 kΩ
0.1%
10 kΩ
0.1%
10 kΩ
0.1%
100 kΩ
100 Ω
1.0
MΩ
1
CF = 3.3 µF
RF = 100 kΩ
+15 V
+
-
-15 V
9.1 kΩ
f =
1.0 kΩ
3.3 kΩ
3.3 kΩ
+
-
TL064
VCC
1.0 MΩ
100 kΩ
VCC
100 µF
VCC
VCC
VCC
1.0 µF
Input
Output A
Output B
Output C
-
-
-
+
+
+
TL064
TL064
TL064
100 kΩ
100 kΩ
100 kΩ
100 kΩ
1/2
TL062
1/2
TL062
2π RF CF
TL062 TL064
http://onsemi.com
8
P SUFFIX
PLASTIC PACKAGE
CASE 626–05
ISSUE K
D SUFFIX
PLASTIC PACKAGE
CASE 751–05
(SO–8)
ISSUE R
OUTLINE DIMENSIONS
14
58
F
NOTE 2 –A–
–B–
–T–
SEATING
PLANE
H
J
GDK
N
C
L
M
M
A
M
0.13 (0.005) B M
T
NOTES:
1. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
2. PACKAGE CONTOUR OPTIONAL (ROUND OR
SQUARE CORNERS).
3. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
DIM MIN MAX MIN MAX
INCHESMILLIMETERS
A9.40 10.16 0.370 0.400
B6.10 6.60 0.240 0.260
C3.94 4.45 0.155 0.175
D0.38 0.51 0.015 0.020
F1.02 1.78 0.040 0.070
G2.54 BSC 0.100 BSC
H0.76 1.27 0.030 0.050
J0.20 0.30 0.008 0.012
K2.92 3.43 0.115 0.135
L7.62 BSC 0.300 BSC
M--- 10 --- 10
N0.76 1.01 0.030 0.040

SEATING
PLANE
1
4
58
A0.25 MCB SS
0.25 MBM
h
C
X 45
L
DIM MIN MAX
MILLIMETERS
A1.35 1.75
A1 0.10 0.25
B0.35 0.49
C0.18 0.25
D4.80 5.00
E
1.27 BSCe
3.80 4.00
H5.80 6.20
h
0 7
L0.40 1.25
0.25 0.50
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. DIMENSIONS ARE IN MILLIMETERS.
3. DIMENSION D AND E DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.
5. DIMENSION B DOES NOT INCLUDE MOLD
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 TOTAL IN EXCESS
OF THE B DIMENSION AT MAXIMUM MATERIAL
CONDITION.
D
EH
A
Be
B
A1
CA
0.10
TL062 TL064
http://onsemi.com
9
N SUFFIX
PLASTIC PACKAGE
CASE 646–06
ISSUE L
D SUFFIX
PLASTIC PACKAGE
CASE 751A–03
(SO–14)
ISSUE F
OUTLINE DIMENSIONS
17
14 8
B
A
F
HG D K
C
N
L
J
M
SEATING
PLANE
NOTES:
1. LEADS WITHIN 0.13 (0.005) RADIUS OF TRUE
POSITION AT SEATING PLANE AT MAXIMUM
MATERIAL CONDITION.
2. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
3. DIMENSION B DOES NOT INCLUDE MOLD
FLASH.
4. ROUNDED CORNERS OPTIONAL.
DIM MIN MAX MIN MAX
MILLIMETERSINCHES
A0.715 0.770 18.16 19.56
B0.240 0.260 6.10 6.60
C0.145 0.185 3.69 4.69
D0.015 0.021 0.38 0.53
F0.040 0.070 1.02 1.78
G0.100 BSC 2.54 BSC
H0.052 0.095 1.32 2.41
J0.008 0.015 0.20 0.38
K0.115 0.135 2.92 3.43
L0.300 BSC 7.62 BSC
M0 10 0 10
N0.015 0.039 0.39 1.01

–A–
–B–
G
P7 PL
14 8
71 M
0.25 (0.010) B M
S
B
M
0.25 (0.010) A S
T
–T–
F
RX 45
SEATING
PLANE D14 PL K
C
J
M
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
DIM MIN MAX MIN MAX
INCHESMILLIMETERS
A8.55 8.75 0.337 0.344
B3.80 4.00 0.150 0.157
C1.35 1.75 0.054 0.068
D0.35 0.49 0.014 0.019
F0.40 1.25 0.016 0.049
G1.27 BSC 0.050 BSC
J0.19 0.25 0.008 0.009
K0.10 0.25 0.004 0.009
M0 7 0 7
P5.80 6.20 0.228 0.244
R0.25 0.50 0.010 0.019
 
TL062 TL064
http://onsemi.com
10
NOTES
TL062 TL064
http://onsemi.com
11
NOTES
TL062 TL064
http://onsemi.com
12
ON Semiconductor is a trademark and is a registered trademark of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right
to make changes without further notice to any products herein. SCILLC makes no warranty , representation or guarantee regarding the suitability of its products
for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any
and all liability, including without limitation special, consequential or incidental damages. “T ypical” parameters which may be provided in SCILLC data sheets
and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must
be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.
SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death
may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC
and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees
arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized u se, even if such claim alleges that
SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
PUBLICATION ORDERING INFORMATION
JAPAN: ON Semiconductor, Japan Customer Focus Center
4–32–1 Nishi–Gotanda, Shinagawa–ku, Tokyo, Japan 141–0031
Phone: 81–3–5740–2700
Email: r14525@onsemi.com
ON Semiconductor Website: http://onsemi.com
For additional information, please contact your local
Sales Representative.
TL062/D
Literature Fulfillment:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303–675–2175 or 800–344–3860 Toll Free USA/Canada
Fax: 303–675–2176 or 800–344–3867 Toll Free USA/Canada
Email: ONlit@hibbertco.com
N. American Technical Support: 800–282–9855 Toll Free USA/Canada