GDML 3011-LED 24 GY FO - BELDEN WIRE AND CABLE

Symbol Test Conditions Maximum Ratings

VDSS TJ= 25C to 150C 500 V

VDGR TJ= 25C to 150C, RGS = 1M 500 V

VGSS Continuous 30 V

VGSM Transient 40 V

ID25 TC= 25C 63 A

IDM TC= 25C, Pulse Width Limited by TJM 330 A

IATC= 25C 66A

EAS TC= 25C3J

dv/dt IS IDM, VDD  VDSS, TJ  150C 35 V/ns

PDTC= 25C 520 W

TJ-55 ... +150 C

TJM 150 C

Tstg -55 ... +150 C

TLMaximum Lead Temperature for Soldering 300 °C

TSOLD Plastic Body for 10s 260 °C

FCMounting Force 40..120 / 9..27 N/lb.

VISOL 50/60 Hz, RMS t = 1 min 2500 V~

IISOL  1 mA t = 1 s 3000 V~

Weight 8g

Symbol Test Conditions Characteristic Values

(TJ = 25C Unless Otherwise Specified) Min. Typ. Max.

BVDSS VGS = 0V, ID = 3mA 500 V

VGS(th) VDS = VGS, ID = 8mA 3.0 5.0 V

IGSS VGS = 30V, VDS = 0V 200 nA

IDSS VDS = VDSS, VGS = 0V 50 A

TJ = 125C 6 mA

RDS(on) VGS = 10V, ID = 66A, Note 1 43 m

IXFL132N50P3 VDSS = 500V

ID25 = 63A

RDS(on) 



 43m





trr 



 250ns

DS100409A(11/13)

N-Channel Enhancement Mode

Avalanche Rated

Fast Intrinsic Rectifier

Features

Silicon Chip on Direct-Copper-Bond

Substrate

- High Power Dissipation

- Isolated Mounting Surface

- 2500V~ Electrical Isolation

Avalanche Rated

Low Package Inductance

Fast Intrinsic Rectifier

Low RDS(on) and QG

Advantages

Easy to Mount

Space Savings

Applications

DC-DC Converters

Battery Chargers

Switch-Mode and Resonant-Mode

Power Supplies

Uninterrupted Power Supplies

AC Motor Drives

High Speed Power Switching

Applications

Polar3TM HiPerFETTM

Power MOSFET

(Electrically Isolated Tab)

ISOPLUS264

G = Gate D = Drain

S = Source

G

DSIsolated Tab

Preliminary Technical Information

IXFL132N50P3

IXYS Reserves the Right to Change Limits, Test Conditions, and Dimensions.

Symbol Test Conditions Characteristic Values

(TJ = 25C Unless Otherwise Specified) Min. Typ. Max.

gfs VDS = 10V, ID = 66A, Note 1 68 115 S

Ciss 18.6 nF

Coss VGS = 0V, VDS = 25V, f = 1MHz 1750 pF

Crss 5.0 pF

RGi Gate Input Resistance 1.0 

td(on) 44 ns

tr 9 ns

td(off) 72 ns

tf 8 ns

Qg(on) 250 nC

Qgs VGS = 10V, VDS = 0.5 • VDSS, ID = 66A 90 nC

Qgd 52 nC

RthJC 0.24C/W

RthCS 0.15 C/W

Source-Drain Diode

Symbol Test Conditions Characteristic Values

(TJ = 25C Unless Otherwise Specified) Min. Typ. Max.

ISVGS = 0V 132 A

ISM Repetitive, Pulse Width Limited by TJM 530 A

VSD IF = 100A, VGS = 0V, Note 1 1.5 V

trr 250 ns

QRM 1.9 C

IRM 16.4 A

IXYS MOSFETs and IGBTs are covered 4,835,592 4,931,844 5,049,961 5,237,481 6,162,665 6,404,065 B1 6,683,344 6,727,585 7,005,734 B2 7,157,338B2

by one or more of the following U.S. patents: 4,860,072 5,017,508 5,063,307 5,381,025 6,259,123 B1 6,534,343 6,710,405 B2 6,759,692 7,063,975 B2

4,881,106 5,034,796 5,187,117 5,486,715 6,306,728 B1 6,583,505 6,710,463 6,771,478 B2 7,071,537

Note 1. Pulse test, t  300s, duty cycle, d  2%.

Resistive Switching Times

VGS = 10V, VDS = 0.5 • VDSS, ID = 66A

RG = 1 (External)

IF = 66A, -di/dt = 100A/s

VR = 100V, VGS = 0V

1 = Gate

2,4 = Drain

3 = Source

ISOPLUS264 (IXFL) OUTLINE

PRELIMANARY TECHNICAL INFORMATION

The product presented herein is under development. The Technical Specifications offered are

derived from a subjective evaluation of the design, based upon prior knowledge and experi-

ence, and constitute a "considered reflection" of the anticipated result. IXYS reserves the right

to change limits, test conditions, and dimensions without notice.

IXFL132N50P3

Fi g. 1. Ou tp ut C h ar act er i st i cs @ T

J

= 25ºC

0

20

40

60

80

100

120

140

0123456

V

DS

- Volts

I

D

- Amperes

V

GS

= 10V

8V

5

V

6

V

7

V

Fi g. 2. Extend ed Ou t p u t C h ar a cter i st i cs @ T

J

= 25ºC

0

50

100

150

200

250

0 5 10 15 20 25

V

DS

- Vo lts

I

D

- Amperes

V

GS

= 10V

8V

6

V

5

V

7

V

Fi g . 3. Ou tpu t C h ar ac ter i stics @ T

J

= 125º C

0

20

40

60

80

100

120

140

02468101214

V

DS

- Volts

I

D

- Ampere s

5

V

6V

4V

V

GS

= 10V

8V

7V

Fig. 4. R

DS(on)

No r mal i z ed to I

D

= 66A Valu e vs.

Junction T emperature

0.4

0.8

1.2

1.6

2.0

2.4

2.8

3.2

-50 -25 0 25 50 75 100 125 150

T

J

- Deg re es Centigrade

R

DS(on)

- Normalized

V

GS

= 10V

I

D

= 132A

I

D

= 66A

Fig. 5. R

DS(on)

Normalized to I

D

= 66A Valu e vs.

Drain Current

0.6

1.0

1.4

1.8

2.2

2.6

3.0

0 50 100 150 200 250

I

D

- Amp e res

R

DS(on)

- Normali zed

V

GS

= 10V T

J

= 125ºC

T

J

= 25ºC

Fig. 6. Maximum Drain Current vs.

Case Temp er atu r e

0

10

20

30

40

50

60

70

-50 -25 0 25 50 75 100 125 150

T

C

- Degrees Centigrade

I

D

- Ampere s

IXFL132N50P3

IXYS Reserves the Right to Change Limits, Test Conditions, and Dimensions.

Fig. 7. Input Adm ittance

0

20

40

60

80

100

120

140

160

180

200

3.54.04.55.05.56.06.57.07.5

V

GS

- Volt s

I

D

- Amper es

T

J

= 125ºC

25ºC

- 40ºC

Fig. 8. Transconductance

0

20

40

60

80

100

120

140

160

180

200

0 20 40 60 80 100 120 140 160 180 200 220

I

D

- Amp eres

g

f s

- Siemens

T

J

= - 40ºC

125ºC

25ºC

Fig. 9. Forward Voltage Drop of Intrinsic Diode

0

50

100

150

200

250

300

350

0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4

V

SD

- Volts

I

S

- Amperes

T

J

= 12 5ºC

T

J

= 25ºC

Fig. 10. Gate Charge

0

1

2

3

4

5

6

7

8

9

10

0 50 100 150 200 250

Q

G

- NanoCoulombs

V

GS

- Volts

V

DS

= 25 0V

I

D

= 66A

I

G

= 10mA

Fig. 11. Capacitance

1

10

100

1,000

10,000

100,000

0 5 10 15 20 25 30 35 40

V

DS

- Volts

Capacitance - PicoFar ads

f

= 1 MHz

Ciss

Crss

Coss

Fig. 12. Forward-Bias Safe Operating Ar ea

1

10

100

1000

10 100 1,000

V

DS

- Volts

I

D

- Am peres

T

J

= 150ºC

T

C

= 25ºC

Single Pulse

100µs

1ms

R

DS(on)

Limit

IXFL132N50P3

IXYS REF: F_132N50P3(K9)03-17-11

Fig. 13. Maxim um Transient Therm al Impedance

0.001

0.01

0.1

1

0.0001 0.001 0.01 0.1 1 10

Pulse Width - Seconds

Z

(th)JC

- ºC / W

Fig. 13. Maximum Trans ient Thermal I mpedance

aaaa

0.4