The A6862 is an N-channel power MOSFET driver capable
of controlling MOSFETs connected as a 3-phase solid-state
relay in phase-isolation applications. It has three independent
floating gate drive outputs to maintain the power MOSFETs in
the on-state over the full supply range with high phase-voltage
slew rates. An integrated charge pump regulator provides the
above battery supply voltage necessary to maintain the power
MOSFETs in the on-state continuously when the phase voltage
is equal to the battery voltage. The charge pump will maintain
sufficient gate drive (>7.5 V) for battery voltages down to 4.5 V
with 100 kΩ gate source resistors.
The three gate drives can be controlled by a single logic-level
input. In typical applications, the MOSFETs will be switched
on within 8 µs and will switch off within 1 µs.
Two independent activation inputs can be used to put the A6862
into a low-power sleep mode with the charge pump disabled.
Undervoltage monitors check that the pumped supply voltage
and the gate drive outputs are high enough to ensure that the
MOSFETs are maintained in a safe conducting state.
The A6862 is supplied in a 16-lead TSSOP (LP) with exposed
pad for enhanced thermal dissipation. They are lead (Pb) free,
with 100% matte-tin leadframe plating.
A6862-DS, Rev. 1
MCO-0000285
• Three floating N-channel MOSFET drives
• Maintains VGS with 100 kΩ gate-source resistors
• Integrated charge pump controller
• 4.5 to 50 V supply voltage operating range
• Two independent activation inputs
• Single phase-enable input
• VCP and VGS undervoltage protection
• 150°C ambient (165°C junction) continuous
Automotive 3-Phase Isolator MOSFET Driver
PACKAGE:
Figure 1: Typical Application Diagram
A6862
APPLICATIONS
• 3-phase disconnect for ASIL systems up to level D
• Electric power steering (EPS)
• Electric braking
• 3-phase solid-state relay driver
Not to scale
FEATURES AND BENEFITS DESCRIPTION
16-lead TSSOP with exposed thermal pad (suffix LP)
A4910
A4935
A4937
A4939
VBAT
Micro-
Controller
A4405
Regulator
3-Phase
BLDC
Motor
A6862
August 25, 2017
Automotive 3-Phase Isolator MOSFET Driver
A6862
2
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
SELECTION GUIDE
Part Number Packing Package
A6862KLPTR-T 4000 pieces per 13-inch reel 16-lead TSSOP with exposed thermal pad, 4.4 mm × 5 mm case
ABSOLUTE MAXIMUM RATINGS
[1]
Characteristic Symbol Notes Rating Units
Load Voltage Supply VBB –0.3 to 50 V
Terminal VCP VCP
VBB – 0.3 to
VBB + 12 V
Terminal CP1 VCP1
VBB – 12 to
VBB + 0.3 V
Terminal CP2 VCP2
VBB – 0.3 to
VCP4 + 0.3 V
Terminal CP3 VCP3
VBB – 12 to
VBB + 0.3 V
Terminal CP4 VCP4
VCP2 – 0.3 to
VCP + 0.3 V
Terminal IG, POK, ENA VI–0.3 to 50 V
Terminal GU, GV, GW VGX
VSX – 0.3 to
VSX + 12 V
Terminal SU, SV, SW VSX –6 to VBB + 5 V
Operating Ambient Temperature TALimited by power dissipation –40 to 150 °C
Maximum Continuous Junction Temperature TJ(max) 165 °C
Transient Junction Temperature TJt
Overtemperature event not exceeding 10 seconds;
lifetime duration not exceeding 10 hours;
guaranteed by design characterization.
175 °C
Storage Temperature Tstg –55 to 150 °C
[1] With respect to GND. Ratings apply when no other circuit operating constraints are present.
THERMAL CHARACTERISTICS: May require derating at maximum conditions
Characteristic Symbol Test Conditions
[2] Value Units
Package Thermal Resistance
(Junction to Ambient) RθJA
4-layer PCB based on JEDEC standard 34 °C/W
1-layer PCB with copper limited to solder pads 43 °C/W
Package Thermal Resistance
(Junction to Pad) RθJP 2 °C/W
[2] Additional thermal data available on the Allegro Web site.
SPECIFICATIONS
Automotive 3-Phase Isolator MOSFET Driver
A6862
3
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Terminal List Table
Name Number Description
CP1 5 Pump capacitor connection
CP2 4 Pump capacitor connection
CP3 3 Pump capacitor connection
CP4 2 Pump capacitor connection
ENA 8 Phase enable input
GND 9 Ground
GU 15 U-phase MOSFET gate drive
GV 13 V-phase MOSFET gate drive
GW 11 W-phase MOSFET gate drive
IG 6 Ignition input
POK 7 Power OK input
SU 14 U-phase MOSFET source reference
SV 12 V-phase MOSFET source reference
SW 10 W-phase MOSFET source reference
VBB 1 Main power supply
VCP 16 Pumped supply
PAD – Exposed pad; connect to GND
Package LP, 16-Pin TSSOP Pinout Diagram
PINOUT DIAGRAM AND TERMINAL LIST TABLE
VBB
CP4
CP3
CP2
CP1
IG
POK
ENA
VCP
GU
SU
GV
SV
GW
SW
GND
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
PAD
Automotive 3-Phase Isolator MOSFET Driver
A6862
4
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
GU
SU
GND
VCP
VBB
VCP
Bridge
Motor
GV
SV
VCP Bridge
Motor
GW
SW
VCP Bridge
Motor
VCP
Battery
Reverse
Protected
Supply
Floating
Gate-Drive
Charge Pump
IG
CP4
CP3
Floating
Gate-Drive
Floating
Gate-Drive
CP2
CP1
CCP1
CCP2
CVCP
GND
POK
ENA Level
Shift
Mon
Mon
Mon
Mon
Voltage
Monitors
VOLF
To Ignition Switch
To Logic Power Monitor
FUNCTIONAL BLOCK DIAGRAM
Automotive 3-Phase Isolator MOSFET Driver
A6862
5
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Characteristics Symbol Test Conditions Min. Typ. Max. Units
SUPPLY
VBB Functional Operating Range [1] VBB
Operating; outputs active 4.5 – 50 V
Operating; outputs disabled 4 – 50 V
No undefined states 0 – 50 V
VBB Supply Current
IBB Gate drive active, VBB = 12 V – 11 15 mA
IBBQ Gate drive inactive, VBB = 12 V – 6 9 mA
IBBS IG or POK < 0.8 V, VBB = 12 V – – 10 µA
VCP Output Voltage w.r.t. VBB VCP
VBB > 9 V, IVCP > –1 mA
[2] 9 10 11 V
6 V < VBB ≤ 9 V, IVCP > –1 mA
[2] 8 10 11 V
4.5 V < VBB ≤ 6 V, IVCP > –800 µA
[2] 7.5 9.5 – V
VCP Static Load Resistor RCP Between VCP and VBB (using ±1% tolerance resistor) 100 – – kΩ
GATE DRIVE
Turn-On Time trCLOAD = 10 nF, 20% to 80% – 5 – µs
Turn-Off Time tfCLOAD = 10 nF, 80% to 20% – 0.5 – µs
Propagation Delay – Turn On
[3] tPON CLOAD = 10 nF, ENx high to Gx 20% – – 3 µs
Propagation Delay – Turn Off
[3] tPOFF CLOAD = 10 nF, ENx low to Gx 80% – – 2.25 µs
Turn-On Pulse Current IGXP 8.5 10 12 mA
Turn-On Pulse Time tGXP 16 – 36 µs
On Hold Current IGXH – 400 – μA
Pull-Down On Resistance RDS(on)DN
TJ = 25°C, IGx= 10 mA – 5 – Ω
TJ = 150°C, IGx = 10 mA – 10 – Ω
Gx Output High Voltage w.r.t. SX,
when SX ≤ VBB
VGH
VBB > 9 V 9 10 12 V
6 V < VBB ≤ 9 V 8 10 12 V
4.5 V < VBB ≤ 6 V 7.5 9.5 – V
Gate Drive Static Load Resistor RGS Between Gx and Sx (using ±1% tolerance resistor) 100 – – kΩ
Gx Output Voltage Low VGL –10 µA < IGx < 10 µA – – VSX + 0.3 V
Gx Passive Pull-Down RGPD VGx – VSx < 0.3 V – 950 – kΩ
ELECTRICAL CHARACTERISTICS: Valid at TJ = –40 to 150°C, VBB = 4.5 to 50 V, unless noted otherwise
Continued on next page...
Automotive 3-Phase Isolator MOSFET Driver
A6862
6
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
ELECTRICAL CHARACTERISTICS (continued): Valid at TJ = –40 to 150°C, VBB = 4.5 to 50 V, unless noted otherwise
Characteristics Symbol Test Conditions Min. Typ. Max. Units
LOGIC INPUTS AND OUTPUTS
ENA Input Low Voltage VIL – – 0.4 V
ENA Input High Voltage VIH 0.7 – – V
ENA Input Hysteresis VIhys 120 200 – mV
ENA Input Pull-Down Resistor RPD – 100 – kΩ
ENA Output Low Voltage VOLF Any VGS or VCP undervoltage, IOL = –0.5 mA [2] 1.1 1.0 0.9 V
POK, IG Input High Voltage VIH 2.0 – – V
POK, IG Input Low Voltage VIL – – 0.8 V
POK, IG Input Pull-Down Resistor RPD – 100 – kΩ
DIAGNOSTICS AND PROTECTION
VGS Undervoltage Threshold Rising VGSUV 6.0 – 7.0 V
VGS Undervoltage Threshold
Hysteresis VGShys – 200 – mV
VGS Undervoltage Filter Time tGSUV 3.7 – 18 µs
VCP Undervoltage Filter Time tCPUV – 12.5 – µs
VCP Startup Blank Timer tCPON – 100 – µs
VCP Undervoltage Lockout VCPON VCP w.r.t. VBB, VCP rising 6.5 7.0 7.5 V
VCPOFF VCP w.r.t. VBB, VCP falling 6.25 6.75 7.25 V
[1] Function is correct but parameters are not guaranteed below the general limits (4.5 to 50 V).
[2] For input and output current specications, negative current is dened as coming out of (sourcing) the specied device terminal.
[3] Refer to Figure 2.
Figure 2: Enable Input to VGS Timing
EN
A
VGS
x
tr
20%
80%
tf
20%
80%
tPON
tPOFF
Automotive 3-Phase Isolator MOSFET Driver
A6862
7
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
FUNCTIONAL DESCRIPTION
The A6862 is an N-channel power MOSFET driver capable of
controlling MOSFETs connected as a 3-phase solid-state relay
in phase-isolation applications. It has three independent floating
gate drive outputs to maintain the power MOSFETs in the
on-state or the off-state over the full supply range when the phase
outputs are PWM switched with high phase-voltage slew rates.
The three gate drives can be controlled by a single logic-level
signal on the enable input. In typical applications, the MOSFETs
will be switched on within 8 µs and will switch off within 1 µs.
The enable input can also be used as an open-drain output to
indicate that the charge pump regulator is undervoltage.
A charge pump regulator provides the above-battery supply
voltage necessary to maintain the power MOSFETs in the
on-state continuously when the phase voltage is equal to the
battery voltage. Voltage regulation is based on the difference
between VBB and VCP
.
The charge pump will maintain sufficient gate drive (>7.5 V)
for battery voltages down to 4.5 V. It is also able to provide the
current taken by gate source resistors as low as 100 kΩ, should
they be required, between the source and gate of the power
MOSFETs.
The voltage generated by the charge pump can also be used
to power circuitry to control the gate source voltage for a
MOSFET connected to the main supply to provide reverse battery
protection.
Two independent activation inputs can be used to disable
the charge pump and put the A6862 into a low-power sleep
mode. These two inputs can be driven by logic-level signals or
connected directly to other systems supplies including the main
battery supply through an external reverse protection diode.
Undervoltage monitors check that the pumped supply voltage
and the gate drive outputs are high enough to ensure that the
MOSFETs are maintained in a safe conducting state. If the
pumped supply voltage or any gate drive output voltage is less
than the undervoltage threshold, the enable input ENA will be
pulled low by an open-drain output.
All logic inputs can be shorted to the main positive battery supply
voltage without damage, even during a load dump up to 50 V.
Input and Output Terminal Functions
VBB: Main power supply. The main power supply should be
connected to VBB through a reverse voltage protection circuit.
GND: Main power supply return. Connect to supply ground.
VCP: Pumped gate drive voltage. Can be used to turn on a
MOSFET connected to the main supply, to provide reverse
battery protection. Connect a 1 µF ceramic capacitor between
VCP and VBB.
CP1, CP2: Pump capacitor connections. Connect a 330 nF
ceramic capacitor between CP1 and CP2.
CP3, CP4: Pump capacitor connections. Connect a 330 nF
ceramic capacitor between CP3 and CP4.
ENA: Logic-level input to control all three gate drive outputs.
Pulled to VOLF by open-drain output if VCP or any VGSx is
undervoltage. Battery voltage compliant terminal.
POK: Logic-level input to control the pump regulator activity.
Both POK and IG must be high to enable the charge pump.
Battery voltage compliant terminal.
IG: Logic-level input to control the pump regulator activity. Both
POK and IG must be high to enable the charge pump. Battery
voltage compliant terminal.
GU, GV, GW: Floating gate drive outputs for external N-channel
MOSFETs.
SU, SV, SW: Load phase connections. These terminals are the
reference connections for the floating gate drive outputs.
Power Supplies
A single reverse polarity protected power supply voltage is
required. It is recommended to decouple the supply with ceramic
capacitors connected close to the supply and ground terminals.
The A6862 will operate within specified parameters with
VBB from 4.5 to 50 V and can maintain the external isolator
MOSFETs in the off condition down to 4.0 V. The A6862 will
operate without any undefined states down to 0 V to ensure
deterministic operation during power-up and power-down events.
As the supply voltage rises from 0 V, the gate drive outputs are
maintained in the off-state until the gate voltage is sufficiently
high to ensure conduction and the outputs are enabled.
This provides a very rugged solution for use in the harsh
automotive environment and permits use in start-stop systems.
Automotive 3-Phase Isolator MOSFET Driver
A6862
8
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Pump Regulator
The gate drivers are powered by a regulated charge pump, which
provides the voltage above VBB to ensure that the MOSFETs are
fully enhanced with low on-resistance when the source of the
MOSFET is at the same voltage as VBB.
Voltage regulation is based on the difference between the VBB
and VCP pins.
The pumped voltage, VCP, is available at the VCP terminal and is
limited to 12 V maximum with respect to VBB. This removes the
need for external clamp diodes on the power MOSFETs to limit
the gate source voltage.
It also allows the VCP terminal to be used to power circuitry
to control MOSFETs connected to the main supply to provide
reverse battery protection and supply isolation.
To provide the continuous low-level current required when gate
source resistors are connected to the external MOSFETs, a pump
storage capacitor, typically 1 µF, must be connected between the
VCP and VBB terminals. Pump capacitors, typically 330 nF, must
be connected between the CP1 and CP2 terminals and between
the CP3 and CP4 terminals to provide sufficient charge transfer,
especially at low supply voltage. If driving MOSFETs with a
total charge above 400 nC, larger value capacitors (charge pump
capacitors and CVCP) may be necessary.
The charge pump can be disabled by pulling either the POK or
the IG terminal low. This will cause VCP to reduce to zero, the
outputs to switch off, and the A6862 to enter a low-power sleep
mode with minimum supply current.
Gate Drives
The A6862 is designed to drive external, low on-resistance,
power N-channel MOSFETs when used in a phase isolation
application. The gate drive outputs and the VCP supply will
turn the MOSFETs on in typically 8 µs and will maintain the
on-state during transients on the source of the MOSFETs. The
gate drive outputs will turn the MOSFETs off in typically 1 µs
and will hold them in the off-state during transients on the source.
An integrated hold-off circuit will ensure that the gate source
voltage of the MOSFET is held close to 0 V even with the power
disconnected. This can remove the need for additional gate source
resistors on the isolation MOSFETs. If gate source resistors
are mandatory for the application, then the pump regulator
can provide sufficient current to maintain the MOSFET in the
on-state with a gate source resistor of as low as 100 kΩ using 1%
tolerance resistors.
The floating gate drive outputs for external N-channel MOSFETs
are provided on pins GU, GV, and GW. The reference points
for the floating drives are the load phase connections: SU, SV,
and SW. The discharge current from the floating MOSFET gate
capacitance flows through these connections.
When ENA goes high, the upper-half of all of the drivers are
turned on (low sides are turned off) and a current (IGXP) will be
sourced to the gate, for a period of time defined between tGXP
.
After this period of time, an “on hold current” (IGXH) will be
sourced to the gates of the MOSFETs to keep them switched on.
See Figure 3.
When ENA goes low, the lower half of the drivers are turned on
(high side is turned off) and will sink current from the external
MOSFET’s gates to the respective Sx terminal, turning them off.
See Figure 3.
ENA
Positive-edge
one shot
16-36 µs
VCP
GU
GV
GW
SU
SV
SW
10 mA
Typ
0.40 mA
Typ
11V
Figure 3: Operational Output Drive
Automotive 3-Phase Isolator MOSFET Driver
A6862
9
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Recirculation Current Path
In most applications, it will be necessary to provide a current
recirculation path when the motor load is isolated. This will be
necessary when the motor driver does not reduce the load current
to zero before the isolation MOSFETs are turned off.
There are two ways of connecting the external MOSFETs to the
motor: with the source connected to the bridge or supply (see
Figure 4), and conversely with the source connected to the motor
or load (see Figure 5 and Figure 6). All methods require one diode
per phase.
In the case when the Bridge or supply is connected to the source
(see Figure 4). When the current is flowing from bridge to the
motor and the MOSFET is switch off, the motor inductance will try
to force the voltage on the drain pin down. This will draw current
through the body diode from the bridge. If the bridge is still on, the
current will come from the positive supply, or if it is off, the current
will come from the bridge low-side body diode. If the current is
flowing from the motor to the bridge and the MOSFET is switched
off, the motor inductance will force the voltage on the drain pin up
and the high-power diode is required to clamp the voltage to the
bridge VBB. The high-power diodes must handle the pulse current
capacity to survive all of the drive current flowing through it until
it decreases to zero.
In the second case, the motor is connected to the source (see Figure
5). When the current is flowing from the bridge to the motor and
the MOSFET is switch off, the motor inductance will try to force
the voltage on the source pin down. This will draw current through
the high-power diode from the ground. If the current is flowing
from the motor to the bridge and the MOSFET is switched off, the
motor inductance will force the voltage on the source pin up and
the body diode will conduct. If the bridge is still on, the current will
come from the ground, or if it is off, the current will come from the
bridge high-side body diode. The high-power diodes must handle
the pulse current capacity to survive all of the drive current flowing
through it until it decreases to zero.
The third case—and the recommended method (see Figure 6)—
allows the recirculation current to be dissipated in the external
MOSFETs. This also has the advantage that there is no direct
connection to the supply other than through the external MOSFETs
and the bridge. When the current is flowing from the bridge to the
motor and the MOSFET is switched off, the motor inductance will
try to force the voltage on the source pin down. This will drop the
voltage on the source to –4 V and the gate will be held at –1 V by
the Schottky diode. This will turn on the external MOSFET enough
to draw current through the MOSFET. If the bridge is still on,
current will come from the positive supply, or if it is off, the current
will come from the bridge low-side body diode. If the current is
flowing from the motor to the bridge and the MOSFET is switched
off, the motor inductance will force the voltage on the source pin
up and the body diode will conduct. If the bridge is still on, the
current will come from the ground, or if it is off, the current will
come from the bridge high-side body diode.
High Power
Diode
Bridge
G
S
M
Motor
Bridge Supply
Figure 4: Source to Bridge, Drain Diode
Bridge
Motor
M
G
S
GND
High Power
Diode
Figure 5: Source to Motor, Source Diode
M
S
G
Bridge
Motor
GND
Low Power
Schottky Diode
Figure 6: Source to Motor, Gate Diode
Automotive 3-Phase Isolator MOSFET Driver
A6862
10
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Logic Control Inputs
A single digital terminal, ENA, controls all three gate drives.
When ENA is high, all gate drive outputs will be on. When ENA
is driven low, all gate drive outputs will be off. An internal open-
drain output is connected to the ENA terminal. This will pull the
ENA terminal to a regulated low voltage to indicate the status of
the internal charge pump regulator. This terminal can be shorted
to VBB without damage.
Table 1: Logic Truth Table
ENA IG POK Pump Gate Drive
0 1 1 Active Off
1 1 1 Active On
X 0 1 Disabled Off
X 1 0 Disabled Off
X 0 0 Disabled Off
The two activation inputs, POK and IG, must both be high before
the A6862 is activated with the charge pump operating. These
two inputs can be driven by logic-level signals or connected
directly to other systems supplies including the main battery sup-
ply through an external reverse protection diode. Typically these
would be connected to the logic supply or logic supply monitor
and to the switched battery supply (ignition signal).
When either POK or IG is low, the charge pump will be disabled
and the outputs will be off. This provides additional security in
the case of a supply failure. When the charge pump is disabled,
the supply current drawn by the A6862 will reduce to a very low
level and it will be in a low-power sleep mode.
Charge Pump Output Monitor
The A6862 includes undervoltage detection on the charge pump
output. If the voltage at the charge pump output, VCP, drops
below the undervoltage threshold, VCPON, then a timer is started.
If VCP
, remains below VCPON for the duration of the VCP under-
voltage filter time, tCPUV
, then a VCP undervoltage condition
(VCPU) will be asserted. The ENA input will be pulled to VOLF,
but the device stays in the on-state.
This feature also allows the controller to actively determine
the delay between power-on and the time the outputs should be
activated.
Gate Drive Output Monitor
The gate-source voltage between the Gx terminal and the Sx
terminal, for each phase, is monitored for an undervoltage
condition. If the voltage between the gate and source of
any active gate drive output, VGSx, drops below the VGS
undervoltage threshold, VGSUV
, then a timer is started. If VGSx
remains below VGSUV for the duration of the VGS undervoltage
filter time, tGSUV
, then the ENA input will be pulled to VOLF
, but
all gate drive outputs will remain in the on-state. The ENA will
remain at VOLF until VGSx rises above the undervoltage threshold
VGSUV
.
The status of the charge pump output voltage monitor and the
VGS undervoltage monitors can be checked using the ENA
terminal. To use this feature, the ENA terminal should be driven
with an active open-drain pull-down and a passive pull-up
resistor. When no undervoltage states are present, the voltage at
ENA is determined by the digital voltage on the pull-up resistor
and the control signal (DIS) applied to the ENA terminal.
When any VGS undervoltage condition (VGSUx) is present, then
ENA will be pulled to VOLF and can be recognized as a logic low
by the controller. The controller can then decide whether to hold
the outputs in this state or to switch off the outputs by asserting
the control signal (DIS).
A typical connection arrangement to use this feature is shown in
Figure 7 and Figure 8 and a representative sequence shown in
Figure 9.
The arrangement permits three specific states (see Figure 7):
ON Gate drive commanded on.
No fault indicated.
Gate drive on.
FAULT Gate drive commanded on.
Fault indicated.
Gate drive on.
OFF Gate drive commanded off.
No fault indication.
Gate drive off.
Automotive 3-Phase Isolator MOSFET Driver
A6862
11
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Figure 7: ENA Terminal Input and Output Levels Figure 8: ENA Connection
Figure 9: ENA Signal Sequence
* For signals, see Figure 8
High
High
1.1 V
Input Output
ENA Terminal
0.9 V
0.7 V
On
0.4 V
Low
Fault
Off
ENA
MCU
DIS
A6862
ACTIVE
VDIGITAL
ENH
VOLF (+1 V @ 10-500 µA)
UV = VCPU + VGSUx
R = (VDIGITAL – 1) / (10-500 µA) in Ω
Enabled
by MCU
Disabled by MCU
and Power on
ENA*
ACTIVE*
ENH*
Power
off
Recover when
VCP > VCPON,
after tCPON
VCPUV
after
tCPUV
Active when
VCP > VCPON,
after tCPON
Enabled
by MCU
Power on
DIS*
UV*
VCPON
Disabled
by MCU
VCP
VOLF
VBB
Automotive 3-Phase Isolator MOSFET Driver
A6862
12
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
INPUT AND OUTPUT STRUCTURES
VCP
VESD
CP3
12 V
12 V
CP2 CP4 CP1
12 V
VBB
16 V
16 V
20 V
100 kΩ
IG
POK
200 kΩ
VESD
4 V
ENA
10 µA to 500 µA
UV = VCPU + CGSUx
6 V
0.2 V
4 V
80 kΩ
20 kΩ
VESD
100 kΩ
VCP
GU
GV
GW
SU
SV
SW
11 V
6V
VESD
Figure 10: ENA Terminal
Figure 11: IG, POK Inputs Figure 12: Drive Outputs
Figure 13: Supplies
Automotive 3-Phase Isolator MOSFET Driver
A6862
13
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Figure 14: LP Package, 16-Lead TSSOP with Exposed Pad
A
1.20 (MAX)
0.15
0.00
0.30
0.19
0.20
0.09
8º
0º
0.60 ±0.15
1.00 (REF)
C
SEATING
PLANE
C0.10
16X
0.65 (BSC)
0.25 (BSC)
21
16
5.00 ±0.10
4.40 ±0.10 6.40 ±0.20
GAUGE PLANE
SEATING PLANE
A
B
B
C
D
Exposed thermal pad (bottom surface); dimensions may vary with device
6.10
0.65
0.45
1.70
3.00 (NOM)
3.00
16
21
1
C
D
Branded Face
3 (NOM)
3 (NOM)
For Reference Only – Not for Tooling Use
(Reference MO-153 ABT)
Dimensions in millimeters. NOTTO SCALE
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
PCB Layout Reference View
Terminal #1 mark area
Reference land pattern layout (reference IPC7351 SOP65P640X110-17M);
All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary
to meet application process requirements and PCB layout tolerances; when
mounting on a multilayer PCB, thermal vias at the exposed thermal pad land
can improve thermal dissipation (reference EIA/JEDEC Standard JESD51-5)
Branding scale and appearance at supplier discretion
Standard Branding Reference View
YYWW
NNNNNNN
LLLL
= Device part number
= Supplier emblem
= Last two digits of year of manufacture
= Week of manufacture
= Characters 5-8 of lot number
N
Y
W
L
PACKAGE OUTLINE DRAWING
Automotive 3-Phase Isolator MOSFET Driver
A6862
14
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
For the latest version of this document, visit our website:
www.allegromicro.com
Revision History
Number Date Description
– September 23, 2016 Initial release
1 August 25, 2017 Corrected Turn-Off Time symbol (page 5), Figure 1 (page 6), and Figure 3 (page 8)
Copyright ©2017, Allegro MicroSystems, LLC
Allegro MicroSystems, LLC reserves the right to make, from time to time, such departures from the detail specifications as may be required to
Allegro’s products are not to be used in any devices or systems, including but not limited to life support devices or systems, in which a failure of
The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, LLC assumes no responsibility for its