IPD2545A, IPD2547A, IPD2548A
2006-03-03 10
How to Load Information into the IPD25545/7/8A
Informatio n loaded into t he IPD2545/7/8 A can be either AS CII data
or Control W or d da ta. The follo w ing pr oce dur e (see also Typical
Loading Seque nce) will demonstrate a typical loading sequence
and the resulting visual display. The word STOP is used in all of
the following examples.
Set Brightness
Step 1 Set the brightness level of the entire display to
your preference (example: 100%).
Load Four Characters
Step 2 Load a “S” in the left hand digit.
Step 3 Load a “T” in the next digit.
Step 4 Load an “O” in the next digit.
Step 5 Load a “P” in the right hand digit. If you loaded
the information correctly, the IPD2545A now
should show the word “STOP.”
Blink a Single Character
Step 6 Into the digit, second from the right, load the hex
code “CF,” which is the code for an “O” with the
D7 bit added as a control bit.
Note:
The “O” is th e only digit wh ich has the control bit
(D7) added to normal ASCII data.
Step 7 Load enable blinking character into the control
word register. The display now should show
“STOP” with a flashing “O”.
Add Another Blinking Character
Step 8 Into the left hand digit, load the hex code “D3”
which gives an “S” with the D7 bit added as a
control bit. The display should show “STOP” with
flashing “O” and a flashing “S.”
Alternate Character/Cursor Enable
Step 9 Load enable alternate character/cursor into the
control word register. The display now should
show “STOP” with the “O” and the “S” alternating
between the letter and cursor (all dots lit).
Initiate Four Character Blinking
(Regardless of Contro l Bit setting)
Step 10 Load enable display bl i n kin g. The di splay now
should show the entire word “STOP” blinking.
Electrical and Mechanical Considerations
The CMOS IC of the IPD2545/7/8A are designed to provide resis-
tance to both Electrostatic and Discharge Damage and Latch Up
due to voltage or current surges. Several precautions are strongly
recommended for the user, to avoid overstressing these built-in
safeguards.
ESD Protection
Users of the I PD2545/7/8A sh ould be car eful to hand le the de vice s
consistent with standard ESD protection procedures. Operators
should wear appropriate wrist, ankle or feet ground straps and
avoid clothing that collects static charg es. Work surfaces, tools
and transport carriers that come into contact with unshielded
devices or assemblies also should be appropriately grounded.
Latch up Protection
Latch up is condition that occurs in CMOS ICs after the input pro-
tection diodes have been broken down. These diodes can be
reversed through several means.
VIN<GND, VIN>VCC +0.5 V, or through excessive currents begin
forced on the inputs. When these situations exist, the IC may
develop the response of an SCR and begin conducting as much as
one amp thro ugh the VCC pin. This destructive condition will persist
(latched) until device failure or the device is turned off.
The Voltage Transient Suppression Techniques and buffer inter-
faces for longer cable runs help considerably to prevent latch con-
ditions from occurring. Additionally, the following Power Up and
Power Down sequence should be observed.
RoHS Compliance
The IPD2547A, IPD2545A, IPD2548A Intelligent DisplaysTM are
hermetically sealed displays using a ceramic and glass construc-
tion. These compon ents are not lead (Pb) free b ut are RoHS Co m-
pliant based on the RoHS Compliance Directive's Annex,
paragraphs 5 and 7. These exemptions allow for lead (Pb) in glass
and ceramic electronic components. Refer to the following ex-
cerpts from the RoHS Compliance Directive Annex:
Applications of lead, mercury, cadmium and hexavalent chromium,
which are ex empted from the requirements of Article 4(1)
5. Lead in glass of cathode ray tubes, electronic components and
fluorescent tubes.
7. Lead in electronic ceramic parts (e.g. piezoelectronic devices).
Typical Loading Sequence
CEO CE1 RD WR A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0 Display
1. L H H L L X X 0 0 0 0 0 0 1 1
2. L H H L H H H 0 1 0 1 0 0 1 1 S
3. L H H L H H L 0 1 0 1 0 1 0 0 ST
4. L H H L H L H 0 1 0 0 1 1 1 1 STO
5. L H H L H L L 0 1 0 1 0 0 0 0 STOP
6. L H H L H L H 1 1 0 0 1 1 1 1 STOP
7. L H H L L X X 0 0 0 1 0 1 1 1 STO*P
8. L H H L H H H 1 1 0 1 0 0 1 1 S*TO*P
9. L H H L L X X 0 0 0 1 1 1 1 1 S†TO†P
10. L H H L L X X 0 0 1 0 0 0 1 1 S*T*O*P*
* Blinking c haracter, † Character alternating with c ursor (all dots lit)