IRFP2907PBF - INTERNATIONAL RECTIFIER

Parameter Max. Units

ID @ TC = 25°C Continuous Drain Current, VGS @ 10V 209

ID @ TC = 100°C Continuous Drain Current, VGS @ 10V 148A

IDM Pulsed Drain Current 840

PD @TC = 25°C Power Dissipation 470 W

Linear Derating Factor 3.1 W/°C

VGS Gate-to-Source Voltage ± 20 V

EAS Single Pulse Avalanche Energy1970 mJ

IAR Avalanche Current See Fig.12a, 12b, 15, 16 A

EAR Repetitive Avalanche EnergymJ

dv/dt Peak Diode Recovery dv/dt 5.0 V/ns

TJOperating Junction and -55 to + 175

TSTG Storage Temperature Range

Soldering Temperature, for 10 seconds 300 (1.6mm from case )

°C

Mounting Torque, 6-32 or M3 screw 10 lbf•in (1.1N•m)

IRFP2907PbF

HEXFET® Power MOSFET

This Stripe Planar design of HEXFET® Power MOSFETs

utilizes the lastest processing techniques to achieve

extremely low on-resistance per silicon area. Additional

features of this HEXFET power MOSFET are a 175°C

junction operating temperature, fast switching speed

and improved repetitive avalanche rating. These benefits

combine to make this design an extremely efficient and

reliable device for use in a wide variety of applications.

Absolute Maximum Ratings

Parameter Typ. Max. Units

RθJC Junction-to-Case ––– 0.32

RθCS Case-to-Sink, Flat, Greased Surface 0.24 ––– °C/W

RθJA Junction-to-Ambient ––– 40

Thermal Resistance

VDSS = 75V

RDS(on) = 4.5mΩ

ID = 209A

Description

08/08/11

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TO-247AC

Advanced Process Technology

Ultra Low On-Resistance

Dynamic dv/dt Rating

175°C Operating Temperature

Fast Switching

Repetitive Avalanche Allowed up to Tjmax

Lead-Free

Benefits

Typical Applications

Telecom applications requiring soft start

PD -95050C

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Parameter Min. Typ. Max. Units Conditions

V(BR)DSS Drain-to-Source Breakdown Voltage 75 ––– ––– V VGS = 0V, ID = 250μA

ΔV(BR)DSS/ΔTJBreakdown Voltage Temp. Coefficient ––– 0.085 ––– V/°C Reference to 25°C, ID = 1mA

RDS(on) Static Drain-to-Source On-Resistance ––– 3.6 4.5 mΩVGS = 10V, ID = 125A 

VGS(th) Gate Threshold Voltage 2.0 ––– 4.0 V VDS = 10V, ID = 250μA

gfs Forward Transconductance 130 ––– ––– S VDS = 25V, ID = 125A

––– ––– 20 μAVDS = 75V, VGS = 0V

––– ––– 250 VDS = 60V, VGS = 0V, TJ = 150°C

Gate-to-Source Forward Leakage ––– ––– 200 VGS = 20V

Gate-to-Source Reverse Leakage ––– ––– -200 nA VGS = -20V

QgTotal Gate Charge ––– 410 620 ID = 125A

Qgs Gate-to-Source Charge ––– 92 140 nC VDS = 60V

Qgd Gate-to-Drain ("Miller") Charge ––– 140 210 VGS = 10V

td(on) Turn-On Delay Time ––– 23 ––– VDD = 38V

trRise Time ––– 190 ––– ID = 125A

td(off) Turn-Off Delay Time ––– 130 ––– RG = 1.2Ω

tfFall Time ––– 130 ––– VGS = 10V 

Between lead,

––– ––– 6mm (0.25in.)

from package

and center of die contact

Ciss Input Capacitance ––– 13000 ––– VGS = 0V

Coss Output Capacitance ––– 2100 ––– pF VDS = 25V

Crss Reverse Transfer Capacitance ––– 500 ––– ƒ = 1.0MHz, See Fig. 5

Coss Output Capacitance ––– 9780 ––– VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz

Coss Output Capacitance ––– 1360 ––– VGS = 0V, VDS = 60V, ƒ = 1.0MHz

Coss eff. Effective Output Capacitance ––– 2320 ––– VGS = 0V, VDS = 0V to 60V

Electrical Characteristics @ TJ = 25°C (unless otherwise specified)

LDInternal Drain Inductance

LSInternal Source Inductance ––– –––

IGSS

5.0

IDSS Drain-to-Source Leakage Current

 Repetitive rating; pulse width limited by

max. junction temperature. (See fig. 11).

 Starting TJ = 25°C, L = 0.25mH

RG = 25Ω, IAS = 125A. (See Figure 12).

ISD ≤ 125A, di/dt ≤ 260A/μs, VDD ≤ V(BR)DSS,

TJ ≤ 175°C

 Pulse width ≤ 400μs; duty cycle ≤ 2%.

Notes:

Parameter Min. Typ. Max. Units Conditions

ISContinuous Source Current MOSFET symbol

(Body Diode) ––– ––– showing the

ISM Pulsed Source Current integral reverse

(Body Diode) ––– ––– p-n junction diode.

VSD Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 125A, VGS = 0V 

trr Reverse Recovery Time ––– 140 210 ns TJ = 25°C, IF = 125A

Qrr Reverse RecoveryCharge ––– 880 1320 nC di/dt = 100A/μs 

ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)

Source-Drain Ratings and Characteristics

209

840

 Coss eff. is a fixed capacitance that gives the same charging time

as Coss while VDS is rising from 0 to 80% VDSS .

 Calculated continuous current based on maximum allowable

junction temperature. Package limitation current is 90A.

 Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive

avalanche performance.

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Fig 4. Normalized On-Resistance

Vs. Temperature

Fig 2. Typical Output CharacteristicsFig 1. Typical Output Characteristics

Fig 3. Typical Transfer Characteristics

100

1000

0.1 1 10 100

20μs PULSE WIDTH

T = 25 C

J°

TOP

BOTTOM

VGS

15V

10V

8.0V

7.0V

6.0V

5.5V

5.0V

4.5V

V , Drain-to-Source Voltage (V)

I , Drain-to-Source Current (A)

4.5V

100

1000

0.1 1 10 100

20μs PULSE WIDTH

T = 175 C

J°

TOP

BOTTOM

VGS

15V

10V

8.0V

7.0V

6.0V

5.5V

5.0V

4.5V

V , Drain-to-Source Voltage (V)

I , Drain-to-Source Current (A)

4.5V

100

1000

4.0 5.0 6.0 7.0 8.0 9.0 10.0

V = 25V

20μs PULSE WIDTH

V , Gate-to-Source Voltage (V)

I , Drain-to-Source Current (A)

T = 25 C

J°

T = 175 C

J°

-60 -40 -20 020 40 60 80 100 120 140 160 180

0.0

0.5

1.0

1.5

2.0

2.5

3.0

T , Junction Temperature ( C)

R , Drain-to-Source On Resistance

(Normalized)

DS(on)

V =

I =

10V

209A

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Fig 8. Maximum Safe Operating Area

Fig 6. Typical Gate Charge Vs.

Gate-to-Source Voltage

Fig 5. Typical Capacitance Vs.

Drain-to-Source Voltage

Fig 7. Typical Source-Drain Diode

Forward Voltage

0100 200 300 400 500 600 700

Q , Total Gate Charge (nC)

V , Gate-to-Source Voltage (V)

FOR TEST CIRCUIT

SEE FIGURE

I =

125A

V = 37V

V = 60V

0.1

100

1000

0.0 0.5 1.0 1.5 2.0 2.5 3.0

V ,Source-to-Drain Voltage (V)

I , Reverse Drain Current (A)

V = 0 V

T = 25 C

J°

T = 175 C

J°

110 100

VDS, Drain-to-Source Voltage (V)

4000

8000

12000

16000

20000

C, Capacitance(pF)

Coss

Crss

Ciss

VGS

= 0V, f = 1 MHZ

Ciss

= C

gs + C

gd, C

ds SHORTED

Crss

= C

Coss

= C

+ C

0.1 1 10 100 1000

VDS, Drain-to-Source Voltage (V)

0.1

100

1000

10000

ID, Drain-to-Source Current (A)

OPERATION IN THIS AREA LIMITED

BY RDS(on)

Tc = 25°C

Tj = 175°C

Single Pulse

100μsec

1msec

10msec

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Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

Fig 9. Maximum Drain Current Vs.

Case Temperature

25 50 75 100 125 150 175

120

160

200

240

T , Case Temperature ( C)

I , Drain Current (A)

LIMITED BY PACKAGE

VDS

90%

10%

VGS

d(on)

d(off)

VDS

Pulse Width ≤ 1 µs

Duty Factor ≤ 0.1 %

VGS

D.U.T.

10V

VDD

Fig 10a. Switching Time Test Circuit

Fig 10b. Switching Time Waveforms

1E-006 1E-005 0.0001 0.001 0.01 0.1

t1 , Rectangular Pulse Duration (sec)

0.0001

0.001

0.01

0.1

Thermal Response ( Z thJC ) °C/W

0.20

0.10

D = 0.50

0.02

0.01

0.05

SINGLE PULSE

( THERMAL RESPONSE ) Notes:

1. Duty Factor D = t1/t2

2. Peak Tj = P dm x Zthjc + Tc

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25 50 75 100 125 150 175

1000

2000

3000

4000

5000

Starting T , Junction Temperature ( C)

E , Single Pulse Avalanche Energy (mJ)

TOP

BOTTOM

51A

88A

125A

Charge

D.U.T. V

3mA

.3μF

50KΩ

.2μF

12V

Current Regulator

Same Type as D.U.T.

Current Sampling Resistors

10 V

Fig 13b. Gate Charge Test Circuit

Fig 13a. Basic Gate Charge Waveform

Fig 12c. Maximum Avalanche Energy

Vs. Drain Current

Fig 12b. Unclamped Inductive Waveforms

Fig 12a. Unclamped Inductive Test Circuit

(BR)DSS

0.01

D.U.T

VDS

-V

DRIVER

15V

20V

Fig 14. Threshold Voltage Vs. Temperature

-75 -50 -25 025 50 75 100 125 150 175

TJ , Temperature ( °C )

1.0

1.5

2.0

2.5

3.0

3.5

4.0

VGS(th) , Variace ( V )

ID = 250μA

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Fig 15. Typical Avalanche Current Vs.Pulsewidth

Fig 16. Maximum Avalanche Energy

Vs. Temperature

Notes on Repetitive Avalanche Curves , Figures 15, 16:

(For further info, see AN-1005 at www.irf.com)

1. Avalanche failures assumption:

Purely a thermal phenomenon and failure occurs at a

temperature far in excess of Tjmax. This is validated for

every part type.

2. Safe operation in Avalanche is allowed as long asTjmax is

not exceeded.

3. Equation below based on circuit and waveforms shown in

Figures 12a, 12b.

4. PD (ave) = Average power dissipation per single

avalanche pulse.

5. BV = Rated breakdown voltage (1.3 factor accounts for

voltage increase during avalanche).

6. Iav = Allowable avalanche current.

7. ΔT = Allowable rise in junction temperature, not to exceed

Tjmax (assumed as 25°C in Figure 15, 16).

tav = Average time in avalanche.

D = Duty cycle in avalanche = tav ·f

ZthJC(D, tav) = Transient thermal resistance, see figure 11)

PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC

Iav = 2DT/ [1.3·BV·Zth]

EAS (AR) = PD (ave)·tav

25 50 75 100 125 150 175

Starting TJ , Junction Temperature (°C)

400

800

1200

1600

2000

EAR , Avalanche Energy (mJ)

TOP Single Pulse

BOTTOM 10% Duty Cycle

ID = 125A

1.0E-08 1.0E-07 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01

tav (sec)

100

1000

Avalanche Current (A)

0.05

Duty Cycle = Single Pulse

0.10

Allowed avalanche Current vs

avalanche pulsewidth, tav

assuming ΔTj = 25°C due to

avalanche losses

0.01

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Peak Diode Recovery dv/dt Test Circuit

P.W. Period

di/dt

Diode Recovery

dv/dt

Ripple ≤5%

Body Diode Forward Drop

Re-Applied

Voltage

Reverse

Recovery

Current

Body Diode Forward

Current

=10V

Driver Gate Drive

D.U.T. I

Waveform

D.U.T. V

Waveform

Inductor Curent

D = P. W .

Period







VDD

• dv/dt controlled by RG

• ISD controlled by Duty Factor "D"

• D.U.T. - Device Under Test

D.U.T*Circuit Layout Considerations

• Low Stray Inductance

• Ground Plane

• Low Leakage Inductance

Current Transformer



* Reverse Polarity of D.U.T for P-Channel

VGS

[ ]

*** VGS = 5.0V for Logic Level and 3V Drive Devices

[ ] ***

Fig 17. For N-channel HEXFET® power MOSFETs

IRFP2907PbF

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Data and specifications subject to change without notice.

IR WORLD HEADQUARTERS:101N Sepulveda Blvd., El Segundo, California 90245, USA Tel: (310) 252-7105

TAC Fax: (310) 252-7903

Visit us at www.irf.com for sales contact information.08/2011

TO-247AC Part Marking Information

TO-247AC Package Outline

Dimensions are shown in millimeters (inches)

LINE H

INTERNATIONAL

LOGO

RECTIFIER

ASSEMBLY

56 57

IRFPE30

135H

YEAR 1 = 2001

DATE CODE

PART NUMBER

i ndicates "L ead-F r ee" WEEK 35LOT CODE

IN THE ASSEMBLY LINE "H"

AS SEMBLED ON WW 35, 2001

Note: "P" in ass embly line pos ition

EXAMPLE:

WI T H AS S E MB L Y

THIS IS AN IRFPE30

LOT CODE 5657

TO-247AC package is not recommended for Surface Mount Application.

Notes:

1. For an Automotive Qualified version of this part please seehttp://www.irf.com/product-info/auto/

2. For the most current drawing please refer to IR website at http://www.irf.com/package/