51 fo 1 egaP 00.3.veR 0030JE0400SD90R
Mar 12, 2013
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teehS ataD
NE5550779A
Silicon Power LDMOS FET
FEATURES
High Output Power : Pout = 38.5 dBm TYP. (VDS = 7.5 V, IDset = 140 mA, f = 460 MHz, Pin = 25 dBm)
High power added efficiency : ηadd = 66% TYP. (VDS = 7.5 V, IDset = 140 mA, f = 460 MHz, Pin = 25 dBm)
High Linear gain : GL = 22.0 dB TYP. (VDS = 7.5 V, IDset = 140 mA, f = 460 MHz, Pin = 10 dBm)
High ESD tolerance
Suitable for VHF to UHF-BAND Class-AB power amplifier.
APPLICATIONS
150 MHz Band Radio System
460 MHz Band Radio System
900 MHz Band Radio System
ORDERING INFORMATION
Part Number Order Number Package Marking Supplying Form
NE5550779A NE5550779A-A 79A
(Pb-Free)
W8 12 mm wide embossed taping
Gate pin faces the perforation side of the tape
NE5550779A-T1 NE5550779A-T1-A 12 mm wide embossed taping
Gate pin faces the perforation side of the tape
Qty 1 kpcs/reel
NE5550779A-T1A NE5550779A-T1A-A 12 mm wide embossed taping
Gate pin faces the perforation side of the tape
Qty 5 kpcs/reel
Remark To order evaluation samples, please contact your nearby sales office.
Part number for sample order: NE5550779A-A
ABSOLUTE MAXIMUM RATINGS (TA = 25°C, unless otherwise specified)
Operation in excess of any one of these parameters may result in permanent damage.
Parameter Symbol Ratings Unit
Drain to Source Voltage VDS 30 V
Gate to Source Voltage VGS 6.0 V
I tnerruC niarD DS 2.1 A
Drain Current
(50% Duty Pulsed)
IDS-pulse 4.2 A
Total Power Dissipation Note Ptot 17.8 W
Channel Temperature Tch 150 °C
Storage Temperature Tstg 55 to +150 °C
Note: Value at TC = 25°C
CAUTION
Observe precautions when handling because these devices are sensitive to electrostatic discharge.
R09DS0040EJ0300
Rev.3.00
Mar 12, 2013
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NE5550779A
R09DS0040EJ0300 Rev.3.00 Page 2 of 15
Mar 12, 2013
RECOMMENDED OPERATING RANGE (TA = 25°C)
Parameter Symbol Test Conditions MIN. TYP. MAX. Unit
Drain to Source Voltage VDS 7.5 9.0 V
Gate to Source Voltage VGS 1.65 2.20 2.85 V
Drain Current IDS 1.4 A
Input Power Pin f = 460 MHz, VDS = 7.5 V 25 30 dBm
ELECTRICAL CHARACTERISTICS (TA = 25°C, unless otherwise specified)
Parameter Symbol Test Conditions MIN. TYP. MAX. Unit
DC Characteristics
Gate to Source Leakage Current IGSS V
GS = 6.0 V 100 nA
Drain to Source Leakage Current
(Zero Gate Voltage Drain Current)
IDSS V
DS = 25 V 10
μ
A
Gate Threshold Voltage Vth V
DS = 7.5 V, IDS = 1.0 mA 1.15 1.65 2.25 V
Drain to Source Breakdown Voltage BVDSS I
DS = 10
μ
A 25 38 V
Transconductance Gm V
DS = 7.5 V, IDS = 490±70 mA 1.26 1.54 2.03 S
Thermal Resistance Rth Channel to Case 7.0 °C/W
RF Characteristics
Output Power Pout f = 460 MHz, VDS = 7.5 V, 37.0 38.5 dBm
Drain Current IDS P
in = 25 dBm, 1.38 A
Power Drain Efficiency
η
d I
Dset = 140 mA (RF OFF) 68 %
Power Added Efficiency
η
add 66 %
Linear Gain GL Note 1 22.0 dB
Load VSWR Tolerance Note 2 f = 460 MHz, VDS = 9.0 V,
Pin = 25 dBm,
IDset = 140 mA (RF OFF)
Load VSWR=20:1(All Phase)
No Destroy
Output Power Pout f = 157 MHz, VDS = 7.5 V, 38.5 dBm
Drain Current IDS P
in = 23 dBm, 1.36 A
Power Drain Efficiency
η
d I
Dset = 140 mA (RF OFF) 69 %
Power Added Efficiency
η
add 67 %
Linear Gain GL Note 3 24.0 dB
Output Power Pout f = 900 MHz, VDS = 7.5 V, 37.4 dBm
Drain Current IDS P
in = 27 dBm, 1.26 A
Power Drain Efficiency
η
d I
Dset = 140 mA (RF OFF) 58 %
Power Added Efficiency
η
add 53 %
Linear Gain GL Note 4 17.0 dB
Notes: 1. Pin = 10 dBm
2. These characteristics values are measurement using measurement tools especially by RENESAS.
3. Pin = 5 dBm
4. Pin = 10 dBm
Remark DC performance is 100% testing. RF performance is testing several samples per wafer.
A wafer rejection criterion for standard devices is 1 reject for several samples.
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NE5550779A
R09DS0040EJ0300 Rev.3.00 Page 3 of 15
Mar 12, 2013
TEST CIRCUIT SCHEMATIC FOR 460 MHz
C20
C10
IN OUT
C22
C11 C12 C13
C21
C1
V
DS
C1 L1R1
V
GS
NE5550779A
50 Ω50 Ω
L3
L2
COMPONENTS OF TEST CIRCUIT FOR MEASURING ELECTRICAL CHARACTERISTICS
Symbol Value Type Maker
C1 1
μ
F GRM188B31C105KA92 Murata
C10 27 pF GRM1882C1H270JA01 Murata
C11 2.7 pF ATC100A2R7JW American Technical
Ceramics
C12 12 pF ATC100A120BW American Technical
Ceramics
C13 12 pF ATC100A120BW American Technical
Ceramics
C20 24 pF ATC100A240JW American Technical
Ceramics
C21 6.8 pF ATC100A6R8BW American Technical
Ceramics
C22 100 pF ATC100A101JW American Technical
Ceramics
R1 2 kΩ 1/10 W Chip Resistor KOA
RK73B1JTTD202J
L1 114 nH
φ
0.5 mm,
φ
D = 3 mm, 10 Turns Ohesangyou
L2 4.7 nH LQW18AN4R7NG00 Murata
L3 3.0 nH LQP15MN3N0B02 Murata
PCB R1766, t = 0.4 mm,
ε
r = 4.5, size = 30 × 48 mm Panasonic
SMA Connecter WAKA 01K0790-20 WAKA
<R>
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NE5550779A
R09DS0040EJ0300 Rev.3.00 Page 4 of 15
Mar 12, 2013
COMPONENT LAYOUT OF TEST CIRCUIT FOR 460 MHz
C1
C1 C1
C1
R
R1
1
L
L1
1
C1
C10
0
C1
C11
1
C1
C12
2C
C20
20
C
C21
21
C
C22
22
C1
C13
3
L2
L2 L3
L3
RF
RF IN
IN RF OUT
RF OUT
V
VGSGS V
VDSDS
C1
C1 C1
C1
R
R1
1
L
L1
1
C1
C10
0
C1
C11
1
C1
C12
2C
C20
20
C
C21
21
C
C22
22
C1
C13
3
L2
L2 L3
L3
RF
RF IN
IN RF OUT
RF OUT
V
VGSGS V
VDSDS
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NE5550779A
R09DS0040EJ0300 Rev.3.00 Page 5 of 15
Mar 12, 2013
TYPICAL CHARACTERISTICS 1 (TA = 25°C)
R: f = 460MHz, VDS = 3.6/4.5/6/7.5/9 V, IDset = 140 mA, Pin = 0 to 30 dBm
IM: f1 = 460MHz, f2 = 461 MHz, VDS = 3.6/4.5/6/7.5/9 V, IDset = 140mA, Pout (2 tone) = 12 to 37 dBm
3rd/5th Order Intermodulation Distortion IM3/IM5 (dBc)
2 Tones Output Power Pout (2 tone) (dBm)
IM3/IM5 vs. 2 TONES OUTPUT POWER
2nd Harmonics 2f0 (dBc)
Output Power Pout (dBm)
2f0 vs. OUTPUT POWER
Power Gain GP (dB)
Power Added Efficiency add (%)
η
Input Power Pin (dBm)
POWER GAIN, POWER ADDED
EFFICIENCY vs. INPUT POWER
OUTPUT POWER, DRAIN CURRENT
vs. INPUT POWER
2f0 - 3.6 V
2f0 - 4.5 V
2f0 - 6 V
2f0 - 7.5 V
2f0 - 9 V
70
0
10
20
30
40
50
60
40252015 30
IM3 - 3.6 V
IM3 - 4.5 V
IM3 - 7.5 V
IM3 - 9 V
IM5 - 3.6 V
IM5 - 4.5 V
IM5 - 9 V
IM5 - 7.5 V
IM5 - 6 V
IM3 - 6 V
70
0
10
20
30
40
50
60
4035302510 15 20
Output Power Pout (dBm)
Drain Current IDS (A)
Input Power Pin (dBm)
Pout - 3.6 V
Pout - 4.5 V
Pout - 6 V
Pout - 7.5 V
Pout - 9 V
0
40
35
30
25
20
15
10
5
35252015–5 5 10 30 0.0
2.4
2.1
1.8
1.5
1.2
0.9
0.6
0.3
0
add - 3.6 V
add - 6 V
add - 4.5 V
add - 9 V
add - 7.5 V
Gp - 3.6 V
Gp - 4.5 V
Gp - 6 V
Gp - 7.5 V
Gp - 9 V
00
40 80
35 70
30 60
25 50
20 40
15 30
10 20
510
35252015–5 5 10 300
35
η
η
η
η
η
2.7
3.0
45
–5
45
IDS - 6 V
IDS - 4.5 V
IDS - 9 V
IDS - 7.5 V
IDS - 3.6 V
Remark The graphs indicate nominal characteristics.
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NE5550779A
R09DS0040EJ0300 Rev.3.00 Page 6 of 15
Mar 12, 2013
TEST CIRCUIT SCHEMATIC FOR 157 MHz
C20
C10
IN OUT
C23
C11 C12 C21 C22
C1
VDS
C1 L1R1
VGS
NE5550779A
50 Ω50 Ω
L20L10
COMPONENTS OF TEST CIRCUIT FOR MEASURING ELECTRICAL CHARACTERISTICS
Symbol Value Type Maker
C1 1
μ
F GRM31MB11E105KA01 Murata
C10 100 pF GQM1882C1H101JB01 Murata
C11 5.6 pF GQM1882C2A5R6DB01 Murata
C12 39 pF GQM1882C1H390JB01 Murata
C20 22 pF GRM1882C1H220JA01 Murata
C21 68 pF GQM1882C1H680JB01 Murata
C22 15 pF GQM1882C1H150JA01 Murata
C23 100 pF GQM1882C1H101JB01 Murata
R1 5.1 kΩ 1/10 W Chip Resistor ROAM
MCR03J103
L1 74.7 nH
φ
0.4 mm,
φ
D = 2 mm, 10 Turns Ohesangyou
L10 27 nH LLQ2012-F27N Toko
L20 29.8 nH
φ
0.4 mm,
φ
D = 2 mm, 5 Turns Ohesangyou
PCB R1766, t = 0.4 mm,
ε
r = 4.5, size = 30 × 48 mm Panasonic
SMA Connecter WAKA 01K0790-20 WAKA
<R>
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NE5550779A
R09DS0040EJ0300 Rev.3.00 Page 7 of 15
Mar 12, 2013
COMPONENT LAYOUT OF TEST CIRCUIT FOR 157 MHz
R1
R1
C1
C11
1
L
L1
1
C
C20
20
C
C21
21
C
C2
23
3
C1
C1 C1
C1
C10
C10
L10
L10
C
C2
22
2
L20
L20IN
IN OUT
OUT
R1
R1
C1
C11
1
L
L1
1
C
C20
20
C
C21
21
C
C2
23
3
C1
C1 C1
C1
C10
C10
L10
L10
C
C2
22
2
L20
L20IN
IN OUT
OUT
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NE5550779A
R09DS0040EJ0300 Rev.3.00 Page 8 of 15
Mar 12, 2013
TYPICAL CHARACTERISTICS 2 (TA = 25°C)
RF: f = 157 MHz, VDS = 3.6/4.5/6/7.5/9 V, IDset = 40 mA, Pin = –10 to 20 dBm
add - 3.6 V
add - 6 V
add - 4.5 V
add - 9 V
add - 7.5 V
Pout - 3.6 V
Pout - 4.5 V
Pout - 6.0 V
Pout - 7.5 V
Pout - 9 V
Output Power Pout (dBm)
Drain Current IDS (A)
Input Power Pin (dBm)
OUTPUT POWER, DRAIN CURRENT
vs. INPUT POWER
10 0.0
45 3.5
35
40 3.0
2.5
2.030
1.525
1.020
0.515
301510505 20
Power Gain GP (dB)
Power Added Efficiency add (%)
η
Input Power Pin (dBm)
POWER GAIN, POWER ADDED
EFFICIENCY vs. INPUT POWER
GP - 3.6 V
GP - 4.5 V
GP - 6 V
GP - 7.5 V
GP - 9 V
50
45 80
40 70
35 60
30 50
25 40
20 30
15 20
10 10
η
η
η
η
η
25
IDS - 3.6 V
IDS - 6 V
IDS - 4.5 V
IDS - 9 V
IDS - 7.5 V
301510505 20 25
Remark The graphs indicate nominal characteristics.
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NE5550779A
R09DS0040EJ0300 Rev.3.00 Page 9 of 15
Mar 12, 2013
TEST CIRCUIT SCHEMATIC FOR 900 MHz
C21
C10
IN OUT
C24
C11 C23
C20 C22C12 C13
C2
VDS
C1 L1R1
VGS
FET
NE5550779A
50 Ω50 Ω
COMPONENTS OF TEST CIRCUIT FOR MEASURING ELECTRICAL CHARACTERISTICS
Symbol Value Type Maker
C10 27 pF GQM1882C1H270JB01 Murata
C11 6.8 pF GQM1882C2A6R8DB01 Murata
C12 15 pF GQM1882C1H150JB01 Murata
C13 18 pF GQM1882C1H180JB01 Murata
C20 8.2 pF GQM1882C1H8R2DB01 Murata
C21 3.9 pF GQM1883C2A3R9CB01 Murata
C22 1.5 pF GQM1884C2A1R5CB01 Murata
C23 8.2 pF GQM1882C1H8R2DB01 Murata
C24 100 pF GQM1882C1H101JB01 Murata
C1 1
μ
F GRM21BB31H105KA2L Murata
C2 1
μ
F GRM21BB31H105KA2L Murata
L1 74.7 nH D20-74N7 Ohesangyou
R1 20 kΩ MCR03J203 Rohm
PCB R1766, t = 0.8 mm,
ε
r = 4.8, size = 30 × 40 mm Panasonic
SMA Connecter WAKA 01K0790-20 WAKA
<R>
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NE5550779A
R09DS0040EJ0300 Rev.3.00 Page 10 of 15
Mar 12, 2013
COMPONENT LAYOUT OF TEST CIRCUIT FOR 900 MHz
C1
C1
0
0C
C
11
11C
C
12
12
C
C
13
13 C
C
20
20
C
C
21
21
R1
R1
C
C
1
1
L1
L1
RF IN
RF IN
V
V
GS
GS V
V
DS
DS
C
C
22
22
C
C
23
23
C
C
24
24
C
C
2
2
C10
C10
C11
C11 C12
C12 C13
C13 C20
C20 C21
C21
R1
R1
C1
C1
L1
L1
RF IN
RF IN
RF OUT
RF OUT
V
VGSGS V
VDSDS
C22C22
C23
C23 C24
C24
C2
C2
C1
C1
0
0C
C
11
11C
C
12
12
C
C
13
13 C
C
20
20
C
C
21
21
R1
R1
C
C
1
1
L1
L1
RF IN
RF IN
V
V
GS
GS V
V
DS
DS
C
C
22
22
C
C
23
23
C
C
24
24
C
C
2
2
C10
C10
C11
C11 C12
C12 C13
C13 C20
C20 C21
C21
R1
R1
C1
C1
L1
L1
RF IN
RF IN
RF OUT
RF OUT
V
VGSGS V
VDSDS
C22C22
C23
C23 C24
C24
C2
C2
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NE5550779A
R09DS0040EJ0300 Rev.3.00 Page 11 of 15
Mar 12, 2013
TYPICAL CHARACTERISTICS 3 (TA = 25°C)
RF: f = 900 MHz, VDS = 3.6/4.5/6/7.5/9 V, IDset = 40 mA, Pin = –5 to 30 dBm
Input Power P
in
(dBm)
POWER GAIN, DRAIN CURRENT
vs. INPUT POWER
0
40
30
25
20
15
10
5
0
30
25
20
15
10
5
0
10
25201050–10 –5 15 25201050–10 –5 15
Power Gain G
P
(dB)
Power Added Efficiency
add
(%)
η
Input Power P
in
(dBm)
OUTPUT POWER, POWER ADDED
EFFICIENCY vs. INPUT POWER
Output Power P
out
(dBm)
Drain Current I
DS
(A)
80
70
0
1.5
0.9
0.3
1.2
0
60
40
20
0
50
30
1.8
0.6
add
- 6.0 V
add
- 4.5 V
add
- 7.5 V
add
- 9 V
add
- 3.6 V
G
P
- 3.6 V
G
P
- 4.5 V
G
P
- 6 V
G
P
- 7.5 V
G
P
- 9 V
η
η
η
η
η
I
DS
- 3.6 V
I
DS
- 6.0 V
I
DS
- 4.5 V
I
DS
- 9 V
I
DS
- 7.5 V
P
out
- 3.6 V
P
out
- 4.5 V
P
out
- 6.0 V
P
out
- 7.5 V
P
out
- 9 V
3530
35
30 35
Remark The graphs indicate nominal characteristics.
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NE5550779A
R09DS0040EJ0300 Rev.3.00 Page 12 of 15
Mar 12, 2013
S-PARAMETERS
S-parameters and noise parameters are provided on our web site in a form (S2P) that enables direct import of the
parameters to microwave circuit simulators without the need for keyboard inputs.
Click here to download S-parameters.
[Products] [RF Devices] [Device Parameters]
URL http://www.renesas.com/products/microwave/
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NE5550779A
R09DS0040EJ0300 Rev.3.00 Page 13 of 15
Mar 12, 2013
MOUNTING LAYOUT PAD DIMENSIONS
79A (UNIT: mm)
1.7
4.0
0.5
1.0
5.9
1.2
Gate
Source
Drain
0.5
6.1
0.5 Through Hole: 0.2 × 33
φ
Stop up the hole with a rosin or
something to avoid solder flow.
Remark The mounting pad layout in this document is for reference only.
When designing PCB, please consider workability of mounting, solder joint reliability, prevention of solder
bridge and so on, in order to optimize the design.
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NE5550779A
R09DS0040EJ0300 Rev.3.00 Page 14 of 15
Mar 12, 2013
PACKAGE DIMENSIONS
79A (UNIT: mm)
0.9±0.2
0.2±0.1
0.4±0.15
5.7 MAX.
5.7 MAX.
0.6±0.15
0.8±0.15
4.4 MAX.
4.2 MAX.
Source
Gate Drain
(Bottom View)
3.6±0.2
1.5±0.2
1.2 MAX.
0.8 MAX.
1.0 MAX.
Source
Gate Drain
W 8
27001
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NE5550779A
R09DS0040EJ0300 Rev.3.00 Page 15 of 15
Mar 12, 2013
RECOMMENDED SOLDERING CONDITIONS
This product should be soldered and mounted under the following recommended conditions. For soldering methods and
conditions other than those recommended below, contact your nearby sales office.
Soldering Method Soldering Conditions Condition Symbol
Infrared Reflow Peak temperature (package surface temperature) : 260°C or below
Time at peak temperature : 10 seconds or less
Time at temperature of 220°C or higher : 60 seconds or less
Preheating time at 120 to 180°C : 120±30 seconds
Maximum number of reflow processes : 3 times
Maximum chlorine content of rosin flux (% mass) : 0.2% (Wt.) or below
IR260
Wave Soldering Peak temperature (molten solder temperature) : 260°C or below
Time at peak temperature : 10 seconds or less
Preheating temperature (package surface temperature)
: 120°C or below
Maximum number of flow processes : 1 time
Maximum chlorine content of rosin flux (% mass) : 0.2% (Wt.) or below
WS260
Partial Heating Peak temperature (terminal temperature) : 350°C or below
Soldering time (per side of device) : 3 seconds or less
Maximum chlorine content of rosin flux (% mass) : 0.2% (Wt.) or below
HS350
CAUTION
Do not use different soldering methods together (except for partial heating).
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All trademarks and registered trademarks are the property of their respective owners.
C - 1
Revision History NE5550779A Data Sheet
Description
Rev. Date Page Summary
1.00 Apr 26, 2012 First edition issued
2.00 Jul 04, 2012 p.2 Modification of ELECTRICAL CHARACTERISTICS
p.6
Modification of COMPONENTS OF TEST CIRCUIT FOR MEASURING
ELECTRICAL CHARACTERISTICS
3.00 Mar 12, 2013 P3 Modification of COMPONENTS OF TEST CIRCUIT FOR MEASURING
ELECTRICAL CHARACTERISTICS
P6
Modification of COMPONENTS OF TEST CIRCUIT FOR MEASURING
ELECTRICAL CHARACTERISTICS
P9
Modification of COMPONENTS OF TEST CIRCUIT FOR MEASURING
ELECTRICAL CHARACTERISTICS
DISCONTINUED
NOTICE
1. Descriptions of circuits, software and other related information in this document are provided only to illustrate the operation of semiconductor products and
application examples. You are fully responsible for the incorporation of these circuits, software, and information in the design of your equipment. California
Eastern Laboratories and Renesas Electronics assumes no responsibility for any losses incurred by you or third parties arising from the use of these circuits,
software, or information.
2. California Eastern Laboratories has used reasonable care in preparing the information included in this document, but California Eastern Laboratories does
not warrant that such information is error free. California Eastern Laboratories and Renesas Electronics assumes no liability whatsoever for any damages
incurred by you resulting from errors in or omissions from the information included herein.
3. California Eastern Laboratories and Renesas Electronics do not assume any liability for infringement of patents, copyrights, or other intellectual property
rights of third parties by or arising from the use of Renesas Electronics products or technical information described in this document. No license, express,
implied or otherwise, is granted hereby under any patents, copyrights or other intellectual property rights of California Eastern Laboratories or Renesas
Electronics or others.
4. You should not alter, modify, copy, or otherwise misappropriate any Renesas Electronics product, whether in whole or in part. California Eastern
Laboratories and Renesas Electronics assume no responsibility for any losses incurred by you or third parties arising from such alteration, modication, copy
or otherwise misappropriation of Renesas Electronics product.
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for each Renesas Electronics product depends on the product’s quality grade, as indicated below. “Standard”: Computers; ofce equipment; communications
equipment; test and measurement equipment; audio and visual equipment; home electronic appliances; machine tools; personal electronic equipment; and
industrial robots etc. “High Quality”: Transportation equipment (automobiles, trains, ships, etc.); trafc control systems; anti-disaster systems; anti-crime
systems; and safety equipment etc. Renesas Electronics products are neither intended nor authorized for use in products or systems that may pose a direct
threat to human life or bodily injury (articial life support devices or systems, surgical implantations etc.), or may cause serious property damages (nuclear
reactor control systems, military equipment etc.). You must check the quality grade of each Renesas Electronics product before using it in a particular
application. You may not use any Renesas Electronics product for any application for which it is not intended. California Eastern Laboratories and Renesas
Electronics shall not be in any way liable for any damages or losses incurred by you or third parties arising from the use of any Renesas Electronics product
for which the product is not intended by California Eastern Laboratories or Renesas Electronics.
6. You should use the Renesas Electronics products described in this document within the range specied by California Eastern Laboratories, especially with
respect to the maximum rating, operating supply voltage range, movement power voltage range, heat radiation characteristics, installation and other product
characteristics. California Eastern Laboratories shall have no liability for malfunctions or damages arising out of the use of Renesas Electronics products
beyond such specied ranges.
7. Although Renesas Electronics endeavors to improve the quality and reliability of its products, semiconductor products have specic characteristics such as
the occurrence of failure at a certain rate and malfunctions under certain use conditions. Further, Renesas Electronics products are not subject to radiation
resistance design. Please be sure to implement safety measures to guard them against the possibility of physical injury, and injury or damage caused by
re in the event of the failure of a Renesas Electronics product, such as safety design for hardware and software including but not limited to redundancy,
re control and malfunction prevention, appropriate treatment for aging degradation or any other appropriate measures. Because the evaluation of
microcomputer software alone is very difcult, please evaluate the safety of the nal products or systems manufactured by you.
8. Please contact a California Eastern Laboratories sales ofce for details as to environmental matters such as the environmental compatibility of each Renesas
Electronics product. Please use Renesas Electronics products in compliance with all applicable laws and regulations that regulate the inclusion or use of
controlled substances, including without limitation, the EU RoHS Directive. California Eastern Laboratories and Renesas Electronics assume no liability for
damages or losses occurring as a result of your noncompliance with applicable laws and regulations.
9. Renesas Electronics products and technology may not be used for or incorporated into any products or systems whose manufacture, use, or sale is prohibited
under any applicable domestic or foreign laws or regulations. You should not use Renesas Electronics products or technology described in this document
for any purpose relating to military applications or use by the military, including but not limited to the development of weapons of mass destruction. When
exporting the Renesas Electronics products or technology described in this document, you should comply with the applicable export control laws and
regulations and follow the procedures required by such laws and regulations.
10. It is the responsibility of the buyer or distributor of California Eastern Laboratories, who distributes, disposes of, or otherwise places the Renesas Electronics
product with a third party, to notify such third party in advance of the contents and conditions set forth in this document, California Eastern Laboratories and
Renesas Electronics assume no responsibility for any losses incurred by you or third parties as a result of unauthorized use of Renesas Electronics products.
11. This document may not be reproduced or duplicated in any form, in whole or in part, without prior written consent of California Eastern Laboratories.
12. Please contact a California Eastern Laboratories sales ofce if you have any questions regarding the information contained in this document or Renesas
Electronics products, or if you have any other inquiries.
NOTE 1: “Renesas Electronics” as used in this document means Renesas Electronics Corporation and also includes its majority-owned subsidiaries.
NOTE 2: “Renesas Electronics product(s)” means any product developed or manufactured by or for Renesas Electronics.
NOTE 3: Products and product information are subject to change without notice.
CEL Headquarters 4590 Patrick Henry Drive, Santa Clara, CA 95054 Phone (408) 919-2500 www.cel.com
For a complete list of sales ofces, representatives and distributors,
Please visit our website: www.cel.com/contactus
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