02/06/09
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HEXFET® Power MOSFET
IRLR3636PbF
IRLU3636PbF
GDS
Gate Drain Source
S
D
G
D-Pak
IRLR3636PbF
I-Pak
IRLU3636PbF
G
S
D
G
DS
Applications
l DC Motor Drive
l High Efficiency Synchronous Rectification in SMPS
l Uninterruptible Power Supply
l High Speed Power Switching
l Hard Switched and High Frequency Circuits
Benefits
lOptimized for Logic Level Drive
lVery Low RDS(ON) at 4.5V VGS
lSuperior R*Q at 4.5V VGS
lImproved Gate, Avalanche and Dynamic dV/dt
Ruggedness
lFully Characterized Capacitance and Avalanche
SOA
lEnhanced body diode dV/dt and dI/dt Capability
l Lead-Free
VDSS 60V
RDS
(
on
)
typ. 5.4m
:
max. 6.8m
:
ID
(
Silicon Limited
)
99A
c
ID (Package Limited) 50A
PD - 96224
Absolute Maximum Ratings
Symbol Parameter Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Silicon Limited)
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V (Silicon Limited) A
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Package Limited)
IDM Pulsed Drain Current
d
PD @TC = 25°C Maximum Power Dissipation W
Linear Derating Factor W/°C
VGS Gate-to-Source Voltage V
dv/dt Peak Diode Recovery
f
V/ns
TJ Operating Junction and
TSTG Storage Temperature Range
Soldering Temperature, for 10 seconds
Avalanche Characteristics
EAS (Thermally limited) Sin
g
le Pulse Avalanche Ener
g
y
e
mJ
IAR Avalanche Current
d
A
EAR Repetitive Avalanche Ener
g
y
d
mJ
Thermal Resistance
Symbol Parameter Typ. Max. Units
RθJC Junction-to-Case
k
––– 1.05
RθJA Junction-to-Ambient (PCB Mount)
j
––– 50 °C/W
RθJA Junction-to-Ambient ––– 110
See Fig.14, 15, 22a, 22b
°C
170
143
22
±16
0.95
-55 to + 175
300 (1.6mm from case)
Max.
99
c
70
c
396
50
IRLR/U3636PbF
2www.irf.com
S
D
G
Pulse width 400µs; duty cycle 2%.
Coss eff. (TR) is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS.
Coss eff. (ER) is a fixed capacitance that gives the same energy as
Coss while VDS is rising from 0 to 80% VDSS.
When mounted on 1" square PCB (FR-4 or G-10 Material). For
recommended footprint and soldering techniquea refer to applocation
note # AN- 994 echniques refer to application note #AN-994.
Rθ is measured at TJ approximately 90°C.
Notes:
Calcuted continuous current based on maximum allowable junction
temperature Bond wire current limit is 50A. Note that current
limitation arising from heating of the device leds may occur with
some lead mounting arrangements.
Repetitive rating; pulse width limited by max. junction
temperature.
Limited by TJmax, starting TJ = 25°C, L = 0.136 mH
RG = 25, IAS = 50A, VGS =10V. Part not recommended for use
above this value .
ISD 50A, di/dt 1109 A/µs, VDD V(BR)DSS, TJ 175°C.
Static @ TJ = 25°C (unless otherwise specified)
Symbol Parameter Min. Typ. Max. Unit
s
V(BR)DSS Drain-to-Source Breakdown Volta
g
e 60 ––– ––– V
V(BR)DSS
/
TJ Breakdown Volta
g
e Temp. Coefficient ––– 0.07 ––– V/°C
––– 5.4 6.8
––– 6.6 8.3
VGS(th) Gate Threshold Volta
e 1.0 ––– 2.5 V
IDSS Drain-to-Source Leaka
g
e Current ––– ––– 20
––– ––– 250
IGSS Gate-to-Source Forward Leaka
g
e ––– ––– 100
Gate-to-Source Reverse Leaka
g
e ––– ––– -100
RG(int) Internal Gate Resistance ––– 0.6 –––
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol Parameter Min. Typ. Max. Unit
s
g
fs Forward Transconductance 31 ––– ––– S
QgTotal Gate Char
g
e ––– 33 49
Qgs Gate-to-Source Char
g
e ––– 11 –––
Qgd Gate-to-Drain ("Miller") Char
g
e ––– 15 –––
Qsync Total Gate Char
g
e Sync. (Qg - Qgd)––– 18 –––
td(on) Turn-On Delay Time ––– 45 –––
trRise Time ––– 216 –––
td(off) Turn-Off Delay Time ––– 43 –––
tfFall Time ––– 69 –––
Ciss Input Capacitance ––– 3779 –––
Coss Output Capacitance ––– 332 –––
Crss Reverse Transfer Capacitance ––– 163 –––
Coss eff. (ER) Effective Output Capacitance (Energy Related)
i
––– 437 –––
Coss eff. (TR) Effective Output Capacitance (Time Related)
h
––– 636 –––
Diode Characteristics
Symbol Parameter Min. Typ. Max. Unit
s
ISContinuous Source Current
(Body Diode)
ISM Pulsed Source Current
(Body Diode)
d
VSD Diode Forward Volta
g
e ––– ––– 1.3 V
trr Reverse Recovery Time ––– 27 ––– TJ = 25°C VR = 51V,
––– 32 ––– TJ = 125°C IF = 50A
Qrr Reverse Recovery Char
g
e ––– 31 ––– TJ = 25°C di
/
dt = 100A
/
µs
g
––– 43 ––– TJ = 125°C
IRRM Reverse Recovery Current ––– 2.1 ––– A TJ = 25°C
ton Forward Turn-On Time Intrinsic turn-on time is ne
g
li
g
ible (turn-on is dominated by LS+LD)
VGS = -16V
showing the
VDS = 30V
Conditions
VGS = 4.5V
g
VGS = 0V
VDS = 50V
ƒ = 1.0MHz
VGS = 0V, VDS = 0V to 48V
i
,See Fig.11
Conditions
VGS = 0V, ID = 250µA
Reference to 25°C, ID = 5mA
d
VGS = 10V, ID = 50A
g
VDS = VGS, ID = 100µA
VDS = 60V, VGS = 0V
VDS = 60V, VGS = 0V, TJ = 125°C
ns
VGS = 0V, VDS = 0V to 48V
h
MOSFET symbol
TJ = 25°C, IS = 50A, VGS = 0V
g
integral reverse
p-n junction diode.
VGS = 16V
nC
µA
nA
nC
ns
RDS(on) Static Drain-to-Source On-Resistance
pF
A
99
c
396
––– –––
––– –––
VGS = 4.5V, ID = 50A
g
m
ID = 50A
RG = 7.5
VGS = 4.5V
g
VDD = 39V
ID = 50A, VDS =0V, VGS = 4.5V
Conditions
VDS = 25V, ID = 50A
ID = 50A
IRLR/U3636PbF
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Fig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance vs. Temperature
Fig 2. Typical Output Characteristics
Fig 6. Typical Gate Charge vs. Gate-to-Source VoltageFig 5. Typical Capacitance vs. Drain-to-Source Voltage
0.1 110 100
VDS, Drain-to-Source Voltage (V)
0.1
1
10
100
1000
ID, Drain-to-Source Current (A)
VGS
TOP 15V
10V
4.5V
4.0V
3.5V
3.3V
3.0V
BOTTOM 2.7V
60µs PULSE WIDTH
Tj = 25°C
2.7V
0.1 110 100
VDS, Drain-to-Source Voltage (V)
1
10
100
1000
ID, Drain-to-Source Current (A)
VGS
TOP 15V
10V
4.5V
4.0V
3.5V
3.3V
3.0V
BOTTOM 2.7V
60µs PULSE WIDTH
Tj = 175°C
2.7V
1234567
VGS, Gate-to-Source Voltage (V)
0.1
1
10
100
1000
ID, Drain-to-Source Current (A)
TJ = 25°C
TJ = 175°C
VDS = 25V
60µs PULSE WIDTH
-60 -40 -20 020 40 60 80 100120140160180
TJ , Junction Temperature (°C)
0.5
1.0
1.5
2.0
2.5
RDS(on) , Drain-to-Source On Resistance
(Normalized)
ID = 50A
VGS = 10V
110 100
VDS, Drain-to-Source Voltage (V)
100
1000
10000
100000
C, Capacitance (pF)
VGS = 0V, f = 1 MHZ
Ciss = C gs + Cgd, C ds SHORTED
Crss = Cgd
Coss = Cds + Cgd
Coss
Crss
Ciss
0 5 10 15 20 25 30 35 40
QG, Total Gate Charge (nC)
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
VGS, Gate-to-Source Voltage (V)
VDS= 48V
VDS= 30V
VDS= 12V
ID= 50A
IRLR/U3636PbF
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Fig 8. Maximum Safe Operating Area
Fig 10. Drain-to-Source Breakdown Voltage
Fig 7. Typical Source-Drain Diode
Forward Voltage
Fig 11. Typical COSS Stored Energy
Fig 9. Maximum Drain Current vs.
Case Temperature
Fig 12. Maximum Avalanche Energy vs. DrainCurrent
0.1 0.4 0.7 1 1.3 1.6 1.9
VSD, Source-to-Drain Voltage (V)
0.1
1
10
100
1000
ISD, Reverse Drain Current (A)
TJ = 25°C
TJ = 175°C
VGS = 0V
25 50 75 100 125 150 175
TC , Case Temperature (°C)
0
10
20
30
40
50
60
70
80
90
100
110
ID, Drain Current (A)
Limited By Package
-60 -40 -20 020 40 60 80 100120140160180
TJ , Temperature ( °C )
50
55
60
65
70
75
80
V(BR)DSS, Drain-to-Source Breakdown Voltage (V)
Id = 5mA
0.1 1 10 100
VDS, Drain-to-Source Voltage (V)
0.1
1
10
100
1000
ID, Drain-to-Source Current (A)
OPERATION IN THIS AREA LIMITED BY R
DS(on)
Tc = 25°C
Tj = 175°C
Single Pulse
100µsec
1msec
10msec
DC
LIMITED BY PACKAGE
0 5 10 15 20 25 30 35 40 45 50 55 60 65
VDS, Drain-to-Source Voltage (V)
0.0
0.2
0.4
0.6
0.8
Energy (µJ)
25 50 75 100 125 150 175
Starting TJ , Junction Temperature (°C)
0
100
200
300
400
500
600
700
800
EAS , Single Pulse Avalanche Energy (mJ)
ID
TOP 5.69A
10.64A
BOTTOM 50A
IRLR/U3636PbF
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Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Fig 14. Typical Avalanche Current vs.Pulsewidth
Fig 15. Maximum Avalanche Energy vs. Temperature
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of Tjmax. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. Iav = Allowable avalanche current.
7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as
25°C in Figure 14, 15).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01
tav (sec)
0.1
1
10
100
1000
Avalanche Current (A)
0.05
Duty Cycle = Single Pulse
0.10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ∆Τ j = 25°C and
Tstart = 150°C.
0.01
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming Tj = 150°C and
Tstart =25°C (Single Pulse)
25 50 75 100 125 150 175
Starting TJ , Junction Temperature (°C)
0
50
100
150
200
EAR , Avalanche Energy (mJ)
TOP Single Pulse
BOTTOM 1.0% Duty Cycle
ID = 50A
1E-006 1E-005 0.0001 0.001 0.01 0.1
t1 , Rectangular Pulse Duration (sec)
0.001
0.01
0.1
1
10
Thermal Response ( Z thJC ) °C/W
0.20
0.10
D = 0.50
0.02
0.01
0.05
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
τJ
τJ
τ1
τ1
τ2
τ2τ3
τ3
R1
R1R2
R2R3
R3
Ci i/Ri
Ci= τi/Ri
τ
τC
τ4
τ4
R4
R4Ri (°C/W) τi (sec)
0.02028 0.000011
0.29406 0.000158
0.49179 0.001393
0.24336 0.00725
IRLR/U3636PbF
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Fig. 17 - Typical Recovery Current vs. dif/dt
Fig 16. Threshold Voltage vs. Temperature
Fig. 19 - Typical Stored Charge vs. dif/dtFig. 18 - Typical Recovery Current vs. dif/dt
Fig. 20 - Typical Stored Charge vs. dif/dt
-75 -50 -25 025 50 75 100 125 150 175
TJ , Temperature ( °C )
0.0
0.5
1.0
1.5
2.0
2.5
3.0
VGS(th), Gate threshold Voltage (V)
ID = 100µA
ID = 250µA
ID = 1.0mA
ID = 1.0A
0200 400 600 800 1000
diF /dt (A/µs)
0
2
4
6
8
10
12
14
IRRM (A)
IF = 20A
VR = 51V
TJ = 25°C
TJ = 125°C
0200 400 600 800 1000
diF /dt (A/µs)
0
2
4
6
8
10
12
14
16
IRRM (A)
IF = 30A
VR = 51V
TJ = 25°C
TJ = 125°C
0200 400 600 800 1000
diF /dt (A/µs)
0
50
100
150
200
250
300
350
QRR (A)
IF = 20A
VR = 51V
TJ = 25°C
TJ = 125°C
0200 400 600 800 1000
diF /dt (A/µs)
0
50
100
150
200
250
300
350
QRR (A)
IF = 30A
VR = 51V
TJ = 25°C
TJ = 125°C
IRLR/U3636PbF
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Fig 23a. Switching Time Test Circuit Fig 23b. Switching Time Waveforms
Fig 22b. Unclamped Inductive Waveforms
Fig 22a. Unclamped Inductive Test Circuit
tp
V
(BR)DSS
I
AS
R
G
I
AS
0.01
t
p
D.U.T
L
VDS
+
-V
DD
DRIVER
A
15V
20V
VGS
Fig 24a. Gate Charge Test Circuit Fig 24b. Gate Charge Waveform
Vds
Vgs
Id
Vgs(th)
Qgs1 Qgs2 Qgd Qgodr
Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
Circuit Layout Considerations
Low Stray Inductance
Ground Plane
Low Leakage Inductance
Current Transformer
P.W. Period
di/dt
Diode Recovery
dv/dt
Ripple 5%
Body Diode Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current
Body Diode Forward
Current
V
GS
=10V
V
DD
I
SD
Driver Gate Drive
D.U.T. I
SD
Waveform
D.U.T. V
DS
Waveform
Inductor Curent
D = P. W .
Period
* VGS = 5V for Logic Level Devices
*
+
-
+
+
+
-
-
-
RGVDD
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
D.U.T
Inductor Current
D.U.T. VDS
ID
IG
3mA
VGS
.3µF
50K
.2µF
12V
Current Regulator
Same Type as D.U.T.
Current Sampling Resistors
+
-
VDS
90%
10%
VGS
t
d(on)
t
r
t
d(off)
t
f
VDS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
RD
VGS
RG
D.U.T.
10V
+
-
VDD
VGS
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D-Pak (TO-252AA) Part Marking Information
D-Pak (TO-252AA) Package Outline
Dimensions are shown in millimeters (inches)
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Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
IRLR/U3636PbF
www.irf.com 9
I-Pak (TO-251AA) Package Outline
Dimensions are shown in millimeters (inches)
I-Pak (TO-251AA) Part Marking Information
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Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
IRLR/U3636PbF
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Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 02/2009
D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR
16.3 ( .641 )
15.7 ( .619 )
8.1 ( .318 )
7.9 ( .312 )
12.1 ( .476 )
11.9 ( .469 ) FEED DIRECTION FEED DIRECTION
16.3 ( .641 )
15.7 ( .619 )
TRR TRL
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
16 mm
13 INCH