Overview
The AN7800R and the AN78M00R ser ies ar e the fix ed
positive output voltag e regulators with r eset pin. Stabi-
lized fixed output voltage is obtained from unstable DC
input volta ge without using any exter nal components.
Thr ee types of output volta ge, 5V, 9V and 12V, are avail-
able for the AN7800R series, and four types, 5V, 8V, 9V
and 12V, are available for the AN78M00R ser ies. T hey
can be used in power circuits with current capacitance
1A/500mA. ON/OFF of output v oltage can be controlled
by the reset pin.
Features
• No external components
• Maximum output current :1A (AN7800R)
500mA (AN78M00R)
• Output voltage :5V, 9V, 12V (AN7800R)
:8V (AN78M08R)
• Short-circuit current limiting built-in
Thermal overload protection built-in
• Output transistor safe area compensation
• ON/OFF of output voltage can be controlled by reset
pin.
AN7800R/AN78M00R Series
Positive Output Voltage Regulators with
Reset pin (1A/500mA Type)
Block Diagram
Unit:mm
12.5max.
ø 3.1
2.0
4.0
3–1.0
0.7±0.2 0.5±0.1
4-pin SIL Plastic Package with Fin (SSIP004-P-0000)
2.3 1.5 1.32.32.3
1.8
9.0min.
3.3max.
9.6
+ 0.5
– 0.1
1
3
4
2
Input
Pass Tr
Output
Reset
Common
Starter Voltage
Reference
Current
Source
Error Amp.
+
Thermal
Protection
Q1
RSC
R2
R1
Current
Limiter
VI
PD
Topr
Tstg
V
W
˚C
˚C
35
10 *1
–20 to + 80
–55 to + 150
Input voltage
Power dissipation
Operating ambient temperature
Storage temperature
Parameter Symbol Rating Unit
Absolute Maximum Ratings (Ta=25˚C)
*1 Follow the derating curve. When Tj exceeds 150˚C, the internal circuit cuts off the output.
VO5.2 V5
Tj=25˚C
VOV
VI=8 to 20V, IO=5mA to 1A,
Tj=0 to 125˚C, PD 15W
REGIN 100 mV3
VI=7.5 to 25V, Tj=25˚C
mV
REGLmV15
IO=5mA to 1.5A, Tj=25˚C
mV
IO=250 to 750mA, Tj=25˚C
VI=8 to 12V, Tj=25˚C
mA3.9
Tj=25˚C
1
Ibias
mA
VI=7.5 to 25V, Tj=25˚C
mA
µV40
IO=5mA to 1A, Tj=25˚C
Vno
dB
f=10Hz to 100kHz
1.3
0.5
50
5.25
100
50
8
62
4.8
4.75
RR
VI=8 to 18V, IO=100mA, f=120Hz
V2
IO=1A, Tj=25˚C
m17ZO
mA700
f=1kHz
A2
VI=35V, Tj=25˚C
5
IO (Peak) Tj=25˚C
mV/˚C– 0.3
IO=5mA, Tj=0 to 125˚C
V1VO (Reset) Tj=25˚C, II (Reset)=1mA
mA1II (Reset) Tj=25˚C
AN7800R Series
Output voltage
Output voltage tolerance
Line regulation
Load bias current fluctuation
Output noise voltage
Ripple rejection ratio
Minimum input/output voltage difference
Load regulation
Bias current
Input bias current fluctuation
Output impedance
Output short circuit current
Peak output current
Output voltage temperature coefficient
Output voltage at reset
Reset input current
Parameter Symbol Condition min typ max Unit
· AN7805R (1A, 5V Type)
Note 1) The specified condition Tj=25˚C means that the test should be carried out with the test time so short (within 10ms) that the
drift in characteristic value due to the rise in chip junction temperature can be ignored.
Note 2) When not specified, VI=10V, IO=100mA, CI=0.33µF, CO=0.1µF, Tj=0 to 125˚C
Electrical Characteristics (Ta=25˚C)
Ibias (IN)
Ibias (L)
VDIF (min.)
IO (Short)
VO/Ta
<
=
VO9.35 V9
Tj=25˚C
VOV
VI=12 to 24V, IO=5mA to 1A,
Tj=0 to 125˚C, PD 15W
REGIN 180 mV7
VI=11.5 to 26V, Tj=25˚C
mV
REGLmV12
IO=5mA to 1.5A, Tj=25˚C
mV
IO=250 to 750mA, Tj=25˚C
VI=12 to 18V, Tj=25˚C
mA3.9
Tj=25˚C
2
Ibias
mA
VI=11.5 to 26V, Tj=25˚C
mA
57
IO=5mA to 1A, Tj=25˚C
Vno
dB
f=10Hz to 100kHz
1
0.5
90
9.45
180
90
8
56
8.65
8.55
RR
VI=12 to 22V, IO=100mA, f=120Hz
V2
IO=1A, Tj=25˚C
16ZO
mA700
f=1kHz
A2
VI=26V, Tj=25˚C
4
Tj=25˚C
– 0.5
IO=5mA, Tj=0 to 125˚C
V1
mA1
Tj=25˚C
Output voltage
Output voltage tolerance
Line regulation
Load bias current fluctuation
Output noise voltage
Ripple rejection ratio
Minimum input/output voltage difference
Load regulation
Bias current
Input bias current fluctuation
Output impedance
Output short circuit current
Peak output current
Output voltage temperature coefficient
Output voltage at reset
Reset input current
Parameter Symbol Condition min typ max Unit
µV
m
IO (Peak)
mV/˚C
VO (Reset) Tj=25˚C, II (Reset)=1mA
II (Reset)
· AN7809R (1A, 9V Type)
Note 1) The specified condition Tj=25˚C means that the test should be carried out with the test time so short (within 10ms) that the
drift in characteristic value due to the rise in chip junction temperature can be ignored.
Note 2) When not specified, VI=15V, IO=100mA, CI=0.33µF, CO=0.1µF, Tj=0 to 125˚C
Electrical Characteristics (Ta=25˚C)
Ibias (IN)
Ibias (L)
VDIF (min.)
IO (Short)
VO/Ta
<
=
VO12.5 V12
Tj=25˚C
VOV
VI=15 to 27V, IO=5mA to 1A,
Tj=0 to 125˚C, PD 15W
REGIN 240 mV10
VI=14.5 to 30V, Tj=25˚C
mV
REGLmV12
IO=5mA to 1.5A, Tj=25˚C
mV
IO=250 to 750mA, Tj=25˚C
VI=16 to 22V, Tj=25˚C
mA4
Tj=25˚C
3
Ibias
mA
VI=14.5 to 30V, Tj=25˚C
mA
75
IO=5mA to 1A, Tj=25˚C
Vno
dB
f=10Hz to 100kHz
1
0.5
120
12.6
240
120
8
55
11.5
11.4
RR
VI=15 to 25V, IO=100mA, f=120Hz
V2
IO=1A, Tj=25˚C
18ZO
mA700
f=1kHz
A2
VI=35V, Tj=25˚C
4
Tj=25˚C
– 0.8
IO=5mA, Tj=0 to 125˚C
V1
Tj=25˚C, II (Reset)=1mA
mA1
Tj=25˚C
Output voltage
Output voltage tolerance
Line regulation
Load bias current fluctuation
Output noise voltage
Ripple rejection ratio
Minimum input/output voltage difference
Load regulation
Bias current
Input bias current fluctuation
Output impedance
Output short circuit current
Peak output current
Output voltage temperature coefficient
Output voltage at reset
Reset input current
Parameter Symbol Condition min typ max Unit
µV
m
IO (Peak)
mV/˚C
VO (Reset)
II (Reset)
· AN7812R (1A, 12V Type)
Note 1) The specified condition Tj=25˚C means that the test should be carried out with the test time so short (within 10ms) that the
drift in characteristic value due to the rise in chip junction temperature can be ignored.
Note 2) When not specified, VI=19V, IO=100mA, CI=0.33µF, CO=0.1µF, Tj=0 to 125˚C
Ibias (IN)
Ibias (L)
VDIF (min.)
IO (Short)
VO/Ta
<
=
VO5.2 V5
VOV
VI=7.5 to 20V, IO=5 to 350mA,
Tj=0 to 125˚C, PD 15W
REGIN 100 mV3
VI=7.5 to 25V, Tj=25˚C
mV
REGLmV20
IO=5 to 500mA, Tj=25˚C
mV
IO=5 to 200mA, Tj=25˚C
VI=8 to 25V, Tj=25˚C
mA4.6
Tj=25˚C
1
Ibias
mA
VI=8 to 25V, Tj=25˚C
mA
µV40
IO=5 to 350mA, Tj=25˚C
Vno
dB
f=10Hz to 100kHz
0.8
0.5
50
5.25
100
50
6
62
4.8
4.75
RR
VI=8 to 18V, IO=100mA, f=120Hz
2
IO=500mA, Tj=25˚C
300
mA
mA
700
VI=35V, Tj=25˚C
10
Tj=25˚C
– 0.5
IO=5mA, Tj=0 to 125˚C
1
mA1
Output voltage
Output voltage tolerance
Line regulation
Load bias current fluctuation
Output noise voltage
Ripple rejection ratio
Minimum input/output voltage difference
Load regulation
Bias current
Input bias current fluctuation
Output short circuit current
Peak output current
Output voltage temperature coefficient
Output voltage at reset
Reset input current
Parameter Symbol Condition min typ max Unit
Tj=25˚C
V
V
IO (Peak)
mV/˚C
VO (Reset) Tj=25˚C, II (Reset)=1mA
II (Reset)
AN78M00R Series
· AN78M05R (500mA, 5V Type)
Note 1) The specified condition Tj=25˚C means that the test should be carried out with the test time so short (within 10ms) that the
drift in characteristic value due to the rise in chip junction temperature can be ignored.
Note 2) When not specified, VI=10V, IO=350mA, CI=0.33µF, CO=0.1µF, Tj=0 to 125˚C
Electrical Characteristics (Ta=25˚C)
Ibias (IN)
Ibias (L)
VDIF (min.)
IO (Short)
VO/Ta
Tj=25˚C
<
=
VO8.3 V8
VOV
VI=10.5 to 23V, IO=5 to 350mA,
Tj=0 to 125˚C, PD 15W
REGIN 100 mV6
VI=10.5 to 25V, Tj=25˚C
mV
REGLmV25
IO=5 to 500mA, Tj=25˚C
mV
IO=5 to 200mA, Tj=25˚C
VI=11 to 25V, Tj=25˚C
mA4.1
Tj=25˚C
2
Ibias
mA
VI=10.5 to 25V, Tj=25˚C
mA
52
IO=5 to 350mA, Tj=25˚C
Vno
dB
f=10Hz to 100kHz
0.8
0.5
50
8.4
160
80
6
56
7.7
7.6
RR
VI=11.5 to 21.5V, IO=100mA, f=120Hz
V2
IO=500mA, Tj=25˚C
mA300
A0.7
VI=35V, Tj=25˚C
10
Tj=25˚C
– 0.5
IO=5mA, Tj=0 to 125˚C
V1
mA1
Tj=25˚C
Output voltage
Output voltage tolerance
Line regulation
Load bias current fluctuation
Output noise voltage
Ripple rejection ratio
Minimum input/output voltage difference
Load regulation
Bias current
Input bias current fluctuation
Output short circuit current
Peak output current
Output voltage temperature coefficient
Output voltage at reset
Reset input current
Parameter Symbol Condition min typ max Unit
µV
Tj=25˚C
IO (Peak)
mV/˚C
VO (Reset) Tj=25˚C, II (Reset)=1mA
II (Reset)
· AN78M08R (500mA, 8V Type)
Note 1) The specified condition Tj=25˚C means that the test should be carried out with the test time so short (within 10ms) that the
drift in characteristic value due to the rise in chip junction temperature can be ignored.
Note 2) When not specified, VI=14V, IO=350mA, CI=0.33µF, CO=0.1µF, Tj=0 to 125˚C
Ibias (IN)
Ibias (L)
VDIF (min.)
IO (Short)
VO/Ta
<
=
VO9.35 V9
VOV
VI=11.5 to 24V, IO=5 to 350mA,
Tj=0 to 125˚C, PD 15W
REGIN 100 mV7
VI=11.5 to 25V, Tj=25˚C
mV
REGLmV25
IO=5 to 500mA, Tj=25˚C
mV
IO=5 to 200mA, Tj=25˚C
VI=12 to 25V, Tj=25˚C
mA4.1
2
Ibias
mA
VI=12 to 25V, Tj=25˚C
mA
60
IO=5 to 350mA, Tj=25˚C
Vno
dB
f=10Hz to 100kHz
0.8
0.5
50
9.45
180
90
6.0
56
8.65
8.55
RR
VI=12 to 22V, IO=100mA, f=120Hz
V2
IO=500mA, Tj=25˚C
mA300
A0.7
VI=35V, Tj=25˚C
10
Tj=25˚C
– 0.5
IO=5mA, Tj=0 to 125˚C
V1
mA1
Output voltage
Output voltage tolerance
Line regulation
Load bias current fluctuation
Output noise voltage
Ripple rejection ratio
Minimum input/output voltage difference
Load regulation
Bias current
Input bias current fluctuation
Output short circuit current
Peak output current
Output voltage temperature coefficient
Output voltage at reset
Reset input current
Parameter Symbol Condition min typ max Unit
µV
Tj=25˚C
Tj=25˚C
Tj=25˚C
IO (Peak)
mV/˚C
VO (Reset) Tj=25˚C, II (Reset)=1mA
II (Reset)
· AN78M09R (500mA, 9V Type)
Note 1) The specified condition Tj=25˚C means that the test should be carried out with the test time so short (within 10ms) that the
drift in characteristic value due to the rise in chip junction temperature can be ignored.
Note 2) When not specified, VI=15V, IO=350mA, CI=0.33µF, CO=0.1µF, Tj=0 to 125˚C
Electrical Characteristics (Ta=25˚C)
Ibias (IN)
Ibias (L)
VDIF (min.)
IO (Short)
VO/Ta
<
=
VO12.5 V12
VOV
VI=14.5 to 27V, IO=5 to 350mA,
Tj=0 to 125˚C, PD 15W
REGIN 100 mV8
VI=14.5 to 30V, Tj=25˚C
mV
REGLmV25
IO=5 to 500mA, Tj=25˚C
mV
IO=5 to 200mA, Tj=25˚C
VI=16 to 30V, Tj=25˚C
mA4.3
Tj=25˚C
2
Ibias
mA
VI=14.5 to 30V, Tj=25˚C
mA
µV75
IO=5 to 350mA, Tj=25˚C
Vno
dB
f=10Hz to 100kHz
0.8
0.5
50
12.6
240
120
6
55
11.5
11.4
RR
VI=15 to 25V, IO=100mA, f=120Hz
V2
IO=500mA, Tj=25˚C
mA300
mA700
VI=35V, Tj=25˚C
10
Tj=25˚C, VI=35V
– 0.5
IO=5mA, Tj=0 to 125˚C
V1
mA1
Tj=25˚C
Output voltage
Output voltage tolerance
Line regulation
Load bias current fluctuation
Output noise voltage
Ripple rejection ratio
Minimum input/output voltage difference
Load regulation
Bias current
Input bias current fluctuation
Output short circuit current
Peak output current
Output voltage remperature coefficient
Output voltage at reset
Reset input current
Parameter Symbol Condition min typ max Unit
Tj=25˚C
IO (Peak)
mV/˚C
VO (Reset) Tj=25˚C, II (Reset)=1mA
II (Reset)
· AN78M12R (500mA, 12V Type)
Note 1) The specified condition Tj=25˚C means that the test should be carried out with the test time so short (within 10ms) that the
drift in characteristic value due to the rise in chip junction temperature can be ignored.
Note 2) When not specified, VI=19V, IO=350mA, CI=0.33µF, CO=0.1µF, Tj=0 to 125˚C
Ibias (IN)
Ibias (L)
VDIF (min.)
IO (Short)
VO/Ta
<
=
Characteristic Curve
Basic Regulator Circuit
1.0
0.8
0.6
0.4
0.2
0
–40 0 40 80 120 160
Junction Temperature Tj (˚C)
Reset Current II (Reset) (mA)
II (Reset) – Tj
16
14
12
10
8
6
4
2
00 40 80 120 160
PD –Ta
(1) Infinite Heat Sink
(2) 5˚C/W Heat Sink
(3) 15˚C/W Heat Sink
(4) Without Heat Sink
(2)
(3)
(4)
(1)
1000
800
600
400
200
00.1 1
CI=0.33µF
CO=0.1µF
Tj=25˚C
10 100 1000
Output Current IO (mA)
Output Voltage at Reset VO (Reset) (mV)
VO (Reset) – IO
VI=20V
VI=10V
VI=30V
VI=7V
Ambient Temperature Ta (˚C)
Power Dissipation PD (W)
For TTL, an open collector type inverter, buffer, gate etc.
can be used.
Beware of the breakdown of TTL, as the reset pin bears voltage
higher than the output voltage VO by 1—2V.
CO
CI
Input Output
Reset
* 7406etc.
AN7800R
AN78M00R
13
4
2
C
I is set when the input line is long.
CO improves the temperature response.
*
Applica tion Circuit
Output
Input
C
0.33µF0.1µF
1k
AN7800R
AN78M00R
13
4
2
Input
0.33µF0.1µF
1kR
SW
AN7800R
AN78M00R
13
4
2
Control of Output Voltage Rise Time
(1) Soft Start Circuit
Output
Input
0.33µF0.1µF
QR
1k
AN7800R
AN78M00R
13
4
2
(2) Several Output Reset Circuits
110
Capacity C (µF) 100
10
1
0.1
Output Voltage Rise Time tr (s)